Commit 32610705 authored by Kai Germaschewski's avatar Kai Germaschewski

ISDN/HiSax: Renaming ReadISAC -> isac_read etc.

Basically only a cosmetic patch, with much renaming and a little
rearranging of code.
parent 9ca46b71
...@@ -17,6 +17,19 @@ ...@@ -17,6 +17,19 @@
#define ARCOFI_TIMER_VALUE 20 #define ARCOFI_TIMER_VALUE 20
static inline u8
isac_read(struct IsdnCardState *cs, u8 addr)
{
return cs->dc_hw_ops->read_reg(cs, addr);
}
static inline void
isac_write(struct IsdnCardState *cs, u8 addr, u8 val)
{
cs->dc_hw_ops->write_reg(cs, addr, val);
}
static void static void
add_arcofi_timer(struct IsdnCardState *cs) { add_arcofi_timer(struct IsdnCardState *cs) {
if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) { if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
...@@ -43,11 +56,11 @@ send_arcofi(struct IsdnCardState *cs) { ...@@ -43,11 +56,11 @@ send_arcofi(struct IsdnCardState *cs) {
} }
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
val = isac_read_reg(cs, ISAC_MOSR); val = isac_read(cs, ISAC_MOSR);
isac_write_reg(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]); isac_write(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
cs->dc.isac.mocr |= 0x10; cs->dc.isac.mocr |= 0x10;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
} }
int int
......
...@@ -90,68 +90,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz ...@@ -90,68 +90,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz
spin_unlock_irqrestore(&asuscom_lock, flags); spin_unlock_irqrestore(&asuscom_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.asus.isac, offset); return readreg(cs, cs->hw.asus.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.asus.isac, offset, value); writereg(cs, cs->hw.asus.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.asus.isac, 0, data, size); readfifo(cs, cs->hw.asus.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.asus.isac, 0, data, size); writefifo(cs, cs->hw.asus.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
ReadISAC_IPAC(struct IsdnCardState *cs, u8 offset) ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.asus.isac, offset|0x80); return readreg(cs, cs->hw.asus.isac, offset|0x80);
} }
static void static void
WriteISAC_IPAC(struct IsdnCardState *cs, u8 offset, u8 value) ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.asus.isac, offset|0x80, value); writereg(cs, cs->hw.asus.isac, offset|0x80, value);
} }
static void static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.asus.isac, 0x80, data, size); readfifo(cs, cs->hw.asus.isac, 0x80, data, size);
} }
static void static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.asus.isac, 0x80, data, size); writefifo(cs, cs->hw.asus.isac, 0x80, data, size);
} }
static struct dc_hw_ops ipac_dc_ops = { static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ReadISAC_IPAC, .read_reg = ipac_dc_read,
.write_reg = WriteISAC_IPAC, .write_reg = ipac_dc_write,
.read_fifo = ReadISACfifo_IPAC, .read_fifo = ipac_dc_read_fifo,
.write_fifo = WriteISACfifo_IPAC, .write_fifo = ipac_dc_write_fifo,
}; };
static u8 static u8
......
...@@ -106,35 +106,35 @@ writefifo(struct IsdnCardState *cs, int offset, u8 *data, int size) ...@@ -106,35 +106,35 @@ writefifo(struct IsdnCardState *cs, int offset, u8 *data, int size)
spin_unlock_irqrestore(&avm_a1p_lock, flags); spin_unlock_irqrestore(&avm_a1p_lock, flags);
} }
static inline u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 adr) isac_read(struct IsdnCardState *cs, u8 adr)
{ {
return readreg(cs, ISAC_REG_OFFSET, adr); return readreg(cs, ISAC_REG_OFFSET, adr);
} }
static inline void static void
WriteISAC(struct IsdnCardState *cs, u8 adr, u8 value) isac_write(struct IsdnCardState *cs, u8 adr, u8 value)
{ {
writereg(cs, ISAC_REG_OFFSET, adr, value); writereg(cs, ISAC_REG_OFFSET, adr, value);
} }
static inline void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs, ISAC_FIFO_OFFSET, data, size); readfifo(cs, ISAC_FIFO_OFFSET, data, size);
} }
static inline void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs, ISAC_FIFO_OFFSET, data, size); writefifo(cs, ISAC_FIFO_OFFSET, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static inline u8 static inline u8
...@@ -193,15 +193,15 @@ avm_a1p_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -193,15 +193,15 @@ avm_a1p_interrupt(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val); hscx_int_main(cs, val);
} }
if (sval & ASL0_R_ISAC) { if (sval & ASL0_R_ISAC) {
val = ReadISAC(cs, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
if (val) if (val)
isac_interrupt(cs, val); isac_interrupt(cs, val);
} }
} }
WriteHSCX(cs, 0, HSCX_MASK, 0xff); WriteHSCX(cs, 0, HSCX_MASK, 0xff);
WriteHSCX(cs, 1, HSCX_MASK, 0xff); WriteHSCX(cs, 1, HSCX_MASK, 0xff);
WriteISAC(cs, ISAC_MASK, 0xff); isac_write(cs, ISAC_MASK, 0xff);
WriteISAC(cs, ISAC_MASK, 0x00); isac_write(cs, ISAC_MASK, 0x00);
WriteHSCX(cs, 0, HSCX_MASK, 0x00); WriteHSCX(cs, 0, HSCX_MASK, 0x00);
WriteHSCX(cs, 1, HSCX_MASK, 0x00); WriteHSCX(cs, 1, HSCX_MASK, 0x00);
spin_unlock(&cs->lock); spin_unlock(&cs->lock);
......
...@@ -90,37 +90,35 @@ writefifo(struct IsdnCardState *cs, u8 off, u8 *data, int size) ...@@ -90,37 +90,35 @@ writefifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
spin_unlock_irqrestore(&bkm_a8_lock, flags); spin_unlock_irqrestore(&bkm_a8_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, offset | 0x80); return readreg(cs, offset | 0x80);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, offset | 0x80, value); writereg(cs, offset | 0x80, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, 0x80, data, size); readfifo(cs, 0x80, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, 0x80, data, size); writefifo(cs, 0x80, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ReadISAC, .read_reg = ipac_dc_read,
.write_reg = WriteISAC, .write_reg = ipac_dc_write,
.read_fifo = ReadISACfifo, .read_fifo = ipac_dc_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = ipac_dc_write_fifo,
}; };
static u8 static u8
...@@ -437,7 +435,7 @@ setup_sct_quadro(struct IsdnCard *card) ...@@ -437,7 +435,7 @@ setup_sct_quadro(struct IsdnCard *card)
test_and_set_bit(HW_IPAC, &cs->HW_Flags); test_and_set_bit(HW_IPAC, &cs->HW_Flags);
cs->dc_hw_ops = &isac_ops; cs->dc_hw_ops = &ipac_dc_ops;
cs->bc_hw_ops = &hscx_ops; cs->bc_hw_ops = &hscx_ops;
cs->BC_Send_Data = &hscx_fill_fifo; cs->BC_Send_Data = &hscx_fill_fifo;
cs->cardmsg = &BKM_card_msg; cs->cardmsg = &BKM_card_msg;
......
...@@ -85,23 +85,25 @@ static spinlock_t diva_lock = SPIN_LOCK_UNLOCKED; ...@@ -85,23 +85,25 @@ static spinlock_t diva_lock = SPIN_LOCK_UNLOCKED;
static inline u8 static inline u8
readreg(unsigned int ale, unsigned int adr, u8 off) readreg(unsigned int ale, unsigned int adr, u8 off)
{ {
register u8 ret; u8 ret;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&diva_lock, flags); spin_lock_irqsave(&diva_lock, flags);
byteout(ale, off); byteout(ale, off);
ret = bytein(adr); ret = bytein(adr);
spin_unlock_irqrestore(&diva_lock, flags); spin_unlock_irqrestore(&diva_lock, flags);
return (ret); return ret;
} }
static inline void static inline void
readfifo(unsigned int ale, unsigned int adr, u8 off, u8 * data, int size) readfifo(unsigned int ale, unsigned int adr, u8 off, u8 * data, int size)
{ {
/* fifo read without cli because it's allready done */ unsigned long flags;
spin_lock_irqsave(&diva_lock, flags);
byteout(ale, off); byteout(ale, off);
insb(adr, data, size); insb(adr, data, size);
spin_unlock_irqrestore(&diva_lock, flags);
} }
...@@ -119,89 +121,86 @@ writereg(unsigned int ale, unsigned int adr, u8 off, u8 data) ...@@ -119,89 +121,86 @@ writereg(unsigned int ale, unsigned int adr, u8 off, u8 data)
static inline void static inline void
writefifo(unsigned int ale, unsigned int adr, u8 off, u8 *data, int size) writefifo(unsigned int ale, unsigned int adr, u8 off, u8 *data, int size)
{ {
/* fifo write without cli because it's allready done */ unsigned long flags;
spin_lock_irqsave(&diva_lock, flags);
byteout(ale, off); byteout(ale, off);
outsb(adr, data, size); outsb(adr, data, size);
spin_unlock_irqrestore(&diva_lock, flags);
} }
static inline u8 static inline u8
memreadreg(unsigned long adr, u8 off) memreadreg(unsigned long adr, u8 off)
{ {
return(*((unsigned char *) return readb(((unsigned int *)adr) + off);
(((unsigned int *)adr) + off)));
} }
static inline void static inline void
memwritereg(unsigned long adr, u8 off, u8 data) memwritereg(unsigned long adr, u8 off, u8 data)
{ {
register u8 *p; writeb(data, ((unsigned int *)adr) + off);
p = (unsigned char *)(((unsigned int *)adr) + off);
*p = data;
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return(readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); return readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value); writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 *data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 *data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
ReadISAC_IPAC(struct IsdnCardState *cs, u8 offset) ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80)); return readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80);
} }
static void static void
WriteISAC_IPAC(struct IsdnCardState *cs, u8 offset, u8 value) ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value); writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value);
} }
static void static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
} }
static void static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
} }
static struct dc_hw_ops ipac_dc_ops = { static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ReadISAC_IPAC, .read_reg = ipac_dc_read,
.write_reg = WriteISAC_IPAC, .write_reg = ipac_dc_write,
.read_fifo = ReadISACfifo_IPAC, .read_fifo = ipac_dc_read_fifo,
.write_fifo = WriteISACfifo_IPAC, .write_fifo = ipac_dc_write_fifo,
}; };
static u8 static u8
...@@ -224,36 +223,36 @@ static struct bc_hw_ops hscx_ops = { ...@@ -224,36 +223,36 @@ static struct bc_hw_ops hscx_ops = {
}; };
static u8 static u8
MemReadISAC_IPAC(struct IsdnCardState *cs, u8 offset) mem_ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return (memreadreg(cs->hw.diva.cfg_reg, offset+0x80)); return memreadreg(cs->hw.diva.cfg_reg, offset+0x80);
} }
static void static void
MemWriteISAC_IPAC(struct IsdnCardState *cs, u8 offset, u8 value) mem_ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
memwritereg(cs->hw.diva.cfg_reg, offset|0x80, value); memwritereg(cs->hw.diva.cfg_reg, offset|0x80, value);
} }
static void static void
MemReadISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) mem_ipac_dc_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
while(size--) while(size--)
*data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80); *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80);
} }
static void static void
MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) mem_ipac_dc_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
while(size--) while(size--)
memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++); memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++);
} }
static struct dc_hw_ops mem_ipac_dc_ops = { static struct dc_hw_ops mem_ipac_dc_ops = {
.read_reg = MemReadISAC_IPAC, .read_reg = mem_ipac_dc_read,
.write_reg = MemWriteISAC_IPAC, .write_reg = mem_ipac_dc_write,
.read_fifo = MemReadISACfifo_IPAC, .read_fifo = mem_ipac_dc_read_fifo,
.write_fifo = MemWriteISACfifo_IPAC, .write_fifo = mem_ipac_dc_write_fifo,
}; };
static u8 static u8
...@@ -275,36 +274,36 @@ static struct bc_hw_ops mem_hscx_ops = { ...@@ -275,36 +274,36 @@ static struct bc_hw_ops mem_hscx_ops = {
/* IO-Functions for IPACX type cards */ /* IO-Functions for IPACX type cards */
static u8 static u8
MemReadISAC_IPACX(struct IsdnCardState *cs, u8 offset) ipacx_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return (memreadreg(cs->hw.diva.cfg_reg, offset)); return memreadreg(cs->hw.diva.cfg_reg, offset);
} }
static void static void
MemWriteISAC_IPACX(struct IsdnCardState *cs, u8 offset, u8 value) ipacx_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
memwritereg(cs->hw.diva.cfg_reg, offset, value); memwritereg(cs->hw.diva.cfg_reg, offset, value);
} }
static void static void
MemReadISACfifo_IPACX(struct IsdnCardState *cs, u8 * data, int size) ipacx_dc_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
while(size--) while(size--)
*data++ = memreadreg(cs->hw.diva.cfg_reg, 0); *data++ = memreadreg(cs->hw.diva.cfg_reg, 0);
} }
static void static void
MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u8 * data, int size) ipacx_dc_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
while(size--) while(size--)
memwritereg(cs->hw.diva.cfg_reg, 0, *data++); memwritereg(cs->hw.diva.cfg_reg, 0, *data++);
} }
static struct dc_hw_ops mem_ipacx_dc_ops = { static struct dc_hw_ops ipacx_dc_ops = {
.read_reg = MemReadISAC_IPACX, .read_reg = ipacx_dc_read,
.write_reg = MemWriteISAC_IPACX, .write_reg = ipacx_dc_write,
.read_fifo = MemReadISACfifo_IPACX, .read_fifo = ipacx_dc_read_fifo,
.write_fifo = MemWriteISACfifo_IPACX, .write_fifo = ipacx_dc_write_fifo,
}; };
static u8 static u8
...@@ -750,7 +749,7 @@ reset_diva(struct IsdnCardState *cs) ...@@ -750,7 +749,7 @@ reset_diva(struct IsdnCardState *cs)
*ireg = PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET; *ireg = PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET;
set_current_state(TASK_UNINTERRUPTIBLE); set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((10*HZ)/1000); schedule_timeout((10*HZ)/1000);
MemWriteISAC_IPACX(cs, IPACX_MASK, 0xff); // Interrupts off ipacx_dc_write(cs, IPACX_MASK, 0xff); // Interrupts off
} else { /* DIVA 2.0 */ } else { /* DIVA 2.0 */
cs->hw.diva.ctrl_reg = 0; /* Reset On */ cs->hw.diva.ctrl_reg = 0; /* Reset On */
byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
...@@ -1123,12 +1122,12 @@ setup_diva(struct IsdnCard *card) ...@@ -1123,12 +1122,12 @@ setup_diva(struct IsdnCard *card)
val = memreadreg(cs->hw.diva.cfg_reg, IPAC_ID); val = memreadreg(cs->hw.diva.cfg_reg, IPAC_ID);
printk(KERN_INFO "Diva: IPAC version %x\n", val); printk(KERN_INFO "Diva: IPAC version %x\n", val);
} else if (cs->subtyp == DIVA_IPACX_PCI) { } else if (cs->subtyp == DIVA_IPACX_PCI) {
cs->dc_hw_ops = &mem_ipacx_dc_ops; cs->dc_hw_ops = &ipacx_dc_ops;
cs->bc_hw_ops = &mem_ipacx_bc_ops; cs->bc_hw_ops = &mem_ipacx_bc_ops;
cs->BC_Send_Data = &ipacx_fill_fifo; cs->BC_Send_Data = &ipacx_fill_fifo;
cs->irq_func = &diva_irq_ipacx_pci; cs->irq_func = &diva_irq_ipacx_pci;
printk(KERN_INFO "Diva: IPACX Design Id: %x\n", printk(KERN_INFO "Diva: IPACX Design Id: %x\n",
MemReadISAC_IPACX(cs, IPACX_ID) &0x3F); ipacx_dc_read(cs, IPACX_ID) &0x3F);
} else { /* DIVA 2.0 */ } else { /* DIVA 2.0 */
cs->hw.diva.tl.function = (void *) diva_led_handler; cs->hw.diva.tl.function = (void *) diva_led_handler;
cs->hw.diva.tl.data = (long) cs; cs->hw.diva.tl.data = (long) cs;
......
...@@ -188,68 +188,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz ...@@ -188,68 +188,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz
spin_unlock_irqrestore(&elsa_lock, flags); spin_unlock_irqrestore(&elsa_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.elsa.isac, offset); return readreg(cs, cs->hw.elsa.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.elsa.isac, offset, value); writereg(cs, cs->hw.elsa.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs, cs->hw.elsa.isac, 0, data, size); readfifo(cs, cs->hw.elsa.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs, cs->hw.elsa.isac, 0, data, size); writefifo(cs, cs->hw.elsa.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
ReadISAC_IPAC(struct IsdnCardState *cs, u8 offset) ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.elsa.isac, offset+0x80); return readreg(cs, cs->hw.elsa.isac, offset+0x80);
} }
static void static void
WriteISAC_IPAC(struct IsdnCardState *cs, u8 offset, u8 value) ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.elsa.isac, offset|0x80, value); writereg(cs, cs->hw.elsa.isac, offset|0x80, value);
} }
static void static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs, cs->hw.elsa.isac, 0x80, data, size); readfifo(cs, cs->hw.elsa.isac, 0x80, data, size);
} }
static void static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs, cs->hw.elsa.isac, 0x80, data, size); writefifo(cs, cs->hw.elsa.isac, 0x80, data, size);
} }
static struct dc_hw_ops ipac_dc_ops = { static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ReadISAC_IPAC, .read_reg = ipac_dc_read,
.write_reg = WriteISAC_IPAC, .write_reg = ipac_dc_write,
.read_fifo = ReadISACfifo_IPAC, .read_fifo = ipac_dc_read_fifo,
.write_fifo = WriteISACfifo_IPAC, .write_fifo = ipac_dc_write_fifo,
}; };
static u8 static u8
......
...@@ -70,48 +70,46 @@ write_fifo(unsigned int adr, u8 * data, int size) ...@@ -70,48 +70,46 @@ write_fifo(unsigned int adr, u8 * data, int size)
} }
static inline u8 static inline u8
readreg_ipac(unsigned int adr, u_short off) readreg_ipac(struct IsdnCardState *cs, u_short off)
{ {
register u8 ret; register u8 ret;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&gazel_lock, flags); spin_lock_irqsave(&gazel_lock, flags);
byteout(adr, off); byteout(cs->hw.gazel.ipac, off);
ret = bytein(adr + 4); ret = bytein(cs->hw.gazel.ipac + 4);
spin_unlock_irqrestore(&gazel_lock, flags); spin_unlock_irqrestore(&gazel_lock, flags);
return ret; return ret;
} }
static inline void static inline void
writereg_ipac(unsigned int adr, u_short off, u8 data) writereg_ipac(struct IsdnCardState *cs, u_short off, u8 data)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&gazel_lock, flags); spin_lock_irqsave(&gazel_lock, flags);
byteout(adr, off); byteout(cs->hw.gazel.ipac, off);
byteout(adr + 4, data); byteout(cs->hw.gazel.ipac + 4, data);
spin_unlock_irqrestore(&gazel_lock, flags); spin_unlock_irqrestore(&gazel_lock, flags);
} }
static inline void static inline void
read_fifo_ipac(unsigned int adr, u_short off, u8 * data, int size) read_fifo_ipac(struct IsdnCardState *cs, u_short off, u8 * data, int size)
{ {
byteout(adr, off); byteout(cs->hw.gazel.ipac, off);
insb(adr + 4, data, size); insb(cs->hw.gazel.ipac + 4, data, size);
} }
static void static void
write_fifo_ipac(unsigned int adr, u_short off, u8 * data, int size) write_fifo_ipac(struct IsdnCardState *cs, u_short off, u8 * data, int size)
{ {
byteout(adr, off); byteout(cs->hw.gazel.ipac, off);
outsb(adr + 4, data, size); outsb(cs->hw.gazel.ipac + 4, data, size);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
u_short off2 = offset; u_short off2 = offset;
...@@ -122,13 +120,13 @@ ReadISAC(struct IsdnCardState *cs, u8 offset) ...@@ -122,13 +120,13 @@ ReadISAC(struct IsdnCardState *cs, u8 offset)
return (readreg(cs->hw.gazel.isac, off2)); return (readreg(cs->hw.gazel.isac, off2));
case R753: case R753:
case R742: case R742:
return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); return (readreg_ipac(cs, 0x80 + off2));
} }
return 0; return 0;
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
u_short off2 = offset; u_short off2 = offset;
...@@ -140,13 +138,13 @@ WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) ...@@ -140,13 +138,13 @@ WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value)
break; break;
case R753: case R753:
case R742: case R742:
writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); writereg_ipac(cs, 0x80 + off2, value);
break; break;
} }
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
switch (cs->subtyp) { switch (cs->subtyp) {
case R647: case R647:
...@@ -155,13 +153,13 @@ ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) ...@@ -155,13 +153,13 @@ ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size)
break; break;
case R753: case R753:
case R742: case R742:
read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); read_fifo_ipac(cs, 0x80, data, size);
break; break;
} }
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
switch (cs->subtyp) { switch (cs->subtyp) {
case R647: case R647:
...@@ -170,16 +168,16 @@ WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) ...@@ -170,16 +168,16 @@ WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size)
break; break;
case R753: case R753:
case R742: case R742:
write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); write_fifo_ipac(cs, 0x80, data, size);
break; break;
} }
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static void static void
...@@ -192,7 +190,7 @@ ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u8 * data, int size) ...@@ -192,7 +190,7 @@ ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u8 * data, int size)
break; break;
case R753: case R753:
case R742: case R742:
read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); read_fifo_ipac(cs, hscx * 0x40, data, size);
break; break;
} }
} }
...@@ -207,7 +205,7 @@ WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u8 * data, int size) ...@@ -207,7 +205,7 @@ WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u8 * data, int size)
break; break;
case R753: case R753:
case R742: case R742:
write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); write_fifo_ipac(cs, hscx * 0x40, data, size);
break; break;
} }
} }
...@@ -221,10 +219,10 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset) ...@@ -221,10 +219,10 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset)
case R647: case R647:
off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
case R685: case R685:
return (readreg(cs->hw.gazel.hscx[hscx], off2)); return readreg(cs->hw.gazel.hscx[hscx], off2);
case R753: case R753:
case R742: case R742:
return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); return readreg_ipac(cs, hscx * 0x40 + off2);
} }
return 0; return 0;
} }
...@@ -242,7 +240,7 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u8 offset, u8 value) ...@@ -242,7 +240,7 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u8 offset, u8 value)
break; break;
case R753: case R753:
case R742: case R742:
writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); writereg_ipac(cs, hscx * 0x40 + off2, value);
break; break;
} }
} }
...@@ -276,7 +274,7 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -276,7 +274,7 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
valhscx = ReadHSCX(cs, 1, HSCX_ISTA); valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
if (valhscx) if (valhscx)
hscx_int_main(cs, valhscx); hscx_int_main(cs, valhscx);
valisac = ReadISAC(cs, ISAC_ISTA); valisac = isac_read(cs, ISAC_ISTA);
if (valisac) if (valisac)
isac_interrupt(cs, valisac); isac_interrupt(cs, valisac);
count++; count++;
...@@ -284,8 +282,8 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -284,8 +282,8 @@ gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
WriteHSCX(cs, 0, HSCX_MASK, 0xFF); WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
WriteHSCX(cs, 1, HSCX_MASK, 0xFF); WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
WriteISAC(cs, ISAC_MASK, 0xFF); isac_write(cs, ISAC_MASK, 0xFF);
WriteISAC(cs, ISAC_MASK, 0x0); isac_write(cs, ISAC_MASK, 0x0);
WriteHSCX(cs, 0, HSCX_MASK, 0x0); WriteHSCX(cs, 0, HSCX_MASK, 0x0);
WriteHSCX(cs, 1, HSCX_MASK, 0x0); WriteHSCX(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock); spin_unlock(&cs->lock);
...@@ -303,7 +301,7 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs) ...@@ -303,7 +301,7 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "Gazel: Spurious interrupt!\n"); printk(KERN_WARNING "Gazel: Spurious interrupt!\n");
return; return;
} }
ista = ReadISAC(cs, IPAC_ISTA - 0x80); ista = readreg_ipac(cs, IPAC_ISTA);
do { do {
if (ista & 0x0f) { if (ista & 0x0f) {
val = ReadHSCX(cs, 1, HSCX_ISTA); val = ReadHSCX(cs, 1, HSCX_ISTA);
...@@ -318,7 +316,7 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs) ...@@ -318,7 +316,7 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
} }
} }
if (ista & 0x20) { if (ista & 0x20) {
val = 0xfe & ReadISAC(cs, ISAC_ISTA); val = 0xfe & isac_read(cs, ISAC_ISTA);
if (val) { if (val) {
isac_interrupt(cs, val); isac_interrupt(cs, val);
} }
...@@ -327,13 +325,13 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs) ...@@ -327,13 +325,13 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01; val = 0x01;
isac_interrupt(cs, val); isac_interrupt(cs, val);
} }
ista = ReadISAC(cs, IPAC_ISTA - 0x80); ista = readreg_ipac(cs, IPAC_ISTA);
count++; count++;
} }
while ((ista & 0x3f) && (count < MAXCOUNT)); while ((ista & 0x3f) && (count < MAXCOUNT));
WriteISAC(cs, IPAC_MASK - 0x80, 0xFF); writereg_ipac(cs, IPAC_MASK, 0xFF);
WriteISAC(cs, IPAC_MASK - 0x80, 0xC0); writereg_ipac(cs, IPAC_MASK, 0xC0);
} }
void void
release_io_gazel(struct IsdnCardState *cs) release_io_gazel(struct IsdnCardState *cs)
...@@ -393,28 +391,28 @@ reset_gazel(struct IsdnCardState *cs) ...@@ -393,28 +391,28 @@ reset_gazel(struct IsdnCardState *cs)
plxcntrl = inl(addr + PLX_CNTRL); plxcntrl = inl(addr + PLX_CNTRL);
plxcntrl |= (RESET_9050 + RESET_GAZEL); plxcntrl |= (RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL); outl(plxcntrl, addr + PLX_CNTRL);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); writereg_ipac(cs, IPAC_POTA2, 0x20);
HZDELAY(4); HZDELAY(4);
plxcntrl &= ~(RESET_9050 + RESET_GAZEL); plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
outl(plxcntrl, addr + PLX_CNTRL); outl(plxcntrl, addr + PLX_CNTRL);
HZDELAY(10); HZDELAY(10);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); writereg_ipac(cs, IPAC_POTA2, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); writereg_ipac(cs, IPAC_ACFG, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0); writereg_ipac(cs, IPAC_AOE, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff); writereg_ipac(cs, IPAC_MASK, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1); writereg_ipac(cs, IPAC_CONF, 0x1);
outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR); outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); writereg_ipac(cs, IPAC_MASK, 0xc0);
break; break;
case R742: case R742:
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); writereg_ipac(cs, IPAC_POTA2, 0x20);
HZDELAY(4); HZDELAY(4);
WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); writereg_ipac(cs, IPAC_POTA2, 0x00);
WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); writereg_ipac(cs, IPAC_ACFG, 0xff);
WriteISAC(cs, IPAC_AOE - 0x80, 0x0); writereg_ipac(cs, IPAC_AOE, 0x0);
WriteISAC(cs, IPAC_MASK - 0x80, 0xff); writereg_ipac(cs, IPAC_MASK, 0xff);
WriteISAC(cs, IPAC_CONF - 0x80, 0x1); writereg_ipac(cs, IPAC_CONF, 0x1);
WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); writereg_ipac(cs, IPAC_MASK, 0xc0);
break; break;
} }
return (0); return (0);
...@@ -513,13 +511,13 @@ setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs) ...@@ -513,13 +511,13 @@ setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
// R742 decodes address even in not started... // R742 decodes address even in not started...
// R647 returns FF if not present or not started // R647 returns FF if not present or not started
// eventually needs improvment // eventually needs improvment
if (readreg_ipac(card->para[1], IPAC_ID) == 1) cs->hw.gazel.ipac = card->para[1];
if (readreg_ipac(cs, IPAC_ID) == 1)
cs->subtyp = R742; cs->subtyp = R742;
else else
cs->subtyp = R647; cs->subtyp = R647;
cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
cs->hw.gazel.ipac = card->para[1];
cs->hw.gazel.isac = card->para[1] + 0x8000; cs->hw.gazel.isac = card->para[1] + 0x8000;
cs->hw.gazel.hscx[0] = card->para[1]; cs->hw.gazel.hscx[0] = card->para[1];
cs->hw.gazel.hscx[1] = card->para[1] + 0x4000; cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
...@@ -708,7 +706,7 @@ setup_gazel(struct IsdnCard *card) ...@@ -708,7 +706,7 @@ setup_gazel(struct IsdnCard *card)
case R742: case R742:
case R753: case R753:
cs->irq_func = &gazel_interrupt_ipac; cs->irq_func = &gazel_interrupt_ipac;
val = ReadISAC(cs, IPAC_ID - 0x80); val = readreg_ipac(cs, IPAC_ID);
printk(KERN_INFO "Gazel: IPAC version %x\n", val); printk(KERN_INFO "Gazel: IPAC version %x\n", val);
break; break;
} }
......
...@@ -27,12 +27,36 @@ static char *ISACVer[] __devinitdata = ...@@ -27,12 +27,36 @@ static char *ISACVer[] __devinitdata =
{"2086/2186 V1.1", "2085 B1", "2085 B2", {"2086/2186 V1.1", "2085 B1", "2085 B2",
"2085 V2.3"}; "2085 V2.3"};
static inline u8
isac_read(struct IsdnCardState *cs, u8 addr)
{
return cs->dc_hw_ops->read_reg(cs, addr);
}
static inline void
isac_write(struct IsdnCardState *cs, u8 addr, u8 val)
{
cs->dc_hw_ops->write_reg(cs, addr, val);
}
static inline void
isac_read_fifo(struct IsdnCardState *cs, u8 *p, int len)
{
return cs->dc_hw_ops->read_fifo(cs, p, len);
}
static inline void
isac_write_fifo(struct IsdnCardState *cs, u8 *p, int len)
{
return cs->dc_hw_ops->write_fifo(cs, p, len);
}
void void
ISACVersion(struct IsdnCardState *cs, char *s) ISACVersion(struct IsdnCardState *cs, char *s)
{ {
int val; int val;
val = isac_read_reg(cs, ISAC_RBCH); val = isac_read(cs, ISAC_RBCH);
printk(KERN_INFO "%s ISAC version (%x): %s\n", s, val, ISACVer[(val >> 5) & 3]); printk(KERN_INFO "%s ISAC version (%x): %s\n", s, val, ISACVer[(val >> 5) & 3]);
} }
...@@ -41,7 +65,7 @@ ph_command(struct IsdnCardState *cs, unsigned int command) ...@@ -41,7 +65,7 @@ ph_command(struct IsdnCardState *cs, unsigned int command)
{ {
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_command %x", command); debugl1(cs, "ph_command %x", command);
isac_write_reg(cs, ISAC_CIX0, (command << 2) | 3); isac_write(cs, ISAC_CIX0, (command << 2) | 3);
} }
...@@ -125,14 +149,14 @@ isac_empty_fifo(struct IsdnCardState *cs, int count) ...@@ -125,14 +149,14 @@ isac_empty_fifo(struct IsdnCardState *cs, int count)
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "isac_empty_fifo overrun %d", debugl1(cs, "isac_empty_fifo overrun %d",
cs->rcvidx + count); cs->rcvidx + count);
isac_write_reg(cs, ISAC_CMDR, 0x80); isac_write(cs, ISAC_CMDR, 0x80);
cs->rcvidx = 0; cs->rcvidx = 0;
return; return;
} }
ptr = cs->rcvbuf + cs->rcvidx; ptr = cs->rcvbuf + cs->rcvidx;
cs->rcvidx += count; cs->rcvidx += count;
isac_read_fifo(cs, ptr, count); isac_read_fifo(cs, ptr, count);
isac_write_reg(cs, ISAC_CMDR, 0x80); isac_write(cs, ISAC_CMDR, 0x80);
if (cs->debug & L1_DEB_ISAC_FIFO) { if (cs->debug & L1_DEB_ISAC_FIFO) {
char *t = cs->dlog; char *t = cs->dlog;
...@@ -153,7 +177,7 @@ isac_fill_fifo(struct IsdnCardState *cs) ...@@ -153,7 +177,7 @@ isac_fill_fifo(struct IsdnCardState *cs)
return; return;
isac_write_fifo(cs, p, count); isac_write_fifo(cs, p, count);
isac_write_reg(cs, ISAC_CMDR, more ? 0x8 : 0xa); isac_write(cs, ISAC_CMDR, more ? 0x8 : 0xa);
if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
debugl1(cs, "isac_fill_fifo dbusytimer running"); debugl1(cs, "isac_fill_fifo dbusytimer running");
del_timer(&cs->dbusytimer); del_timer(&cs->dbusytimer);
...@@ -173,7 +197,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -173,7 +197,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC interrupt %x", val); debugl1(cs, "ISAC interrupt %x", val);
if (val & 0x80) { /* RME */ if (val & 0x80) { /* RME */
exval = isac_read_reg(cs, ISAC_RSTA); exval = isac_read(cs, ISAC_RSTA);
if ((exval & 0x70) != 0x20) { if ((exval & 0x70) != 0x20) {
if (exval & 0x40) { if (exval & 0x40) {
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
...@@ -189,9 +213,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -189,9 +213,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
cs->err_crc++; cs->err_crc++;
#endif #endif
} }
isac_write_reg(cs, ISAC_CMDR, 0x80); isac_write(cs, ISAC_CMDR, 0x80);
} else { } else {
count = isac_read_reg(cs, ISAC_RBCL) & 0x1f; count = isac_read(cs, ISAC_RBCL) & 0x1f;
if (count == 0) if (count == 0)
count = 32; count = 32;
isac_empty_fifo(cs, count); isac_empty_fifo(cs, count);
...@@ -220,7 +244,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -220,7 +244,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
xmit_xpr_d(cs); xmit_xpr_d(cs);
} }
if (val & 0x04) { /* CISQ */ if (val & 0x04) { /* CISQ */
exval = isac_read_reg(cs, ISAC_CIR0); exval = isac_read(cs, ISAC_CIR0);
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC CIR0 %02X", exval ); debugl1(cs, "ISAC CIR0 %02X", exval );
if (exval & 2) { if (exval & 2) {
...@@ -230,7 +254,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -230,7 +254,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
sched_d_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
} }
if (exval & 1) { if (exval & 1) {
exval = isac_read_reg(cs, ISAC_CIR1); exval = isac_read(cs, ISAC_CIR1);
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC CIR1 %02X", exval ); debugl1(cs, "ISAC CIR1 %02X", exval );
} }
...@@ -241,7 +265,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -241,7 +265,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
debugl1(cs, "ISAC SIN interrupt"); debugl1(cs, "ISAC SIN interrupt");
} }
if (val & 0x01) { /* EXI */ if (val & 0x01) { /* EXI */
exval = isac_read_reg(cs, ISAC_EXIR); exval = isac_read(cs, ISAC_EXIR);
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "ISAC EXIR %02x", exval); debugl1(cs, "ISAC EXIR %02x", exval);
if (exval & 0x80) { /* XMR */ if (exval & 0x80) { /* XMR */
...@@ -252,7 +276,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -252,7 +276,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
xmit_xdu_d(cs, NULL); xmit_xdu_d(cs, NULL);
} }
if (exval & 0x04) { /* MOS */ if (exval & 0x04) { /* MOS */
v1 = isac_read_reg(cs, ISAC_MOSR); v1 = isac_read(cs, ISAC_MOSR);
if (cs->debug & L1_DEB_MONITOR) if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC MOSR %02x", v1); debugl1(cs, "ISAC MOSR %02x", v1);
#if ARCOFI_USE #if ARCOFI_USE
...@@ -263,7 +287,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -263,7 +287,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
debugl1(cs, "ISAC MON RX out of memory!"); debugl1(cs, "ISAC MON RX out of memory!");
cs->dc.isac.mocr &= 0xf0; cs->dc.isac.mocr &= 0xf0;
cs->dc.isac.mocr |= 0x0a; cs->dc.isac.mocr |= 0x0a;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
goto afterMONR0; goto afterMONR0;
} else } else
cs->dc.isac.mon_rxp = 0; cs->dc.isac.mon_rxp = 0;
...@@ -271,18 +295,18 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -271,18 +295,18 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
if (cs->dc.isac.mon_rxp >= MAX_MON_FRAME) { if (cs->dc.isac.mon_rxp >= MAX_MON_FRAME) {
cs->dc.isac.mocr &= 0xf0; cs->dc.isac.mocr &= 0xf0;
cs->dc.isac.mocr |= 0x0a; cs->dc.isac.mocr |= 0x0a;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mon_rxp = 0; cs->dc.isac.mon_rxp = 0;
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "ISAC MON RX overflow!"); debugl1(cs, "ISAC MON RX overflow!");
goto afterMONR0; goto afterMONR0;
} }
cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = isac_read_reg(cs, ISAC_MOR0); cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = isac_read(cs, ISAC_MOR0);
if (cs->debug & L1_DEB_MONITOR) if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]); debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]);
if (cs->dc.isac.mon_rxp == 1) { if (cs->dc.isac.mon_rxp == 1) {
cs->dc.isac.mocr |= 0x04; cs->dc.isac.mocr |= 0x04;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
} }
} }
afterMONR0: afterMONR0:
...@@ -293,7 +317,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -293,7 +317,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
debugl1(cs, "ISAC MON RX out of memory!"); debugl1(cs, "ISAC MON RX out of memory!");
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
goto afterMONR1; goto afterMONR1;
} else } else
cs->dc.isac.mon_rxp = 0; cs->dc.isac.mon_rxp = 0;
...@@ -301,31 +325,31 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -301,31 +325,31 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
if (cs->dc.isac.mon_rxp >= MAX_MON_FRAME) { if (cs->dc.isac.mon_rxp >= MAX_MON_FRAME) {
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mon_rxp = 0; cs->dc.isac.mon_rxp = 0;
if (cs->debug & L1_DEB_WARN) if (cs->debug & L1_DEB_WARN)
debugl1(cs, "ISAC MON RX overflow!"); debugl1(cs, "ISAC MON RX overflow!");
goto afterMONR1; goto afterMONR1;
} }
cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = isac_read_reg(cs, ISAC_MOR1); cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = isac_read(cs, ISAC_MOR1);
if (cs->debug & L1_DEB_MONITOR) if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]); debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]);
cs->dc.isac.mocr |= 0x40; cs->dc.isac.mocr |= 0x40;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
} }
afterMONR1: afterMONR1:
if (v1 & 0x04) { if (v1 & 0x04) {
cs->dc.isac.mocr &= 0xf0; cs->dc.isac.mocr &= 0xf0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0x0a; cs->dc.isac.mocr |= 0x0a;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
sched_d_event(cs, D_RX_MON0); sched_d_event(cs, D_RX_MON0);
} }
if (v1 & 0x40) { if (v1 & 0x40) {
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
sched_d_event(cs, D_RX_MON1); sched_d_event(cs, D_RX_MON1);
} }
if (v1 & 0x02) { if (v1 & 0x02) {
...@@ -333,9 +357,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -333,9 +357,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x08))) { !(v1 & 0x08))) {
cs->dc.isac.mocr &= 0xf0; cs->dc.isac.mocr &= 0xf0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0x0a; cs->dc.isac.mocr |= 0x0a;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc && if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
sched_d_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
...@@ -345,7 +369,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -345,7 +369,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
sched_d_event(cs, D_TX_MON0); sched_d_event(cs, D_TX_MON0);
goto AfterMOX0; goto AfterMOX0;
} }
isac_write_reg(cs, ISAC_MOX0, isac_write(cs, ISAC_MOX0,
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]); cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR) if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]); debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]);
...@@ -356,9 +380,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -356,9 +380,9 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) && (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
!(v1 & 0x80))) { !(v1 & 0x80))) {
cs->dc.isac.mocr &= 0x0f; cs->dc.isac.mocr &= 0x0f;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
cs->dc.isac.mocr |= 0xa0; cs->dc.isac.mocr |= 0xa0;
isac_write_reg(cs, ISAC_MOCR, cs->dc.isac.mocr); isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
if (cs->dc.isac.mon_txc && if (cs->dc.isac.mon_txc &&
(cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
sched_d_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
...@@ -368,7 +392,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val) ...@@ -368,7 +392,7 @@ isac_interrupt(struct IsdnCardState *cs, u8 val)
sched_d_event(cs, D_TX_MON1); sched_d_event(cs, D_TX_MON1);
goto AfterMOX1; goto AfterMOX1;
} }
isac_write_reg(cs, ISAC_MOX1, isac_write(cs, ISAC_MOX1,
cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]); cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
if (cs->debug & L1_DEB_MONITOR) if (cs->debug & L1_DEB_MONITOR)
debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]); debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]);
...@@ -419,19 +443,19 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg) ...@@ -419,19 +443,19 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg)
if (test_bit(HW_IOM1, &cs->HW_Flags)) { if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */ /* IOM 1 Mode */
if (!val) { if (!val) {
isac_write_reg(cs, ISAC_SPCR, 0xa); isac_write(cs, ISAC_SPCR, 0xa);
isac_write_reg(cs, ISAC_ADF1, 0x2); isac_write(cs, ISAC_ADF1, 0x2);
} else { } else {
isac_write_reg(cs, ISAC_SPCR, val); isac_write(cs, ISAC_SPCR, val);
isac_write_reg(cs, ISAC_ADF1, 0xa); isac_write(cs, ISAC_ADF1, 0xa);
} }
} else { } else {
/* IOM 2 Mode */ /* IOM 2 Mode */
isac_write_reg(cs, ISAC_SPCR, val); isac_write(cs, ISAC_SPCR, val);
if (val) if (val)
isac_write_reg(cs, ISAC_ADF1, 0x8); isac_write(cs, ISAC_ADF1, 0x8);
else else
isac_write_reg(cs, ISAC_ADF1, 0x0); isac_write(cs, ISAC_ADF1, 0x0);
} }
break; break;
case (HW_DEACTIVATE | RESPONSE): case (HW_DEACTIVATE | RESPONSE):
...@@ -478,8 +502,8 @@ dbusy_timer_handler(struct IsdnCardState *cs) ...@@ -478,8 +502,8 @@ dbusy_timer_handler(struct IsdnCardState *cs)
int rbch, star; int rbch, star;
if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
rbch = isac_read_reg(cs, ISAC_RBCH); rbch = isac_read(cs, ISAC_RBCH);
star = isac_read_reg(cs, ISAC_STAR); star = isac_read(cs, ISAC_STAR);
if (cs->debug) if (cs->debug)
debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x", debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x",
rbch, star); rbch, star);
...@@ -501,7 +525,7 @@ dbusy_timer_handler(struct IsdnCardState *cs) ...@@ -501,7 +525,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
printk(KERN_WARNING "HiSax: ISAC D-Channel Busy no skb\n"); printk(KERN_WARNING "HiSax: ISAC D-Channel Busy no skb\n");
debugl1(cs, "D-Channel Busy no skb"); debugl1(cs, "D-Channel Busy no skb");
} }
isac_write_reg(cs, ISAC_CMDR, 0x01); /* Transmitter reset */ isac_write(cs, ISAC_CMDR, 0x01); /* Transmitter reset */
cs->irq_func(cs->irq, cs, NULL); cs->irq_func(cs->irq, cs, NULL);
} }
} }
...@@ -512,20 +536,20 @@ initisac(struct IsdnCardState *cs) ...@@ -512,20 +536,20 @@ initisac(struct IsdnCardState *cs)
{ {
int val, eval; int val, eval;
val = isac_read_reg(cs, ISAC_STAR); val = isac_read(cs, ISAC_STAR);
debugl1(cs, "ISAC STAR %x", val); debugl1(cs, "ISAC STAR %x", val);
val = isac_read_reg(cs, ISAC_MODE); val = isac_read(cs, ISAC_MODE);
debugl1(cs, "ISAC MODE %x", val); debugl1(cs, "ISAC MODE %x", val);
val = isac_read_reg(cs, ISAC_ADF2); val = isac_read(cs, ISAC_ADF2);
debugl1(cs, "ISAC ADF2 %x", val); debugl1(cs, "ISAC ADF2 %x", val);
val = isac_read_reg(cs, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
debugl1(cs, "ISAC ISTA %x", val); debugl1(cs, "ISAC ISTA %x", val);
if (val & 0x01) { if (val & 0x01) {
eval = isac_read_reg(cs, ISAC_EXIR); eval = isac_read(cs, ISAC_EXIR);
debugl1(cs, "ISAC EXIR %x", eval); debugl1(cs, "ISAC EXIR %x", eval);
} }
/* Disable all IRQ */ /* Disable all IRQ */
isac_write_reg(cs, ISAC_MASK, 0xFF); isac_write(cs, ISAC_MASK, 0xFF);
INIT_WORK(&cs->work, isac_bh, cs); INIT_WORK(&cs->work, isac_bh, cs);
cs->setstack_d = setstack_isac; cs->setstack_d = setstack_isac;
...@@ -536,35 +560,35 @@ initisac(struct IsdnCardState *cs) ...@@ -536,35 +560,35 @@ initisac(struct IsdnCardState *cs)
cs->dbusytimer.function = (void *) dbusy_timer_handler; cs->dbusytimer.function = (void *) dbusy_timer_handler;
cs->dbusytimer.data = (long) cs; cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer); init_timer(&cs->dbusytimer);
isac_write_reg(cs, ISAC_MASK, 0xff); isac_write(cs, ISAC_MASK, 0xff);
cs->dc.isac.mocr = 0xaa; cs->dc.isac.mocr = 0xaa;
if (test_bit(HW_IOM1, &cs->HW_Flags)) { if (test_bit(HW_IOM1, &cs->HW_Flags)) {
/* IOM 1 Mode */ /* IOM 1 Mode */
isac_write_reg(cs, ISAC_ADF2, 0x0); isac_write(cs, ISAC_ADF2, 0x0);
isac_write_reg(cs, ISAC_SPCR, 0xa); isac_write(cs, ISAC_SPCR, 0xa);
isac_write_reg(cs, ISAC_ADF1, 0x2); isac_write(cs, ISAC_ADF1, 0x2);
isac_write_reg(cs, ISAC_STCR, 0x70); isac_write(cs, ISAC_STCR, 0x70);
isac_write_reg(cs, ISAC_MODE, 0xc9); isac_write(cs, ISAC_MODE, 0xc9);
} else { } else {
/* IOM 2 Mode */ /* IOM 2 Mode */
if (!cs->dc.isac.adf2) if (!cs->dc.isac.adf2)
cs->dc.isac.adf2 = 0x80; cs->dc.isac.adf2 = 0x80;
isac_write_reg(cs, ISAC_ADF2, cs->dc.isac.adf2); isac_write(cs, ISAC_ADF2, cs->dc.isac.adf2);
isac_write_reg(cs, ISAC_SQXR, 0x2f); isac_write(cs, ISAC_SQXR, 0x2f);
isac_write_reg(cs, ISAC_SPCR, 0x00); isac_write(cs, ISAC_SPCR, 0x00);
isac_write_reg(cs, ISAC_STCR, 0x70); isac_write(cs, ISAC_STCR, 0x70);
isac_write_reg(cs, ISAC_MODE, 0xc9); isac_write(cs, ISAC_MODE, 0xc9);
isac_write_reg(cs, ISAC_TIMR, 0x00); isac_write(cs, ISAC_TIMR, 0x00);
isac_write_reg(cs, ISAC_ADF1, 0x00); isac_write(cs, ISAC_ADF1, 0x00);
} }
ph_command(cs, ISAC_CMD_RS); ph_command(cs, ISAC_CMD_RS);
isac_write_reg(cs, ISAC_MASK, 0x0); isac_write(cs, ISAC_MASK, 0x0);
val = isac_read_reg(cs, ISAC_CIR0); val = isac_read(cs, ISAC_CIR0);
debugl1(cs, "ISAC CIR0 %x", val); debugl1(cs, "ISAC CIR0 %x", val);
cs->dc.isac.ph_state = (val >> 2) & 0xf; cs->dc.isac.ph_state = (val >> 2) & 0xf;
sched_d_event(cs, D_L1STATECHANGE); sched_d_event(cs, D_L1STATECHANGE);
/* RESET Receiver and Transmitter */ /* RESET Receiver and Transmitter */
isac_write_reg(cs, ISAC_CMDR, 0x41); isac_write(cs, ISAC_CMDR, 0x41);
} }
...@@ -66,27 +66,3 @@ ...@@ -66,27 +66,3 @@
extern void ISACVersion(struct IsdnCardState *cs, char *s); extern void ISACVersion(struct IsdnCardState *cs, char *s);
extern void initisac(struct IsdnCardState *cs); extern void initisac(struct IsdnCardState *cs);
extern void isac_interrupt(struct IsdnCardState *cs, u8 val); extern void isac_interrupt(struct IsdnCardState *cs, u8 val);
static inline u8
isac_read_reg(struct IsdnCardState *cs, u8 addr)
{
return cs->dc_hw_ops->read_reg(cs, addr);
}
static inline void
isac_write_reg(struct IsdnCardState *cs, u8 addr, u8 val)
{
cs->dc_hw_ops->write_reg(cs, addr, val);
}
static inline void
isac_read_fifo(struct IsdnCardState *cs, u8 *p, int len)
{
return cs->dc_hw_ops->read_fifo(cs, p, len);
}
static inline void
isac_write_fifo(struct IsdnCardState *cs, u8 *p, int len)
{
return cs->dc_hw_ops->write_fifo(cs, p, len);
}
...@@ -87,37 +87,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz ...@@ -87,37 +87,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz
spin_unlock_irqrestore(&ix1_micro_lock, flags); spin_unlock_irqrestore(&ix1_micro_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.ix1.isac, offset); return readreg(cs, cs->hw.ix1.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.ix1.isac, offset, value); writereg(cs, cs->hw.ix1.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.ix1.isac, 0, data, size); readfifo(cs, cs->hw.ix1.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.ix1.isac, 0, data, size); writefifo(cs, cs->hw.ix1.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
......
...@@ -78,37 +78,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz ...@@ -78,37 +78,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz
spin_unlock_irqrestore(&mic_lock, flags); spin_unlock_irqrestore(&mic_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.mic.isac, offset); return readreg(cs, cs->hw.mic.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.mic.isac, offset, value); writereg(cs, cs->hw.mic.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.mic.isac, 0, data, size); readfifo(cs, cs->hw.mic.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.mic.isac, 0, data, size); writefifo(cs, cs->hw.mic.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
......
...@@ -93,37 +93,35 @@ writefifo(unsigned int ale, unsigned int adr, u8 off, u8 * data, int size) ...@@ -93,37 +93,35 @@ writefifo(unsigned int ale, unsigned int adr, u8 off, u8 * data, int size)
spin_unlock_irqrestore(&niccy_lock, flags); spin_unlock_irqrestore(&niccy_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return (readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset)); return readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value); writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{ {
writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
......
...@@ -104,37 +104,35 @@ write_fifo(struct IsdnCardState *cs, signed int adr, u8 * data, int size) ...@@ -104,37 +104,35 @@ write_fifo(struct IsdnCardState *cs, signed int adr, u8 * data, int size)
outb_p(0x1c,padr+2); outb_p(0x1c,padr+2);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.teles3.isac, offset); return readreg(cs, cs->hw.teles3.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.teles3.isac, offset, value); writereg(cs, cs->hw.teles3.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
read_fifo(cs, cs->hw.teles3.isacfifo, data, size); read_fifo(cs, cs->hw.teles3.isacfifo, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
write_fifo(cs, cs->hw.teles3.isacfifo, data, size); write_fifo(cs, cs->hw.teles3.isacfifo, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
......
...@@ -78,37 +78,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 *data, int size ...@@ -78,37 +78,35 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 *data, int size
spin_unlock_irqrestore(&saphir_lock, flags); spin_unlock_irqrestore(&saphir_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.saphir.isac, offset); return readreg(cs, cs->hw.saphir.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.saphir.isac, offset, value); writereg(cs, cs->hw.saphir.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.saphir.isac, 0, data, size); readfifo(cs, cs->hw.saphir.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.saphir.isac, 0, data, size); writefifo(cs, cs->hw.saphir.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
...@@ -186,7 +184,7 @@ static void ...@@ -186,7 +184,7 @@ static void
SaphirWatchDog(struct IsdnCardState *cs) SaphirWatchDog(struct IsdnCardState *cs)
{ {
/* 5 sec WatchDog, so read at least every 4 sec */ /* 5 sec WatchDog, so read at least every 4 sec */
ReadISAC(cs, ISAC_RBCH); isac_read(cs, ISAC_RBCH);
mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ); mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ);
} }
......
...@@ -165,68 +165,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz ...@@ -165,68 +165,66 @@ writefifo(struct IsdnCardState *cs, unsigned int adr, u8 off, u8 * data, int siz
spin_unlock_irqrestore(&sedlbauer_lock, flags); spin_unlock_irqrestore(&sedlbauer_lock, flags);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.sedl.isac, offset); return readreg(cs, cs->hw.sedl.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.sedl.isac, offset, value); writereg(cs, cs->hw.sedl.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.sedl.isac, 0, data, size); readfifo(cs, cs->hw.sedl.isac, 0, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.sedl.isac, 0, data, size); writefifo(cs, cs->hw.sedl.isac, 0, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
ReadISAC_IPAC(struct IsdnCardState *cs, u8 offset) ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{ {
return readreg(cs, cs->hw.sedl.isac, offset|0x80); return readreg(cs, cs->hw.sedl.isac, offset|0x80);
} }
static void static void
WriteISAC_IPAC(struct IsdnCardState *cs, u8 offset, u8 value) ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs, cs->hw.sedl.isac, offset|0x80, value); writereg(cs, cs->hw.sedl.isac, offset|0x80, value);
} }
static void static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
readfifo(cs, cs->hw.sedl.isac, 0x80, data, size); readfifo(cs, cs->hw.sedl.isac, 0x80, data, size);
} }
static void static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u8 * data, int size) ipac_dc_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
writefifo(cs, cs->hw.sedl.isac, 0x80, data, size); writefifo(cs, cs->hw.sedl.isac, 0x80, data, size);
} }
static struct dc_hw_ops ipac_dc_ops = { static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ReadISAC_IPAC, .read_reg = ipac_dc_read,
.write_reg = WriteISAC_IPAC, .write_reg = ipac_dc_write,
.read_fifo = ReadISACfifo_IPAC, .read_fifo = ipac_dc_read_fifo,
.write_fifo = WriteISACfifo_IPAC, .write_fifo = ipac_dc_write_fifo,
}; };
static u8 static u8
......
...@@ -49,37 +49,35 @@ write_fifo(unsigned int adr, u8 * data, int size) ...@@ -49,37 +49,35 @@ write_fifo(unsigned int adr, u8 * data, int size)
outsb(adr, data, size); outsb(adr, data, size);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return (bytein(calc_off(cs->hw.spt.isac, offset))); return bytein(calc_off(cs->hw.spt.isac, offset));
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
byteout(calc_off(cs->hw.spt.isac, offset), value); byteout(calc_off(cs->hw.spt.isac, offset), value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
read_fifo(cs->hw.spt.isac, data, size); read_fifo(cs->hw.spt.isac, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
write_fifo(cs->hw.spt.isac, data, size); write_fifo(cs->hw.spt.isac, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
...@@ -121,7 +119,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -121,7 +119,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
Start_HSCX: Start_HSCX:
if (val) if (val)
hscx_int_main(cs, val); hscx_int_main(cs, val);
val = ReadISAC(cs, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
Start_ISAC: Start_ISAC:
if (val) if (val)
isac_interrupt(cs, val); isac_interrupt(cs, val);
...@@ -131,7 +129,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -131,7 +129,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "HSCX IntStat after IntRoutine"); debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX; goto Start_HSCX;
} }
val = ReadISAC(cs, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
if (val) { if (val) {
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine"); debugl1(cs, "ISAC IntStat after IntRoutine");
......
...@@ -29,19 +29,47 @@ const char *teles0_revision = "$Revision: 2.13.6.2 $"; ...@@ -29,19 +29,47 @@ const char *teles0_revision = "$Revision: 2.13.6.2 $";
#define byteout(addr,val) outb(val,addr) #define byteout(addr,val) outb(val,addr)
#define bytein(addr) inb(addr) #define bytein(addr) inb(addr)
static inline u8 static u8
readisac(unsigned long adr, u8 off) isac_read(struct IsdnCardState *cs, u8 off)
{ {
return readb(adr + ((off & 1) ? 0x2ff : 0x100) + off); return readb(cs->hw.teles0.membase +
((off & 1) ? 0x2ff : 0x100) + off);
} }
static inline void static void
writeisac(unsigned long adr, u8 off, u8 data) isac_write(struct IsdnCardState *cs, u8 off, u8 data)
{ {
writeb(data, adr + ((off & 1) ? 0x2ff : 0x100) + off); mb(); writeb(data, cs->hw.teles0.membase +
((off & 1) ? 0x2ff : 0x100) + off); mb();
} }
static void
isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
int i;
unsigned long ad = cs->hw.teles0.membase + 0x100;
for (i = 0; i < size; i++)
data[i] = readb(ad);
}
static void
isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
int i;
unsigned long ad = cs->hw.teles0.membase + 0x100;
for (i = 0; i < size; i++) {
writeb(data[i], ad); mb();
}
}
static struct dc_hw_ops isac_ops = {
.read_reg = isac_read,
.write_reg = isac_write,
.read_fifo = isac_read_fifo,
.write_fifo = isac_write_fifo,
};
static inline u8 static inline u8
readhscx(unsigned long adr, int hscx, u8 off) readhscx(unsigned long adr, int hscx, u8 off)
{ {
...@@ -56,25 +84,6 @@ writehscx(unsigned long adr, int hscx, u8 off, u8 data) ...@@ -56,25 +84,6 @@ writehscx(unsigned long adr, int hscx, u8 off, u8 data)
((off & 1) ? 0x1ff : 0) + off); mb(); ((off & 1) ? 0x1ff : 0) + off); mb();
} }
static inline void
read_fifo_isac(unsigned long adr, u8 * data, int size)
{
register int i;
register u8 *ad = (u8 *)adr + 0x100;
for (i = 0; i < size; i++)
data[i] = readb(ad);
}
static inline void
write_fifo_isac(unsigned long adr, u8 * data, int size)
{
register int i;
register u8 *ad = (u8 *)adr + 0x100;
for (i = 0; i < size; i++) {
writeb(data[i], ad); mb();
}
}
static inline void static inline void
read_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size) read_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size)
{ {
...@@ -94,39 +103,6 @@ write_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size) ...@@ -94,39 +103,6 @@ write_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size)
} }
} }
/* Interface functions */
static u8
ReadISAC(struct IsdnCardState *cs, u8 offset)
{
return (readisac(cs->hw.teles0.membase, offset));
}
static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value)
{
writeisac(cs->hw.teles0.membase, offset, value);
}
static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
read_fifo_isac(cs->hw.teles0.membase, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
write_fifo_isac(cs->hw.teles0.membase, data, size);
}
static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC,
.write_reg = WriteISAC,
.read_fifo = ReadISACfifo,
.write_fifo = WriteISACfifo,
};
static u8 static u8
ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset) ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset)
{ {
...@@ -167,7 +143,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -167,7 +143,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs)
Start_HSCX: Start_HSCX:
if (val) if (val)
hscx_int_main(cs, val); hscx_int_main(cs, val);
val = readisac(cs->hw.teles0.membase, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
Start_ISAC: Start_ISAC:
if (val) if (val)
isac_interrupt(cs, val); isac_interrupt(cs, val);
...@@ -178,7 +154,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -178,7 +154,7 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "HSCX IntStat after IntRoutine"); debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX; goto Start_HSCX;
} }
val = readisac(cs->hw.teles0.membase, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
if (val && count < 5) { if (val && count < 5) {
if (cs->debug & L1_DEB_ISAC) if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine"); debugl1(cs, "ISAC IntStat after IntRoutine");
...@@ -186,8 +162,8 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -186,8 +162,8 @@ teles0_interrupt(int intno, void *dev_id, struct pt_regs *regs)
} }
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF); writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF); writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF);
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF); isac_write(cs, ISAC_MASK, 0xFF);
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0); isac_write(cs, ISAC_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0); writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0); writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock); spin_unlock(&cs->lock);
......
...@@ -51,37 +51,35 @@ write_fifo(unsigned int adr, u8 * data, int size) ...@@ -51,37 +51,35 @@ write_fifo(unsigned int adr, u8 * data, int size)
outsb(adr, data, size); outsb(adr, data, size);
} }
/* Interface functions */
static u8 static u8
ReadISAC(struct IsdnCardState *cs, u8 offset) isac_read(struct IsdnCardState *cs, u8 offset)
{ {
return (readreg(cs->hw.teles3.isac, offset)); return readreg(cs->hw.teles3.isac, offset);
} }
static void static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value) isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{ {
writereg(cs->hw.teles3.isac, offset, value); writereg(cs->hw.teles3.isac, offset, value);
} }
static void static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
read_fifo(cs->hw.teles3.isacfifo, data, size); read_fifo(cs->hw.teles3.isacfifo, data, size);
} }
static void static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size) isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{ {
write_fifo(cs->hw.teles3.isacfifo, data, size); write_fifo(cs->hw.teles3.isacfifo, data, size);
} }
static struct dc_hw_ops isac_ops = { static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC, .read_reg = isac_read,
.write_reg = WriteISAC, .write_reg = isac_write,
.read_fifo = ReadISACfifo, .read_fifo = isac_read_fifo,
.write_fifo = WriteISACfifo, .write_fifo = isac_write_fifo,
}; };
static u8 static u8
......
...@@ -42,10 +42,11 @@ const char *telespci_revision = "$Revision: 2.16.6.5 $"; ...@@ -42,10 +42,11 @@ const char *telespci_revision = "$Revision: 2.16.6.5 $";
portdata = readl(adr + 0x200); \ portdata = readl(adr + 0x200); \
} while (portdata & ZORAN_PO_RQ_PEN) } while (portdata & ZORAN_PO_RQ_PEN)
static inline u8 static u8
readisac(unsigned long adr, u8 off) isac_read(struct IsdnCardState *cs, u8 off)
{ {
register unsigned int portdata; unsigned long adr = cs->hw.teles0.membase;
unsigned int portdata;
ZORAN_WAIT_NOBUSY; ZORAN_WAIT_NOBUSY;
...@@ -59,10 +60,11 @@ readisac(unsigned long adr, u8 off) ...@@ -59,10 +60,11 @@ readisac(unsigned long adr, u8 off)
return((u8)(portdata & ZORAN_PO_DMASK)); return((u8)(portdata & ZORAN_PO_DMASK));
} }
static inline void static void
writeisac(unsigned long adr, u8 off, u8 data) isac_write(struct IsdnCardState *cs, u8 off, u8 data)
{ {
register unsigned int portdata; unsigned long adr = cs->hw.teles0.membase;
unsigned int portdata;
ZORAN_WAIT_NOBUSY; ZORAN_WAIT_NOBUSY;
...@@ -75,6 +77,50 @@ writeisac(unsigned long adr, u8 off, u8 data) ...@@ -75,6 +77,50 @@ writeisac(unsigned long adr, u8 off, u8 data)
ZORAN_WAIT_NOBUSY; ZORAN_WAIT_NOBUSY;
} }
static void
isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{
unsigned long adr = cs->hw.teles0.membase;
unsigned int portdata;
int i;
ZORAN_WAIT_NOBUSY;
/* read data from ISAC */
for (i = 0; i < size; i++) {
/* set address for ISAC fifo */
writel(WRITE_ADDR_ISAC | 0x1E, adr);
ZORAN_WAIT_NOBUSY;
writel(READ_DATA_ISAC, adr + 0x200);
ZORAN_WAIT_NOBUSY;
data[i] = (u8)(portdata & ZORAN_PO_DMASK);
}
}
static void
isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{
unsigned long adr = cs->hw.teles0.membase;
unsigned int portdata;
int i;
ZORAN_WAIT_NOBUSY;
/* write data to ISAC */
for (i = 0; i < size; i++) {
/* set address for ISAC fifo */
writel(WRITE_ADDR_ISAC | 0x1E, adr);
ZORAN_WAIT_NOBUSY;
writel(WRITE_DATA_ISAC | data[i], adr + 0x200);
ZORAN_WAIT_NOBUSY;
}
}
static struct dc_hw_ops isac_ops = {
.read_reg = isac_read,
.write_reg = isac_write,
.read_fifo = isac_read_fifo,
.write_fifo = isac_write_fifo,
};
static inline u8 static inline u8
readhscx(unsigned long adr, int hscx, u8 off) readhscx(unsigned long adr, int hscx, u8 off)
{ {
...@@ -106,41 +152,6 @@ writehscx(unsigned long adr, int hscx, u8 off, u8 data) ...@@ -106,41 +152,6 @@ writehscx(unsigned long adr, int hscx, u8 off, u8 data)
ZORAN_WAIT_NOBUSY; ZORAN_WAIT_NOBUSY;
} }
static inline void
read_fifo_isac(unsigned long adr, u8 * data, int size)
{
register unsigned int portdata;
register int i;
ZORAN_WAIT_NOBUSY;
/* read data from ISAC */
for (i = 0; i < size; i++) {
/* set address for ISAC fifo */
writel(WRITE_ADDR_ISAC | 0x1E, adr + 0x200);
ZORAN_WAIT_NOBUSY;
writel(READ_DATA_ISAC, adr + 0x200);
ZORAN_WAIT_NOBUSY;
data[i] = (u8)(portdata & ZORAN_PO_DMASK);
}
}
static void
write_fifo_isac(unsigned long adr, u8 * data, int size)
{
register unsigned int portdata;
register int i;
ZORAN_WAIT_NOBUSY;
/* write data to ISAC */
for (i = 0; i < size; i++) {
/* set address for ISAC fifo */
writel(WRITE_ADDR_ISAC | 0x1E, adr + 0x200);
ZORAN_WAIT_NOBUSY;
writel(WRITE_DATA_ISAC | data[i], adr + 0x200);
ZORAN_WAIT_NOBUSY;
}
}
static inline void static inline void
read_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size) read_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size)
{ {
...@@ -177,39 +188,6 @@ write_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size) ...@@ -177,39 +188,6 @@ write_fifo_hscx(unsigned long adr, int hscx, u8 * data, int size)
} }
} }
/* Interface functions */
static u8
ReadISAC(struct IsdnCardState *cs, u8 offset)
{
return (readisac(cs->hw.teles0.membase, offset));
}
static void
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value)
{
writeisac(cs->hw.teles0.membase, offset, value);
}
static void
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
read_fifo_isac(cs->hw.teles0.membase, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
write_fifo_isac(cs->hw.teles0.membase, data, size);
}
static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC,
.write_reg = WriteISAC,
.read_fifo = ReadISACfifo,
.write_fifo = WriteISACfifo,
};
static u8 static u8
ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset) ReadHSCX(struct IsdnCardState *cs, int hscx, u8 offset)
{ {
...@@ -249,7 +227,7 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -249,7 +227,7 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA); val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
if (val) if (val)
hscx_int_main(cs, val); hscx_int_main(cs, val);
val = readisac(cs->hw.teles0.membase, ISAC_ISTA); val = isac_read(cs, ISAC_ISTA);
if (val) if (val)
isac_interrupt(cs, val); isac_interrupt(cs, val);
/* Clear interrupt register for Zoran PCI controller */ /* Clear interrupt register for Zoran PCI controller */
...@@ -257,8 +235,8 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs) ...@@ -257,8 +235,8 @@ telespci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF); writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF); writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF);
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF); isac_write(cs, ISAC_MASK, 0xFF);
writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0); isac_write(cs, ISAC_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0); writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0); writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock); spin_unlock(&cs->lock);
......
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