Commit 32ace039 authored by Andrey Skvortsov's avatar Andrey Skvortsov Committed by Tony Lindgren

ARM: dts: add core2 padconf region for am3517

According to the technical reference manual for AM35xx system
controller module (SCM) PADCONFS core registers are divided in two
regions: 0x48002030..0x48002268 and 0x480025d8..0x480025fc.
First region is the same for all omap3 SoC and is described in omap3.dtsi.
The second region is the same as in omap34xx (see omap34xx.dtsi)
and omap35xx. The patch adds missing description for the second region.
This patch was tested on AM3517.
Signed-off-by: default avatarAndrey Skvortsov <andrej.skvortzov@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 687c2767
...@@ -60,6 +60,17 @@ uart4: serial@4809e000 { ...@@ -60,6 +60,17 @@ uart4: serial@4809e000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
clock-frequency = <48000000>; clock-frequency = <48000000>;
}; };
omap3_pmx_core2: pinmux@480025d8 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x480025d8 0x24>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>;
};
}; };
}; };
......
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