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Commit 344af82c authored by Jes Sorensen's avatar Jes Sorensen Committed by Greg Kroah-Hartman
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staging: rtl8723au: ODM_IC_11N_SERIES is always true for SupportICType 

Signed-off-by: default avatarJes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b3ee999e
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Showing with 75 additions and 82 deletions
drivers/staging/rtl8723au/hal/odm.c
View file @ 344af82c
...@@ -274,18 +274,16 @@ void ODM23a_DMInit(struct dm_odm_t *pDM_Odm) ...@@ -274,18 +274,16 @@ void ODM23a_DMInit(struct dm_odm_t *pDM_Odm)
odm_DIG23aInit(pDM_Odm); odm_DIG23aInit(pDM_Odm);
odm_RateAdaptiveMaskInit23a(pDM_Odm); odm_RateAdaptiveMaskInit23a(pDM_Odm);
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { odm23a_DynBBPSInit(pDM_Odm);
odm23a_DynBBPSInit(pDM_Odm); odm_DynamicTxPower23aInit(pDM_Odm);
odm_DynamicTxPower23aInit(pDM_Odm); odm_TXPowerTrackingInit23a(pDM_Odm);
odm_TXPowerTrackingInit23a(pDM_Odm); ODM_EdcaTurboInit23a(pDM_Odm);
ODM_EdcaTurboInit23a(pDM_Odm); if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) odm_InitHybridAntDiv23a(pDM_Odm);
odm_InitHybridAntDiv23a(pDM_Odm); else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV)
else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) odm_SwAntDivInit(pDM_Odm);
odm_SwAntDivInit(pDM_Odm);
}
} }
/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ /* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */
...@@ -304,7 +302,7 @@ void ODM_DMWatchdog23a(struct dm_odm_t *pDM_Odm) ...@@ -304,7 +302,7 @@ void ODM_DMWatchdog23a(struct dm_odm_t *pDM_Odm)
/* NeilChen--2012--08--24-- */ /* NeilChen--2012--08--24-- */
/* Fix Leave LPS issue */ /* Fix Leave LPS issue */
if ((pDM_Odm->Adapter->pwrctrlpriv.pwr_mode != PS_MODE_ACTIVE) &&/* in LPS mode */ if ((pDM_Odm->Adapter->pwrctrlpriv.pwr_mode != PS_MODE_ACTIVE) &&/* in LPS mode */
(pDM_Odm->SupportICType & (ODM_RTL8723A))) { (pDM_Odm->SupportICType & ODM_RTL8723A)) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG23a is in LPS mode\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG23a is in LPS mode\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n"));
odm_DIG23abyRSSI_LPS(pDM_Odm); odm_DIG23abyRSSI_LPS(pDM_Odm);
...@@ -327,10 +325,8 @@ void ODM_DMWatchdog23a(struct dm_odm_t *pDM_Odm) ...@@ -327,10 +325,8 @@ void ODM_DMWatchdog23a(struct dm_odm_t *pDM_Odm)
else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV)
odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK); odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK);
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ODM_TXPowerTrackingCheck23a(pDM_Odm);
ODM_TXPowerTrackingCheck23a(pDM_Odm); odm_EdcaTurboCheck23a(pDM_Odm);
odm_EdcaTurboCheck23a(pDM_Odm);
}
odm_dtc(pDM_Odm); odm_dtc(pDM_Odm);
} }
...@@ -551,7 +547,7 @@ void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm ...@@ -551,7 +547,7 @@ void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm
{ {
pDM_Odm->bCckHighPower = (bool) ODM_GetBBReg(pDM_Odm, 0x824, BIT(9)); pDM_Odm->bCckHighPower = (bool) ODM_GetBBReg(pDM_Odm, 0x824, BIT(9));
pDM_Odm->RFPathRxEnable = (u8) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); pDM_Odm->RFPathRxEnable = (u8) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F);
if (pDM_Odm->SupportICType & (ODM_RTL8723A)) if (pDM_Odm->SupportICType & ODM_RTL8723A)
pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_InitDebugSetting23a(pDM_Odm); ODM_InitDebugSetting23a(pDM_Odm);
...@@ -655,7 +651,7 @@ void odm_DIG23abyRSSI_LPS(struct dm_odm_t *pDM_Odm) ...@@ -655,7 +651,7 @@ void odm_DIG23abyRSSI_LPS(struct dm_odm_t *pDM_Odm)
u8 bFwCurrentInPSMode = false; u8 bFwCurrentInPSMode = false;
u8 CurrentIGI = pDM_Odm->RSSI_Min; u8 CurrentIGI = pDM_Odm->RSSI_Min;
if (!(pDM_Odm->SupportICType & (ODM_RTL8723A))) if (!(pDM_Odm->SupportICType & ODM_RTL8723A))
return; return;
CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG; CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG;
...@@ -764,7 +760,7 @@ void odm_DIG23a(struct dm_odm_t *pDM_Odm) ...@@ -764,7 +760,7 @@ void odm_DIG23a(struct dm_odm_t *pDM_Odm)
FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
/* 1 Boundary Decision */ /* 1 Boundary Decision */
if ((pDM_Odm->SupportICType & (ODM_RTL8723A)) && if ((pDM_Odm->SupportICType & ODM_RTL8723A) &&
((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) { ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) {
dm_dig_max = DM_DIG_MAX_NIC_HP; dm_dig_max = DM_DIG_MAX_NIC_HP;
dm_dig_min = DM_DIG_MIN_NIC_HP; dm_dig_min = DM_DIG_MIN_NIC_HP;
...@@ -777,7 +773,7 @@ void odm_DIG23a(struct dm_odm_t *pDM_Odm) ...@@ -777,7 +773,7 @@ void odm_DIG23a(struct dm_odm_t *pDM_Odm)
if (pDM_Odm->bLinked) { if (pDM_Odm->bLinked) {
/* 2 8723A Series, offset need to be 10 */ /* 2 8723A Series, offset need to be 10 */
if (pDM_Odm->SupportICType == (ODM_RTL8723A)) { if (pDM_Odm->SupportICType == ODM_RTL8723A) {
/* 2 Upper Bound */ /* 2 Upper Bound */
if ((pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC) if ((pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC)
pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
...@@ -925,32 +921,36 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ...@@ -925,32 +921,36 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
return; return;
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { /* hold ofdm counter */
/* hold ofdm counter */ /* hold page C counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */ /* hold page D counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); ret_value =
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); ret_value =
FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ret_value =
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + ret_value =
FalseAlmCnt->Cnt_Rate_Illegal + ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
FalseAlmCnt->Cnt_Mcs_fail +
FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail +
FalseAlmCnt->Cnt_SB_Search_fail; FalseAlmCnt->Cnt_Rate_Illegal +
/* hold cck counter */ FalseAlmCnt->Cnt_Crc8_fail +
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); FalseAlmCnt->Cnt_Mcs_fail +
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); FalseAlmCnt->Cnt_Fast_Fsync +
FalseAlmCnt->Cnt_SB_Search_fail;
/* hold cck counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
FalseAlmCnt->Cnt_Cck_fail = ret_value; FalseAlmCnt->Cnt_Cck_fail = ret_value;
...@@ -958,7 +958,8 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ...@@ -958,7 +958,8 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8;
ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); FalseAlmCnt->Cnt_CCK_CCA =
((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync +
FalseAlmCnt->Cnt_SB_Search_fail + FalseAlmCnt->Cnt_SB_Search_fail +
...@@ -968,7 +969,8 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ...@@ -968,7 +969,8 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
FalseAlmCnt->Cnt_Mcs_fail + FalseAlmCnt->Cnt_Mcs_fail +
FalseAlmCnt->Cnt_Cck_fail); FalseAlmCnt->Cnt_Cck_fail);
FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; FalseAlmCnt->Cnt_CCA_all =
FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
if (pDM_Odm->SupportICType >= ODM_RTL8723A) { if (pDM_Odm->SupportICType >= ODM_RTL8723A) {
/* reset false alarm counter registers */ /* reset false alarm counter registers */
...@@ -977,8 +979,10 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ...@@ -977,8 +979,10 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1);
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0);
/* update ofdm counter */ /* update ofdm counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0); /* update page C counter */ /* update page C counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0); /* update page D counter */ ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0);
/* update page D counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0);
/* reset CCK CCA counter */ /* reset CCK CCA counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
...@@ -992,26 +996,20 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ...@@ -992,26 +996,20 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
BIT(15) | BIT(14), 2); BIT(15) | BIT(14), 2);
} }
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics23a\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync =%d, Cnt_SB_Search_fail =%d\n", ("Enter odm_FalseAlarmCounterStatistics23a\n"));
FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail =%d, Cnt_Rate_Illegal =%d\n", ("Cnt_Fast_Fsync =%d, Cnt_SB_Search_fail =%d\n",
FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); FalseAlmCnt->Cnt_Fast_Fsync,
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n", FalseAlmCnt->Cnt_SB_Search_fail));
FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
} else { /* FOR ODM_IC_11AC_SERIES */ ("Cnt_Parity_Fail =%d, Cnt_Rate_Illegal =%d\n",
/* read OFDM FA counter */ FalseAlmCnt->Cnt_Parity_Fail,
FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); FalseAlmCnt->Cnt_Rate_Illegal));
FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; ("Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n",
FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
/* reset OFDM FA coutner */
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 1);
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 0);
/* reset CCK FA counter */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT(15), 0);
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT(15), 1);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all));
...@@ -1836,7 +1834,7 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) ...@@ -1836,7 +1834,7 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode)
rSleep, rPMPD_ANAEN, rSleep, rPMPD_ANAEN,
rFPGA0_XCD_SwitchControl, rBlue_Tooth}; rFPGA0_XCD_SwitchControl, rBlue_Tooth};
if (!(pDM_Odm->SupportICType & (ODM_RTL8723A))) if (!(pDM_Odm->SupportICType & ODM_RTL8723A))
return bResult; return bResult;
if (!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) if (!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV))
......
drivers/staging/rtl8723au/include/odm.h
View file @ 344af82c
...@@ -415,10 +415,6 @@ enum odm_ic_type_def { ...@@ -415,10 +415,6 @@ enum odm_ic_type_def {
ODM_RTL8821 = BIT(6), ODM_RTL8821 = BIT(6),
}; };
#define ODM_IC_11N_SERIES \
(ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E)
#define ODM_IC_11AC_SERIES (ODM_RTL8812)
/* ODM_CMNINFO_CUT_VER */ /* ODM_CMNINFO_CUT_VER */
enum odm_cut_version { enum odm_cut_version {
ODM_CUT_A = 1, ODM_CUT_A = 1,
......
drivers/staging/rtl8723au/include/odm_interface.h
View file @ 344af82c
...@@ -33,17 +33,16 @@ ODM_REG(DIG,_pDM_Odm) ...@@ -33,17 +33,16 @@ ODM_REG(DIG,_pDM_Odm)
#define _bit_11N(_name) ODM_BIT_##_name##_11N #define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC #define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#define _cat(_name, _ic_type, _func) \ #define _cat(_name, _func) \
( \ ( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ _func##_11N(_name) \
_func##_11AC(_name) \
) )
/* _name: name of register or bit. */ /* _name: name of register or bit. */
/* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */ /* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */
/* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. */ /* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. */
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) #define ODM_REG(_name, _pDM_Odm) _cat(_name, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _bit)
/* */ /* */
/* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */ /* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */
......
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