Commit 371a689f authored by Andrei Warkentin's avatar Andrei Warkentin Committed by Chris Ball

mmc: MMC boot partitions support.

Allows device MMC boot partitions to be accessed. MMC partitions are
treated effectively as separate block devices on the same MMC card.
Signed-off-by: default avatarAndrei Warkentin <andreiw@motorola.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 1a258db6
...@@ -2,3 +2,5 @@ ...@@ -2,3 +2,5 @@
- this file - this file
mmc-dev-attrs.txt mmc-dev-attrs.txt
- info on SD and MMC device attributes - info on SD and MMC device attributes
mmc-dev-parts.txt
- info on SD and MMC device partitions
SD and MMC Block Device Attributes
==================================
These attributes are defined for the block devices associated with the
SD or MMC device.
The following attributes are read/write.
force_ro Enforce read-only access even if write protect switch is off.
SD and MMC Device Attributes SD and MMC Device Attributes
============================ ============================
......
SD and MMC Device Partitions
============================
Device partitions are additional logical block devices present on the
SD/MMC device.
As of this writing, MMC boot partitions as supported and exposed as
/dev/mmcblkXboot0 and /dev/mmcblkXboot1, where X is the index of the
parent /dev/mmcblkX.
MMC Boot Partitions
===================
Read and write access is provided to the two MMC boot partitions. Due to
the sensitive nature of the boot partition contents, which often store
a bootloader or bootloader configuration tables crucial to booting the
platform, write access is disabled by default to reduce the chance of
accidental bricking.
To enable write access to /dev/mmcblkXbootY, disable the forced read-only
access with:
echo 0 > /sys/block/mmcblkXbootY/force_ro
To re-enable read-only access:
echo 1 > /sys/block/mmcblkXbootY/force_ro
This diff is collapsed.
...@@ -288,7 +288,10 @@ static int mmc_read_ext_csd(struct mmc_card *card) ...@@ -288,7 +288,10 @@ static int mmc_read_ext_csd(struct mmc_card *card)
if (card->ext_csd.rev >= 3) { if (card->ext_csd.rev >= 3) {
u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT]; u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT];
card->ext_csd.bootconfig = ext_csd[EXT_CSD_BOOT_CONFIG]; card->ext_csd.part_config = ext_csd[EXT_CSD_PART_CONFIG];
/* EXT_CSD value is in units of 10ms, but we store in ms */
card->ext_csd.part_time = 10 * ext_csd[EXT_CSD_PART_SWITCH_TIME];
/* Sleep / awake timeout in 100ns units */ /* Sleep / awake timeout in 100ns units */
if (sa_shift > 0 && sa_shift <= 0x17) if (sa_shift > 0 && sa_shift <= 0x17)
...@@ -302,6 +305,12 @@ static int mmc_read_ext_csd(struct mmc_card *card) ...@@ -302,6 +305,12 @@ static int mmc_read_ext_csd(struct mmc_card *card)
ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] << 10; ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] << 10;
card->ext_csd.rel_sectors = ext_csd[EXT_CSD_REL_WR_SEC_C]; card->ext_csd.rel_sectors = ext_csd[EXT_CSD_REL_WR_SEC_C];
/*
* There are two boot regions of equal size, defined in
* multiples of 128K.
*/
card->ext_csd.boot_size = ext_csd[EXT_CSD_BOOT_MULT] << 17;
} }
if (card->ext_csd.rev >= 4) { if (card->ext_csd.rev >= 4) {
...@@ -576,10 +585,13 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, ...@@ -576,10 +585,13 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
/* /*
* Ensure eMMC user default partition is enabled * Ensure eMMC user default partition is enabled
*/ */
if (card->ext_csd.bootconfig & 0x7) { if (card->ext_csd.part_config & EXT_CSD_PART_CONFIG_ACC_MASK) {
card->ext_csd.bootconfig &= ~0x7; card->ext_csd.part_config &= ~EXT_CSD_PART_CONFIG_ACC_MASK;
mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_CONFIG, err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONFIG,
card->ext_csd.bootconfig, 0); card->ext_csd.part_config,
card->ext_csd.part_time);
if (err && err != -EBADMSG)
goto free_card;
} }
/* /*
......
...@@ -48,7 +48,8 @@ struct mmc_ext_csd { ...@@ -48,7 +48,8 @@ struct mmc_ext_csd {
u8 sec_feature_support; u8 sec_feature_support;
u8 rel_sectors; u8 rel_sectors;
u8 rel_param; u8 rel_param;
u8 bootconfig; u8 part_config;
unsigned int part_time; /* Units: ms */
unsigned int sa_timeout; /* Units: 100ns */ unsigned int sa_timeout; /* Units: 100ns */
unsigned int hs_max_dtr; unsigned int hs_max_dtr;
unsigned int sectors; unsigned int sectors;
...@@ -61,6 +62,7 @@ struct mmc_ext_csd { ...@@ -61,6 +62,7 @@ struct mmc_ext_csd {
bool enhanced_area_en; /* enable bit */ bool enhanced_area_en; /* enable bit */
unsigned long long enhanced_area_offset; /* Units: Byte */ unsigned long long enhanced_area_offset; /* Units: Byte */
unsigned int enhanced_area_size; /* Units: KB */ unsigned int enhanced_area_size; /* Units: KB */
unsigned int boot_size; /* in bytes */
}; };
struct sd_scr { struct sd_scr {
......
...@@ -257,19 +257,21 @@ struct _mmc_csd { ...@@ -257,19 +257,21 @@ struct _mmc_csd {
#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ #define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
#define EXT_CSD_WR_REL_PARAM 166 /* RO */ #define EXT_CSD_WR_REL_PARAM 166 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define EXT_CSD_BOOT_CONFIG 179 /* R/W */ #define EXT_CSD_PART_CONFIG 179 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */
#define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_STRUCTURE 194 /* RO */ #define EXT_CSD_STRUCTURE 194 /* RO */
#define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */
#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
#define EXT_CSD_S_A_TIMEOUT 217 /* RO */ #define EXT_CSD_S_A_TIMEOUT 217 /* RO */
#define EXT_CSD_REL_WR_SEC_C 222 /* RO */ #define EXT_CSD_REL_WR_SEC_C 222 /* RO */
#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ #define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
#define EXT_CSD_BOOT_MULT 226 /* RO */
#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ #define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ #define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
...@@ -281,6 +283,10 @@ struct _mmc_csd { ...@@ -281,6 +283,10 @@ struct _mmc_csd {
#define EXT_CSD_WR_REL_PARAM_EN (1<<2) #define EXT_CSD_WR_REL_PARAM_EN (1<<2)
#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
#define EXT_CSD_PART_CONFIG_ACC_BOOT1 (0x2)
#define EXT_CSD_CMD_SET_NORMAL (1<<0) #define EXT_CSD_CMD_SET_NORMAL (1<<0)
#define EXT_CSD_CMD_SET_SECURE (1<<1) #define EXT_CSD_CMD_SET_SECURE (1<<1)
#define EXT_CSD_CMD_SET_CPSECURE (1<<2) #define EXT_CSD_CMD_SET_CPSECURE (1<<2)
......
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