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Commit 384740dc authored by Ralf Baechle's avatar Ralf Baechle
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MIPS: Move headfiles to new location below arch/mips/include 

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e8c7c482
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Showing with 82 additions and 82 deletions
arch/mips/Makefile
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...@@ -170,97 +170,97 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/ ...@@ -170,97 +170,97 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700. # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
# #
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz cflags-$(CONFIG_MACH_JAZZ) += -I$(srctree)/arch/mips/include/asm/mach-jazz
load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
# #
# Common Alchemy Au1x00 stuff # Common Alchemy Au1x00 stuff
# #
core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/ core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/
cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00 cflags-$(CONFIG_SOC_AU1X00) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
# #
# AMD Alchemy Pb1000 eval board # AMD Alchemy Pb1000 eval board
# #
libs-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/pb1000/ libs-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/pb1000/
cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00 cflags-$(CONFIG_MIPS_PB1000) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
# #
# AMD Alchemy Pb1100 eval board # AMD Alchemy Pb1100 eval board
# #
libs-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/pb1100/ libs-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/pb1100/
cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00 cflags-$(CONFIG_MIPS_PB1100) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
# #
# AMD Alchemy Pb1500 eval board # AMD Alchemy Pb1500 eval board
# #
libs-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/pb1500/ libs-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/pb1500/
cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00 cflags-$(CONFIG_MIPS_PB1500) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
# #
# AMD Alchemy Pb1550 eval board # AMD Alchemy Pb1550 eval board
# #
libs-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/pb1550/ libs-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/pb1550/
cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00 cflags-$(CONFIG_MIPS_PB1550) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
# #
# AMD Alchemy Pb1200 eval board # AMD Alchemy Pb1200 eval board
# #
libs-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/pb1200/ libs-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/pb1200/
cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00 cflags-$(CONFIG_MIPS_PB1200) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
# #
# AMD Alchemy Db1000 eval board # AMD Alchemy Db1000 eval board
# #
libs-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_DB1000) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
# #
# AMD Alchemy Db1100 eval board # AMD Alchemy Db1100 eval board
# #
libs-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_DB1100) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
# #
# AMD Alchemy Db1500 eval board # AMD Alchemy Db1500 eval board
# #
libs-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_DB1500) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
# #
# AMD Alchemy Db1550 eval board # AMD Alchemy Db1550 eval board
# #
libs-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
# #
# AMD Alchemy Db1200 eval board # AMD Alchemy Db1200 eval board
# #
libs-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/pb1200/ libs-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/pb1200/
cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
# #
# AMD Alchemy Bosporus eval board # AMD Alchemy Bosporus eval board
# #
libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
# #
# AMD Alchemy Mirage eval board # AMD Alchemy Mirage eval board
# #
libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/db1x00/ libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/db1x00/
cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00 cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
# #
...@@ -279,14 +279,14 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 ...@@ -279,14 +279,14 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
# Cobalt Server # Cobalt Server
# #
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt cflags-$(CONFIG_MIPS_COBALT) += -I$(srctree)/arch/mips/include/asm/mach-cobalt
load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
# #
# DECstation family # DECstation family
# #
core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/ core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec cflags-$(CONFIG_MACH_DECSTATION)+= -I$(srctree)/arch/mips/include/asm/mach-dec
libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/ libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
...@@ -294,7 +294,7 @@ load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 ...@@ -294,7 +294,7 @@ load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
# Wind River PPMC Board (4KC + GT64120) # Wind River PPMC Board (4KC + GT64120)
# #
core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/ core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc
load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
# #
...@@ -302,13 +302,13 @@ load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 ...@@ -302,13 +302,13 @@ load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
# #
core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/ core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000 load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote
# #
# MIPS Malta board # MIPS Malta board
# #
core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/ core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
...@@ -316,14 +316,14 @@ all-$(CONFIG_MIPS_MALTA) := vmlinux.bin ...@@ -316,14 +316,14 @@ all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
# MIPS SIM # MIPS SIM
# #
core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/ core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim cflags-$(CONFIG_MIPS_SIM) += -I$(srctree)/arch/mips/include/asm/mach-mipssim
load-$(CONFIG_MIPS_SIM) += 0x80100000 load-$(CONFIG_MIPS_SIM) += 0x80100000
# #
# PMC-Sierra MSP SOCs # PMC-Sierra MSP SOCs
# #
core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/ core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \ cflags-$(CONFIG_PMC_MSP) += -I$(srctree)/arch/mips/include/asm/pmc-sierra/msp71xx \
-mno-branch-likely -mno-branch-likely
load-$(CONFIG_PMC_MSP) += 0xffffffff80100000 load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
...@@ -331,28 +331,28 @@ load-$(CONFIG_PMC_MSP) += 0xffffffff80100000 ...@@ -331,28 +331,28 @@ load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
# PMC-Sierra Yosemite # PMC-Sierra Yosemite
# #
core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
# #
# Basler eXcite # Basler eXcite
# #
core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000 load-$(CONFIG_BASLER_EXCITE) += 0x80100000
# #
# LASAT platforms # LASAT platforms
# #
core-$(CONFIG_LASAT) += arch/mips/lasat/ core-$(CONFIG_LASAT) += arch/mips/lasat/
cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat cflags-$(CONFIG_LASAT) += -I$(srctree)/arch/mips/include/asm/mach-lasat
load-$(CONFIG_LASAT) += 0xffffffff80000000 load-$(CONFIG_LASAT) += 0xffffffff80000000
# #
# Common VR41xx # Common VR41xx
# #
core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx cflags-$(CONFIG_MACH_VR41XX) += -I$(srctree)/arch/mips/include/asm/mach-vr41xx
# #
# ZAO Networks Capcella (VR4131) # ZAO Networks Capcella (VR4131)
...@@ -385,13 +385,13 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 ...@@ -385,13 +385,13 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
# Common NXP PNX8550 # Common NXP PNX8550
# #
core-$(CONFIG_SOC_PNX8550) += arch/mips/nxp/pnx8550/common/ core-$(CONFIG_SOC_PNX8550) += arch/mips/nxp/pnx8550/common/
cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550 cflags-$(CONFIG_SOC_PNX8550) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
# #
# NXP PNX8550 JBS board # NXP PNX8550 JBS board
# #
libs-$(CONFIG_PNX8550_JBS) += arch/mips/nxp/pnx8550/jbs/ libs-$(CONFIG_PNX8550_JBS) += arch/mips/nxp/pnx8550/jbs/
#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550 #cflags-$(CONFIG_PNX8550_JBS) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
# NXP PNX8550 STB810 board # NXP PNX8550 STB810 board
...@@ -402,7 +402,7 @@ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000 ...@@ -402,7 +402,7 @@ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
# NEC EMMA2RH boards # NEC EMMA2RH boards
# #
core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/ core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
# NEC EMMA2RH Mark-eins # NEC EMMA2RH Mark-eins
core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/ core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
...@@ -418,7 +418,7 @@ load-$(CONFIG_MARKEINS) += 0xffffffff88100000 ...@@ -418,7 +418,7 @@ load-$(CONFIG_MARKEINS) += 0xffffffff88100000
# address by 8kb. # address by 8kb.
# #
core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 cflags-$(CONFIG_SGI_IP22) += -I$(srctree)/arch/mips/include/asm/mach-ip22
ifdef CONFIG_32BIT ifdef CONFIG_32BIT
load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
endif endif
...@@ -435,7 +435,7 @@ endif ...@@ -435,7 +435,7 @@ endif
# #
ifdef CONFIG_SGI_IP27 ifdef CONFIG_SGI_IP27
core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/ core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27 cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
ifdef CONFIG_MAPPED_KERNEL ifdef CONFIG_MAPPED_KERNEL
load-$(CONFIG_SGI_IP27) += 0xc00000004001c000 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
...@@ -460,7 +460,7 @@ ifdef CONFIG_SGI_IP28 ...@@ -460,7 +460,7 @@ ifdef CONFIG_SGI_IP28
endif endif
endif endif
core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/
cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -Iinclude/asm-mips/mach-ip28 cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28
load-$(CONFIG_SGI_IP28) += 0xa800000020004000 load-$(CONFIG_SGI_IP28) += 0xa800000020004000
# #
...@@ -472,7 +472,7 @@ load-$(CONFIG_SGI_IP28) += 0xa800000020004000 ...@@ -472,7 +472,7 @@ load-$(CONFIG_SGI_IP28) += 0xa800000020004000
# will break. # will break.
# #
core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/ core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32 cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
# #
...@@ -484,22 +484,22 @@ load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 ...@@ -484,22 +484,22 @@ load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
# #
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/ core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ cflags-$(CONFIG_SIBYTE_BCM112X) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/ core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ cflags-$(CONFIG_SIBYTE_SB1250) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/ core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ cflags-$(CONFIG_SIBYTE_BCM1x55) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/ core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ cflags-$(CONFIG_SIBYTE_BCM1x80) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
# #
...@@ -529,14 +529,14 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 ...@@ -529,14 +529,14 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
# Broadcom BCM47XX boards # Broadcom BCM47XX boards
# #
core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/ core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx cflags-$(CONFIG_BCM47XX) += -I$(srctree)/arch/mips/include/asm/mach-bcm47xx
load-$(CONFIG_BCM47XX) := 0xffffffff80001000 load-$(CONFIG_BCM47XX) := 0xffffffff80001000
# #
# SNI RM # SNI RM
# #
core-$(CONFIG_SNI_RM) += arch/mips/sni/ core-$(CONFIG_SNI_RM) += arch/mips/sni/
cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm cflags-$(CONFIG_SNI_RM) += -I$(srctree)/arch/mips/include/asm/mach-rm
ifdef CONFIG_CPU_LITTLE_ENDIAN ifdef CONFIG_CPU_LITTLE_ENDIAN
load-$(CONFIG_SNI_RM) += 0xffffffff80600000 load-$(CONFIG_SNI_RM) += 0xffffffff80600000
else else
...@@ -548,10 +548,10 @@ all-$(CONFIG_SNI_RM) := vmlinux.ecoff ...@@ -548,10 +548,10 @@ all-$(CONFIG_SNI_RM) := vmlinux.ecoff
# Common TXx9 # Common TXx9
# #
core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/ core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx cflags-$(CONFIG_MACH_TX39XX) += -I$(srctree)/arch/mips/include/asm/mach-tx39xx
load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000 load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/ core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx cflags-$(CONFIG_MACH_TX49XX) += -I$(srctree)/arch/mips/include/asm/mach-tx49xx
load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000 load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
# #
...@@ -563,7 +563,7 @@ core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/ ...@@ -563,7 +563,7 @@ core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
# Routerboard 532 board # Routerboard 532 board
# #
core-$(CONFIG_MIKROTIK_RB532) += arch/mips/rb532/ core-$(CONFIG_MIKROTIK_RB532) += arch/mips/rb532/
cflags-$(CONFIG_MIKROTIK_RB532) += -Iinclude/asm-mips/mach-rc32434 cflags-$(CONFIG_MIKROTIK_RB532) += -I$(srctree)/arch/mips/include/asm/mach-rc32434
load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000 load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000
# #
...@@ -573,7 +573,7 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ ...@@ -573,7 +573,7 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/ core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/
cflags-y += -Iinclude/asm-mips/mach-generic cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/ drivers-$(CONFIG_PCI) += arch/mips/pci/
ifdef CONFIG_32BIT ifdef CONFIG_32BIT
......
include/asm-mips/mmu_context.h → arch/mips/include/asm/mmu_context.h
View file @ 384740dc
...@@ -220,8 +220,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next) ...@@ -220,8 +220,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
oldasid = read_c0_entryhi() & ASID_MASK; oldasid = read_c0_entryhi() & ASID_MASK;
if(smtc_live_asid[mytlb][oldasid]) { if(smtc_live_asid[mytlb][oldasid]) {
smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu); smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu);
if(smtc_live_asid[mytlb][oldasid] == 0) if(smtc_live_asid[mytlb][oldasid] == 0)
smtc_flush_tlb_asid(oldasid); smtc_flush_tlb_asid(oldasid);
} }
/* See comments for similar code above */ /* See comments for similar code above */
write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
...@@ -285,8 +285,8 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu) ...@@ -285,8 +285,8 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
/* SMTC shares the TLB (and ASIDs) across VPEs */ /* SMTC shares the TLB (and ASIDs) across VPEs */
for_each_online_cpu(i) { for_each_online_cpu(i) {
if((smtc_status & SMTC_TLB_SHARED) if((smtc_status & SMTC_TLB_SHARED)
|| (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id)) || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id))
cpu_context(i, mm) = 0; cpu_context(i, mm) = 0;
} }
#endif /* CONFIG_MIPS_MT_SMTC */ #endif /* CONFIG_MIPS_MT_SMTC */
......
include/asm-mips/sn/klconfig.h → arch/mips/include/asm/sn/klconfig.h
View file @ 384740dc
...@@ -425,7 +425,7 @@ typedef struct lboard_s { ...@@ -425,7 +425,7 @@ typedef struct lboard_s {
unsigned char brd_sversion; /* version of this structure */ unsigned char brd_sversion; /* version of this structure */
unsigned char brd_brevision; /* board revision */ unsigned char brd_brevision; /* board revision */
unsigned char brd_promver; /* board prom version, if any */ unsigned char brd_promver; /* board prom version, if any */
unsigned char brd_flags; /* Enabled, Disabled etc */ unsigned char brd_flags; /* Enabled, Disabled etc */
unsigned char brd_slot; /* slot number */ unsigned char brd_slot; /* slot number */
unsigned short brd_debugsw; /* Debug switches */ unsigned short brd_debugsw; /* Debug switches */
moduleid_t brd_module; /* module to which it belongs */ moduleid_t brd_module; /* module to which it belongs */
...@@ -595,9 +595,9 @@ typedef struct klcpu_s { /* CPU */ ...@@ -595,9 +595,9 @@ typedef struct klcpu_s { /* CPU */
klinfo_t cpu_info; klinfo_t cpu_info;
unsigned short cpu_prid; /* Processor PRID value */ unsigned short cpu_prid; /* Processor PRID value */
unsigned short cpu_fpirr; /* FPU IRR value */ unsigned short cpu_fpirr; /* FPU IRR value */
unsigned short cpu_speed; /* Speed in MHZ */ unsigned short cpu_speed; /* Speed in MHZ */
unsigned short cpu_scachesz; /* secondary cache size in MB */ unsigned short cpu_scachesz; /* secondary cache size in MB */
unsigned short cpu_scachespeed;/* secondary cache speed in MHz */ unsigned short cpu_scachespeed;/* secondary cache speed in MHz */
} klcpu_t ; } klcpu_t ;
#define CPU_STRUCT_VERSION 2 #define CPU_STRUCT_VERSION 2
...@@ -621,7 +621,7 @@ typedef struct klhub_uart_s { /* HUB */ ...@@ -621,7 +621,7 @@ typedef struct klhub_uart_s { /* HUB */
typedef struct klmembnk_s { /* MEMORY BANK */ typedef struct klmembnk_s { /* MEMORY BANK */
klinfo_t membnk_info; klinfo_t membnk_info;
short membnk_memsz; /* Total memory in megabytes */ short membnk_memsz; /* Total memory in megabytes */
short membnk_dimm_select; /* bank to physical addr mapping*/ short membnk_dimm_select; /* bank to physical addr mapping*/
short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */ short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */
short membnk_attr; short membnk_attr;
...@@ -657,7 +657,7 @@ typedef struct klmod_serial_num_s { ...@@ -657,7 +657,7 @@ typedef struct klmod_serial_num_s {
typedef struct klxbow_s { /* XBOW */ typedef struct klxbow_s { /* XBOW */
klinfo_t xbow_info ; klinfo_t xbow_info ;
klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */ klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */
int xbow_master_hub_link; int xbow_master_hub_link;
/* type of brd connected+component struct ptr+flags */ /* type of brd connected+component struct ptr+flags */
} klxbow_t ; } klxbow_t ;
...@@ -673,9 +673,9 @@ typedef struct klpci_device_s { ...@@ -673,9 +673,9 @@ typedef struct klpci_device_s {
typedef struct klbri_s { /* BRIDGE */ typedef struct klbri_s { /* BRIDGE */
klinfo_t bri_info ; klinfo_t bri_info ;
unsigned char bri_eprominfo ; /* IO6prom connected to bridge */ unsigned char bri_eprominfo ; /* IO6prom connected to bridge */
unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */ unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */
pci_t pci_specific ; /* PCI Board config info */ pci_t pci_specific ; /* PCI Board config info */
klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */ klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */
klconf_off_t bri_mfg_nic ; klconf_off_t bri_mfg_nic ;
} klbri_t ; } klbri_t ;
...@@ -684,9 +684,9 @@ typedef struct klbri_s { /* BRIDGE */ ...@@ -684,9 +684,9 @@ typedef struct klbri_s { /* BRIDGE */
typedef struct klioc3_s { /* IOC3 */ typedef struct klioc3_s { /* IOC3 */
klinfo_t ioc3_info ; klinfo_t ioc3_info ;
unsigned char ioc3_ssram ; /* Info about ssram */ unsigned char ioc3_ssram ; /* Info about ssram */
unsigned char ioc3_nvram ; /* Info about nvram */ unsigned char ioc3_nvram ; /* Info about nvram */
klinfo_t ioc3_superio ; /* Info about superio */ klinfo_t ioc3_superio ; /* Info about superio */
klconf_off_t ioc3_tty_off ; klconf_off_t ioc3_tty_off ;
klinfo_t ioc3_enet ; klinfo_t ioc3_enet ;
klconf_off_t ioc3_enet_off ; klconf_off_t ioc3_enet_off ;
...@@ -698,13 +698,13 @@ typedef struct klioc3_s { /* IOC3 */ ...@@ -698,13 +698,13 @@ typedef struct klioc3_s { /* IOC3 */
typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */ typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */
klinfo_t vmeb_info ; klinfo_t vmeb_info ;
vmeb_t vmeb_specific ; vmeb_t vmeb_specific ;
klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
} klvmeb_t ; } klvmeb_t ;
typedef struct klvmed_s { /* VME DEVICE - VME BOARD */ typedef struct klvmed_s { /* VME DEVICE - VME BOARD */
klinfo_t vmed_info ; klinfo_t vmed_info ;
vmed_t vmed_specific ; vmed_t vmed_specific ;
klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
} klvmed_t ; } klvmed_t ;
#define ROUTER_VECTOR_VERS 2 #define ROUTER_VECTOR_VERS 2
...@@ -714,7 +714,7 @@ typedef struct klrou_s { /* ROUTER */ ...@@ -714,7 +714,7 @@ typedef struct klrou_s { /* ROUTER */
klinfo_t rou_info ; klinfo_t rou_info ;
unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */ unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */
nic_t rou_box_nic ; /* nic of the containing module */ nic_t rou_box_nic ; /* nic of the containing module */
klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */ klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
klconf_off_t rou_mfg_nic ; /* MFG NIC string */ klconf_off_t rou_mfg_nic ; /* MFG NIC string */
u64 rou_vector; /* vector from master node */ u64 rou_vector; /* vector from master node */
} klrou_t ; } klrou_t ;
...@@ -769,7 +769,7 @@ typedef struct klgsn_s { /* GSN board */ ...@@ -769,7 +769,7 @@ typedef struct klgsn_s { /* GSN board */
typedef struct klscsi_s { /* SCSI Controller */ typedef struct klscsi_s { /* SCSI Controller */
klinfo_t scsi_info ; klinfo_t scsi_info ;
scsi_t scsi_specific ; scsi_t scsi_specific ;
unsigned char scsi_numdevs ; unsigned char scsi_numdevs ;
klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ; klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ;
} klscsi_t ; } klscsi_t ;
...@@ -803,13 +803,13 @@ typedef struct klmsdev_s { /* mouse device */ ...@@ -803,13 +803,13 @@ typedef struct klmsdev_s { /* mouse device */
typedef struct klfddi_s { /* FDDI */ typedef struct klfddi_s { /* FDDI */
klinfo_t fddi_info ; klinfo_t fddi_info ;
fddi_t fddi_specific ; fddi_t fddi_specific ;
klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ; klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ;
} klfddi_t ; } klfddi_t ;
typedef struct klmio_s { /* MIO */ typedef struct klmio_s { /* MIO */
klinfo_t mio_info ; klinfo_t mio_info ;
mio_t mio_specific ; mio_t mio_specific ;
} klmio_t ; } klmio_t ;
......
include/asm-mips/sn/sn0/hubio.h → arch/mips/include/asm/sn/sn0/hubio.h
View file @ 384740dc
...@@ -175,10 +175,10 @@ typedef union hubii_wid_u { ...@@ -175,10 +175,10 @@ typedef union hubii_wid_u {
u64 wid_reg_value; u64 wid_reg_value;
struct { struct {
u64 wid_rsvd: 32, /* unused */ u64 wid_rsvd: 32, /* unused */
wid_rev_num: 4, /* revision number */ wid_rev_num: 4, /* revision number */
wid_part_num: 16, /* the widget type: hub=c101 */ wid_part_num: 16, /* the widget type: hub=c101 */
wid_mfg_num: 11, /* Manufacturer id (IBM) */ wid_mfg_num: 11, /* Manufacturer id (IBM) */
wid_rsvd1: 1; /* Reserved */ wid_rsvd1: 1; /* Reserved */
} wid_fields_s; } wid_fields_s;
} hubii_wid_t; } hubii_wid_t;
...@@ -187,13 +187,13 @@ typedef union hubii_wcr_u { ...@@ -187,13 +187,13 @@ typedef union hubii_wcr_u {
u64 wcr_reg_value; u64 wcr_reg_value;
struct { struct {
u64 wcr_rsvd: 41, /* unused */ u64 wcr_rsvd: 41, /* unused */
wcr_e_thresh: 5, /* elasticity threshold */ wcr_e_thresh: 5, /* elasticity threshold */
wcr_dir_con: 1, /* widget direct connect */ wcr_dir_con: 1, /* widget direct connect */
wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */ wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
wcr_xbar_crd: 3, /* LLP crossbar credit */ wcr_xbar_crd: 3, /* LLP crossbar credit */
wcr_rsvd1: 8, /* Reserved */ wcr_rsvd1: 8, /* Reserved */
wcr_tag_mode: 1, /* Tag mode */ wcr_tag_mode: 1, /* Tag mode */
wcr_widget_id: 4; /* LLP crossbar credit */ wcr_widget_id: 4; /* LLP crossbar credit */
} wcr_fields_s; } wcr_fields_s;
} hubii_wcr_t; } hubii_wcr_t;
...@@ -220,14 +220,14 @@ typedef union hubii_ilcsr_u { ...@@ -220,14 +220,14 @@ typedef union hubii_ilcsr_u {
u64 icsr_reg_value; u64 icsr_reg_value;
struct { struct {
u64 icsr_rsvd: 22, /* unused */ u64 icsr_rsvd: 22, /* unused */
icsr_max_burst: 10, /* max burst */ icsr_max_burst: 10, /* max burst */
icsr_rsvd4: 6, /* reserved */ icsr_rsvd4: 6, /* reserved */
icsr_max_retry: 10, /* max retry */ icsr_max_retry: 10, /* max retry */
icsr_rsvd3: 2, /* reserved */ icsr_rsvd3: 2, /* reserved */
icsr_lnk_stat: 2, /* link status */ icsr_lnk_stat: 2, /* link status */
icsr_bm8: 1, /* Bit mode 8 */ icsr_bm8: 1, /* Bit mode 8 */
icsr_llp_en: 1, /* LLP enable bit */ icsr_llp_en: 1, /* LLP enable bit */
icsr_rsvd2: 1, /* reserver */ icsr_rsvd2: 1, /* reserver */
icsr_wrm_reset: 1, /* Warm reset bit */ icsr_wrm_reset: 1, /* Warm reset bit */
icsr_rsvd1: 2, /* Data ready offset */ icsr_rsvd1: 2, /* Data ready offset */
icsr_null_to: 6; /* Null timeout */ icsr_null_to: 6; /* Null timeout */
...@@ -240,9 +240,9 @@ typedef union hubii_iowa_u { ...@@ -240,9 +240,9 @@ typedef union hubii_iowa_u {
u64 iowa_reg_value; u64 iowa_reg_value;
struct { struct {
u64 iowa_rsvd: 48, /* unused */ u64 iowa_rsvd: 48, /* unused */
iowa_wxoac: 8, /* xtalk widget access bits */ iowa_wxoac: 8, /* xtalk widget access bits */
iowa_rsvd1: 7, /* xtalk widget access bits */ iowa_rsvd1: 7, /* xtalk widget access bits */
iowa_w0oac: 1; /* xtalk widget access bits */ iowa_w0oac: 1; /* xtalk widget access bits */
} iowa_fields_s; } iowa_fields_s;
} hubii_iowa_t; } hubii_iowa_t;
...@@ -261,7 +261,7 @@ typedef union hubii_illr_u { ...@@ -261,7 +261,7 @@ typedef union hubii_illr_u {
struct { struct {
u64 illr_rsvd: 32, /* unused */ u64 illr_rsvd: 32, /* unused */
illr_cb_cnt: 16, /* checkbit error count */ illr_cb_cnt: 16, /* checkbit error count */
illr_sn_cnt: 16; /* sequence number count */ illr_sn_cnt: 16; /* sequence number count */
} illr_fields_s; } illr_fields_s;
} hubii_illr_t; } hubii_illr_t;
...@@ -275,7 +275,7 @@ typedef union io_perf_sel { ...@@ -275,7 +275,7 @@ typedef union io_perf_sel {
struct { struct {
u64 perf_rsvd : 48, u64 perf_rsvd : 48,
perf_icct : 8, perf_icct : 8,
perf_ippr1 : 4, perf_ippr1 : 4,
perf_ippr0 : 4; perf_ippr0 : 4;
} perf_sel_bits; } perf_sel_bits;
} io_perf_sel_t; } io_perf_sel_t;
...@@ -733,7 +733,7 @@ typedef union hubii_ifdr_u { ...@@ -733,7 +733,7 @@ typedef union hubii_ifdr_u {
u64 ifdr_rsvd: 49, u64 ifdr_rsvd: 49,
ifdr_maxrp: 7, ifdr_maxrp: 7,
ifdr_rsvd1: 1, ifdr_rsvd1: 1,
ifdr_maxrq: 7; ifdr_maxrq: 7;
} hi_ifdr_fields; } hi_ifdr_fields;
} hubii_ifdr_t; } hubii_ifdr_t;
......
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