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Commit 38c16b6b authored by David S. Miller's avatar David S. Miller
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Merge nuts.ninka.net:/home/davem/src/BK/network-2.5 

into nuts.ninka.net:/home/davem/src/BK/net-2.5
parents db58976b ad725933
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Showing with 1398 additions and 480 deletions
arch/sparc/Kconfig
View file @ 38c16b6b
......@@ -1000,6 +1000,13 @@ config DEBUG_SPINLOCK_SLEEP
If you say Y here, various routines which may sleep will become very
noisy if they are called with a spinlock held.
config DEBUG_BUGVERBOSE
bool "Verbose BUG() reporting (adds 70K)"
help
Say Y here to make BUG() panics output the file name and line number
of the BUG call as well as the EIP and oops trace. This aids
debugging but costs about 70-100K of memory.
endmenu
source "security/Kconfig"
......
arch/sparc/defconfig
View file @ 38c16b6b
......@@ -2,7 +2,6 @@
# Automatically generated make config: don't edit
#
CONFIG_MMU=y
CONFIG_SWAP=y
CONFIG_UID16=y
CONFIG_HIGHMEM=y
CONFIG_GENERIC_ISA_DMA=y
......@@ -15,10 +14,11 @@ CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_NET=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
#
# Loadable module support
......@@ -26,6 +26,8 @@ CONFIG_SYSCTL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y
#
......@@ -45,6 +47,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SUN_PM=y
# CONFIG_SUN4 is not set
CONFIG_PCI=y
# CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
CONFIG_SUN_OPENPROMFS=m
CONFIG_KCORE_ELF=y
......@@ -59,15 +62,17 @@ CONFIG_SUNOS_EMUL=y
# CONFIG_PARPORT is not set
#
# Console drivers
# Graphics support
#
# CONFIG_PROM_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB is not set
#
# Frame-buffer support
# Console display driver support
#
# CONFIG_FB is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
# CONFIG_PROM_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Memory Technology Devices (MTD)
......@@ -130,13 +135,43 @@ CONFIG_BLK_DEV_INITRD=y
#
# SCSI support
#
# CONFIG_SCSI is not set
CONFIG_SCSI=y
#
# SCSI support type (disk, tape, CDrom)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=m
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
#
# SCSI low-level drivers
#
CONFIG_SCSI_SUNESP=y
CONFIG_SCSI_QLOGICPTI=m
#
# Fibre Channel support
#
# CONFIG_FC4 is not set
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
......@@ -389,6 +424,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# USB support
#
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
......@@ -407,6 +443,7 @@ CONFIG_DEBUG_SLAB=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_SPINLOCK=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
CONFIG_DEBUG_BUGVERBOSE=y
#
# Security options
......
arch/sparc/kernel/asm-offsets.c
View file @ 38c16b6b
......@@ -22,8 +22,6 @@
int foo(void)
{
DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread));
DEFINE(AOFF_task_ptrace, offsetof(struct task_struct, ptrace));
DEFINE(AOFF_task_blocked, offsetof(struct task_struct, blocked));
BLANK();
/* XXX This is the stuff for sclow.S, kill it. */
DEFINE(AOFF_task_pid, offsetof(struct task_struct, pid));
......
arch/sparc/kernel/entry.S
View file @ 38c16b6b
......@@ -359,11 +359,11 @@ maybe_smp4m_msg:
andcc %o1, %o4, %g0
be,a smp4m_ticker
cmp %l7, 14
cmp %l7, 13
sethi %hi(0x40000000), %o2
add %o5, %o3, %o5
bne,a 1f
sethi %hi(0x40000000), %o2
sethi %hi(0x20000000), %o2
andcc %o1, %o2, %g0
be,a 1f
sethi %hi(0x20000000), %o2
1:
st %o2, [%o5 + 0x4]
WRITE_PAUSE
......@@ -374,7 +374,8 @@ maybe_smp4m_msg:
WRITE_PAUSE
wr %l4, PSR_ET, %psr
WRITE_PAUSE
cmp %l7, 13
srl %o2, (16+14), %o2
tst %o2
bne 2f
nop
call C_LABEL(smp_reschedule_irq)
......@@ -1245,9 +1246,8 @@ C_LABEL(sys_ptrace):
call C_LABEL(do_ptrace)
add %sp, STACKFRAME_SZ, %o0
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1296,9 +1296,8 @@ C_LABEL(sys_sigpause):
call C_LABEL(do_sigpause)
add %sp, STACKFRAME_SZ, %o1
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1315,9 +1314,8 @@ C_LABEL(sys_sigsuspend):
call C_LABEL(do_sigsuspend)
add %sp, STACKFRAME_SZ, %o0
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1335,9 +1333,8 @@ C_LABEL(sys_rt_sigsuspend):
call C_LABEL(do_rt_sigsuspend)
add %sp, STACKFRAME_SZ, %o2
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1354,9 +1351,8 @@ C_LABEL(sys_sigreturn):
call C_LABEL(do_sigreturn)
add %sp, STACKFRAME_SZ, %o0
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1375,9 +1371,8 @@ C_LABEL(sys_rt_sigreturn):
call C_LABEL(do_rt_sigreturn)
add %sp, STACKFRAME_SZ, %o0
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
andcc %l5, 0x02, %g0
ld [%curptr + TI_FLAGS], %l5
andcc %l5, _TIF_SYSCALL_TRACE, %g0
be 1f
nop
......@@ -1511,10 +1506,9 @@ syscall_is_too_hard:
mov %i1, %o1
mov %i2, %o2
ld [%curptr + TI_TASK], %l5
ld [%l5 + AOFF_task_ptrace], %l5
ld [%curptr + TI_FLAGS], %l5
mov %i3, %o3
andcc %l5, 0x02, %g0
andcc %l5, _TIF_SYSCALL_TRACE, %g0
mov %i4, %o4
bne linux_syscall_trace
mov %i0, %l5
......@@ -1526,13 +1520,12 @@ syscall_is_too_hard:
.globl C_LABEL(ret_sys_call)
C_LABEL(ret_sys_call):
ld [%curptr + TI_TASK], %l6
ld [%l6 + AOFF_task_ptrace], %l6
ld [%curptr + TI_FLAGS], %l6
cmp %o0, -ENOIOCTLCMD
ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
set PSR_C, %g2
bgeu 1f
andcc %l6, 0x02, %l6
andcc %l6, _TIF_SYSCALL_TRACE, %g0
/* System call success, clear Carry condition code. */
andn %g3, %g2, %g3
......
arch/sparc/kernel/process.c
View file @ 38c16b6b
......@@ -403,7 +403,6 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
{
unsigned long parent_tid_ptr = 0;
unsigned long child_tid_ptr = 0;
struct task_struct *p;
clone_flags &= ~CLONE_IDLETASK;
......@@ -411,11 +410,10 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
parent_tid_ptr = regs->u_regs[UREG_G2];
child_tid_ptr = regs->u_regs[UREG_G3];
}
p = do_fork(clone_flags, stack_start,
regs, stack_size,
(int *) parent_tid_ptr,
(int *) child_tid_ptr);
return IS_ERR(p) ? PTR_ERR(p) : p->pid;
return do_fork(clone_flags, stack_start,
regs, stack_size,
(int *) parent_tid_ptr,
(int *) child_tid_ptr);
}
/* Copy a Sparc thread. The fork() return value conventions
......
arch/sparc/kernel/ptrace.c
View file @ 38c16b6b
......@@ -521,7 +521,7 @@ asmlinkage void do_ptrace(struct pt_regs *regs)
addr = 1;
case PTRACE_CONT: { /* restart after signal. */
if ((unsigned long) data > _NSIG) {
if (data > _NSIG) {
pt_error_return(regs, EIO);
goto out_tsk;
}
......@@ -545,11 +545,10 @@ asmlinkage void do_ptrace(struct pt_regs *regs)
child->exit_code = data;
#ifdef DEBUG_PTRACE
printk("CONT: %s [%d]: set exit_code = %x %x %x\n", child->comm,
child->pid, child->exit_code,
printk("CONT: %s [%d]: set exit_code = %x %lx %lx\n",
child->comm, child->pid, child->exit_code,
child->thread.kregs->pc,
child->thread.kregs->npc);
#endif
wake_up_process(child);
pt_succ_return(regs, 0);
......
arch/sparc/kernel/sclow.S
View file @ 38c16b6b
......@@ -67,27 +67,6 @@ LABEL(sunosgdtsize):
mov 256, %i0
CC_AND_RETT
.globl LABEL(sunossblock)
LABEL(sunossblock):
LOAD_CURRENT(l4, l5)
ld [%l4 + TI_TASK], %l4
set -65793, %l5
and %i0, %l5, %l5
ld [%l4 + AOFF_task_blocked], %i0
or %i0, %l5, %l5
st %l5, [%l4 + AOFF_task_blocked]
CC_AND_RETT
.globl LABEL(sunossmask)
LABEL(sunossmask):
LOAD_CURRENT(l4, l5)
ld [%l4 + TI_TASK], %l4
set -65793, %l5
and %i0, %l5, %l5
ld [%l4 + AOFF_task_blocked], %i0
st %l5, [%l4 + AOFF_task_blocked]
CC_AND_RETT
.globl LABEL(getpagesize)
LABEL(getpagesize):
set PAGE_SIZE, %i0
......
arch/sparc/kernel/smp.c
View file @ 38c16b6b
......@@ -133,6 +133,16 @@ void __init smp_boot_cpus(void)
smp4d_boot_cpus();
}
void smp_send_reschedule(int cpu)
{
smp_message_pass (cpu, MSG_RESCHEDULE, 0, 0);
}
void smp_send_stop(void)
{
smp_message_pass (MSG_ALL_BUT_SELF, MSG_STOP_CPU, 0, 0);
}
void smp_flush_cache_all(void)
{
xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all));
......
arch/sparc/kernel/sparc_ksyms.c
View file @ 38c16b6b
......@@ -53,6 +53,7 @@
#endif
#include <asm/a.out.h>
#include <asm/io-unit.h>
#include <asm/bug.h>
extern spinlock_t rtc_lock;
......@@ -312,5 +313,9 @@ EXPORT_SYMBOL_DOT(umul);
EXPORT_SYMBOL_DOT(div);
EXPORT_SYMBOL_DOT(udiv);
#ifdef CONFIG_DEBUG_BUGVERBOSE
EXPORT_SYMBOL(do_BUG);
#endif
/* Sun Power Management Idle Handler */
EXPORT_SYMBOL(pm_idle);
arch/sparc/kernel/traps.c
View file @ 38c16b6b
......@@ -463,6 +463,14 @@ void handle_hw_divzero(struct pt_regs *regs, unsigned long pc, unsigned long npc
send_sig_info(SIGFPE, &info, current);
}
#ifdef CONFIG_DEBUG_BUGVERBOSE
void do_BUG(const char *file, int line)
{
// bust_spinlocks(1); XXX Not in our original BUG()
printk("kernel BUG at %s:%d!\n", file, line);
}
#endif
/* Since we have our mappings set up, on multiprocessors we can spin them
* up here so that timer interrupts work during initialization.
*/
......
arch/sparc64/kernel/process.c
View file @ 38c16b6b
......@@ -568,7 +568,6 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
struct pt_regs *regs,
unsigned long stack_size)
{
struct task_struct *p;
unsigned long parent_tid_ptr = 0;
unsigned long child_tid_ptr = 0;
......@@ -583,12 +582,10 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
}
}
p = do_fork(clone_flags, stack_start,
regs, stack_size,
(int *) parent_tid_ptr,
(int *) child_tid_ptr);
return IS_ERR(p) ? PTR_ERR(p) : p->pid;
return do_fork(clone_flags, stack_start,
regs, stack_size,
(int *) parent_tid_ptr,
(int *) child_tid_ptr);
}
/* Copy a Sparc thread. The fork() return value conventions
......
drivers/char/agp/Kconfig
View file @ 38c16b6b
......@@ -29,7 +29,7 @@ config AGP_ALI
tristate "ALI chipset support"
depends on AGP && X86 && !X86_64
---help---
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on the following ALi chipsets. The supported chipsets
include M1541, M1621, M1631, M1632, M1641,M1647,and M1651.
For the ALi-chipset question, ALi suggests you refer to
......@@ -47,25 +47,27 @@ config AGP_AMD
tristate "AMD Irongate, 761, and 762 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on AMD Irongate, 761, and 762 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
config AGP_AMD_8151
tristate "AMD 8151 chipset support"
tristate "AMD Opteron/Athlon64 on-CPU GART support"
depends on AGP && X86
default GART_IOMMU
help
Say Y here to support the AMD 8151 AGP bridge and the builtin
GART on the AMD Athlon64/Opteron ("Hammer") CPUs.
This option gives you AGP support for the GLX component of
XFree86 4.x using the on-CPU AGP bridge of the AMD Athlon64/Opteron CPUs.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N
config AGP_INTEL
tristate "Intel 440LX/BX/GX, I8xx and E7x05 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850, 860
E7205 and E7505 chipsets and full support for the 810, 815, 830M, 845G,
852GM, 855GM and 865G integrated graphics chipsets.
......@@ -78,7 +80,7 @@ config AGP_NVIDIA
tristate "NVIDIA nForce/nForce2 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on the following NVIDIA chipsets. The supported chipsets
include nForce and nForce2
......@@ -86,9 +88,8 @@ config AGP_SIS
tristate "SiS chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the "soon
to be released" XFree86 4.x on Silicon Integrated Systems [SiS]
chipsets.
This option gives you AGP support for the GLX component of
XFree86 4.x on Silicon Integrated Systems [SiS] chipsets.
Note that 5591/5592 AGP chipsets are NOT supported.
......@@ -106,7 +107,7 @@ config AGP_VIA
tristate "VIA chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on VIA MPV3/Apollo Pro chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
......@@ -131,3 +132,10 @@ config AGP_ALPHA_CORE
depends on AGP && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL)
default AGP
config AGP_UNINORTH
tristate "Apple UniNorth AGP support"
depends on AGP && ALL_PPC
help
This option gives you AGP support for Apple machines with a
UniNorth bridge.
drivers/char/agp/Makefile
View file @ 38c16b6b
......@@ -11,5 +11,6 @@ obj-$(CONFIG_AGP_INTEL) += intel-agp.o
obj-$(CONFIG_AGP_NVIDIA) += nvidia-agp.o
obj-$(CONFIG_AGP_SIS) += sis-agp.o
obj-$(CONFIG_AGP_SWORKS) += sworks-agp.o
obj-$(CONFIG_AGP_UNINORTH) += uninorth-agp.o
obj-$(CONFIG_AGP_VIA) += via-agp.o
drivers/char/agp/agp.h
View file @ 38c16b6b
......@@ -113,8 +113,6 @@ struct agp_bridge_driver {
void (*free_by_type)(agp_memory *);
void *(*agp_alloc_page)(void);
void (*agp_destroy_page)(void *);
int (*suspend)(void);
void (*resume)(void);
};
struct agp_bridge_data {
......@@ -384,16 +382,14 @@ agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
void agp_generic_free_by_type(agp_memory * curr);
void *agp_generic_alloc_page(void);
void agp_generic_destroy_page(void *addr);
int agp_generic_suspend(void);
void agp_generic_resume(void);
void agp_free_key(int key);
int agp_num_entries(void);
u32 agp_collect_device_status(u32 mode, u32 command);
void agp_device_command(u32 command, int agp_v3);
int agp_3_0_enable(struct agp_bridge_data *bridge, u32 mode);
int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode);
int agp_3_5_enable(struct agp_bridge_data *bridge);
void global_cache_flush(void);
void get_agp_version(struct agp_bridge_data *bridge);
unsigned long agp_generic_mask_memory(unsigned long addr, int type);
/* Standard agp registers */
#define AGPSTAT 0x4
......
drivers/char/agp/ali-agp.c
View file @ 38c16b6b
......@@ -114,12 +114,6 @@ static int ali_configure(void)
return 0;
}
static unsigned long ali_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void m1541_cache_flush(void)
{
......@@ -180,10 +174,6 @@ static void m1541_destroy_page(void * addr)
/* Setup function */
static struct gatt_mask ali_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
static struct aper_size_info_32 ali_generic_sizes[7] =
{
......@@ -198,7 +188,6 @@ static struct aper_size_info_32 ali_generic_sizes[7] =
struct agp_bridge_driver ali_generic_bridge = {
.owner = THIS_MODULE,
.masks = ali_generic_masks,
.aperture_sizes = ali_generic_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -206,7 +195,8 @@ struct agp_bridge_driver ali_generic_bridge = {
.fetch_size = ali_fetch_size,
.cleanup = ali_cleanup,
.tlb_flush = ali_tlbflush,
.mask_memory = ali_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -217,13 +207,10 @@ struct agp_bridge_driver ali_generic_bridge = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = ali_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver ali_m1541_bridge = {
.owner = THIS_MODULE,
.masks = ali_generic_masks,
.aperture_sizes = ali_generic_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -231,7 +218,8 @@ struct agp_bridge_driver ali_m1541_bridge = {
.fetch_size = ali_fetch_size,
.cleanup = ali_cleanup,
.tlb_flush = ali_tlbflush,
.mask_memory = ali_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = m1541_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -242,8 +230,6 @@ struct agp_bridge_driver ali_m1541_bridge = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = m1541_alloc_page,
.agp_destroy_page = m1541_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
......@@ -391,7 +377,7 @@ static struct pci_device_id agp_ali_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_ali_pci_table);
static struct __initdata pci_driver agp_ali_pci_driver = {
static struct pci_driver agp_ali_pci_driver = {
.name = "agpgart-ali",
.id_table = agp_ali_pci_table,
.probe = agp_ali_probe,
......
drivers/char/agp/alpha-agp.c
View file @ 38c16b6b
......@@ -38,10 +38,6 @@ static struct aper_size_info_fixed alpha_core_agp_sizes[] =
{ 0, 0, 0 }, /* filled in by alpha_core_agp_setup */
};
static struct gatt_mask alpha_core_agp_masks[] = {
{ .mask = 0, .type = 0 },
};
struct vm_operations_struct alpha_core_agp_vm_ops = {
.nopage = alpha_core_agp_vm_nopage,
};
......@@ -78,12 +74,6 @@ static void alpha_core_agp_tlbflush(agp_memory *mem)
alpha_mv.mv_pci_tbi(agp->hose, 0, -1);
}
static unsigned long alpha_core_agp_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void alpha_core_agp_enable(u32 mode)
{
alpha_agp_info *agp = agp_bridge->dev_private_data;
......@@ -127,7 +117,6 @@ static int alpha_core_agp_remove_memory(agp_memory *mem, off_t pg_start,
struct agp_bridge_driver alpha_core_agp_driver = {
.owner = THIS_MODULE,
.masks = alpha_core_agp_masks,
.aperture_sizes = aper_size,
.current_size = aper_size, /* only one entry */
.size_type = FIXED_APER_SIZE,
......@@ -136,7 +125,8 @@ struct agp_bridge_driver alpha_core_agp_driver = {
.fetch_size = alpha_core_agp_fetch_size,
.cleanup = alpha_core_agp_cleanup,
.tlb_flush = alpha_core_agp_tlbflush,
.mask_memory = alpha_core_agp_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = alpha_core_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = alpha_core_agp_nop,
......
drivers/char/agp/amd-k7-agp.c
View file @ 38c16b6b
......@@ -29,9 +29,9 @@ static int amd_create_page_map(struct amd_page_map *page_map)
int i;
page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
if (page_map->real == NULL) {
if (page_map->real == NULL)
return -ENOMEM;
}
SetPageReserved(virt_to_page(page_map->real));
global_cache_flush();
page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real),
......@@ -44,9 +44,8 @@ static int amd_create_page_map(struct amd_page_map *page_map)
}
global_cache_flush();
for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
page_map->remapped[i] = agp_bridge->scratch_page;
}
return 0;
}
......@@ -65,12 +64,11 @@ static void amd_free_gatt_pages(void)
struct amd_page_map *entry;
tables = amd_irongate_private.gatt_pages;
for(i = 0; i < amd_irongate_private.num_tables; i++) {
for (i = 0; i < amd_irongate_private.num_tables; i++) {
entry = tables[i];
if (entry != NULL) {
if (entry->real != NULL) {
if (entry->real != NULL)
amd_free_page_map(entry);
}
kfree(entry);
}
}
......@@ -87,25 +85,27 @@ static int amd_create_gatt_pages(int nr_tables)
tables = kmalloc((nr_tables + 1) * sizeof(struct amd_page_map *),
GFP_KERNEL);
if (tables == NULL) {
if (tables == NULL)
return -ENOMEM;
}
memset(tables, 0, sizeof(struct amd_page_map *) * (nr_tables + 1));
memset (tables, 0, sizeof(struct amd_page_map *) * (nr_tables + 1));
for (i = 0; i < nr_tables; i++) {
entry = kmalloc(sizeof(struct amd_page_map), GFP_KERNEL);
if (entry == NULL) {
retval = -ENOMEM;
break;
}
memset(entry, 0, sizeof(struct amd_page_map));
memset (entry, 0, sizeof(struct amd_page_map));
tables[i] = entry;
retval = amd_create_page_map(entry);
if (retval != 0) break;
if (retval != 0)
break;
}
amd_irongate_private.num_tables = nr_tables;
amd_irongate_private.gatt_pages = tables;
if (retval != 0) amd_free_gatt_pages();
if (retval != 0)
amd_free_gatt_pages();
return retval;
}
......@@ -132,9 +132,8 @@ static int amd_create_gatt_table(void)
value = A_SIZE_LVL2(agp_bridge->current_size);
retval = amd_create_page_map(&page_dir);
if (retval != 0) {
if (retval != 0)
return retval;
}
retval = amd_create_gatt_pages(value->num_entries / 1024);
if (retval != 0) {
......@@ -156,7 +155,7 @@ static int amd_create_gatt_table(void)
agp_bridge->gart_bus_addr = addr;
/* Calculate the agp offset */
for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] =
virt_to_phys(amd_irongate_private.gatt_pages[i]->real);
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001;
......@@ -266,20 +265,12 @@ static void amd_irongate_cleanup(void)
* entries.
*/
static void amd_irongate_tlbflush(agp_memory * temp)
static void amd_irongate_tlbflush(agp_memory *temp)
{
OUTREG32(amd_irongate_private.registers, AMD_TLBFLUSH, 0x00000001);
}
static unsigned long amd_irongate_mask_memory(unsigned long addr, int type)
{
/* Only type 0 is supported by the irongate */
return addr | agp_bridge->driver->masks[0].mask;
}
static int amd_insert_memory(agp_memory * mem,
off_t pg_start, int type)
static int amd_insert_memory(agp_memory * mem, off_t pg_start, int type)
{
int i, j, num_entries;
unsigned long *cur_gatt;
......@@ -287,12 +278,11 @@ static int amd_insert_memory(agp_memory * mem,
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
if (type != 0 || mem->type != 0) {
if (type != 0 || mem->type != 0)
return -EINVAL;
}
if ((pg_start + mem->page_count) > num_entries) {
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
}
j = pg_start;
while (j < (pg_start + mem->page_count)) {
......@@ -312,22 +302,21 @@ static int amd_insert_memory(agp_memory * mem,
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
amd_irongate_mask_memory(mem->memory[i], mem->type);
agp_generic_mask_memory(mem->memory[i], mem->type);
}
amd_irongate_tlbflush(mem);
return 0;
}
static int amd_remove_memory(agp_memory * mem, off_t pg_start,
int type)
static int amd_remove_memory(agp_memory *mem, off_t pg_start, int type)
{
int i;
unsigned long *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0) {
if (type != 0 || mem->type != 0)
return -EINVAL;
}
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
......@@ -352,12 +341,11 @@ static struct aper_size_info_lvl2 amd_irongate_sizes[7] =
static struct gatt_mask amd_irongate_masks[] =
{
{.mask = 0x00000001, .type = 0}
{.mask = 1, .type = 0}
};
struct agp_bridge_driver amd_irongate_driver = {
.owner = THIS_MODULE,
.masks = amd_irongate_masks,
.aperture_sizes = amd_irongate_sizes,
.size_type = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -365,7 +353,8 @@ struct agp_bridge_driver amd_irongate_driver = {
.fetch_size = amd_irongate_fetch_size,
.cleanup = amd_irongate_cleanup,
.tlb_flush = amd_irongate_tlbflush,
.mask_memory = amd_irongate_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = amd_irongate_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = amd_create_gatt_table,
......@@ -376,8 +365,6 @@ struct agp_bridge_driver amd_irongate_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_device_ids amd_agp_device_ids[] __initdata =
......@@ -469,7 +456,7 @@ static struct pci_device_id agp_amdk7_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_amdk7_pci_table);
static struct __initdata pci_driver agp_amdk7_pci_driver = {
static struct pci_driver agp_amdk7_pci_driver = {
.name = "agpgart-amdk7",
.id_table = agp_amdk7_pci_table,
.probe = agp_amdk7_probe,
......
drivers/char/agp/amd-k8-agp.c
View file @ 38c16b6b
......@@ -212,20 +212,13 @@ static void amd_8151_cleanup(void)
}
static unsigned long amd_8151_mask_memory(unsigned long addr, int type)
{
return addr | agp_bridge->driver->masks[0].mask;
}
static struct gatt_mask amd_8151_masks[] =
{
{.mask = 0x00000001, .type = 0}
{ .mask = 1, .type = 0 }
};
struct agp_bridge_driver amd_8151_driver = {
.owner = THIS_MODULE,
.masks = amd_8151_masks,
.aperture_sizes = amd_8151_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -233,7 +226,8 @@ struct agp_bridge_driver amd_8151_driver = {
.fetch_size = amd_x86_64_fetch_size,
.cleanup = amd_8151_cleanup,
.tlb_flush = amd_x86_64_tlbflush,
.mask_memory = amd_8151_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = amd_8151_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -244,8 +238,6 @@ struct agp_bridge_driver amd_8151_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_amdk8_probe(struct pci_dev *pdev,
......@@ -268,9 +260,11 @@ static int __init agp_amdk8_probe(struct pci_dev *pdev,
if (!bridge)
return -ENOMEM;
/* Assume here we have an 8151. (Later this assumption will be fixed). */
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
switch (rev_id) {
if (pdev->vendor == PCI_VENDOR_ID_AMD &&
pdev->device == PCI_DEVICE_ID_AMD_8151_0) {
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
switch (rev_id) {
case 0x01: revstring="A0";
break;
case 0x02: revstring="A1";
......@@ -283,15 +277,16 @@ static int __init agp_amdk8_probe(struct pci_dev *pdev,
break;
default: revstring="??";
break;
}
printk ("Detected AMD 8151 AGP Bridge rev %s", revstring);
/*
* Work around errata.
* Chips before B2 stepping incorrectly reporting v3.5
*/
if (rev_id < 0x13) {
bridge->major_version = 3;
bridge->minor_version = 0;
}
printk ("Detected AMD 8151 AGP Bridge rev %s", revstring);
/*
* Work around errata.
* Chips before B2 stepping incorrectly reporting v3.5
*/
if (rev_id < 0x13) {
bridge->major_version = 3;
bridge->minor_version = 0;
}
}
bridge->driver = &amd_8151_driver;
......@@ -338,12 +333,20 @@ static struct pci_device_id agp_amdk8_pci_table[] __initdata = {
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_K8T400M_0,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_amdk8_pci_table);
static struct __initdata pci_driver agp_amdk8_pci_driver = {
static struct pci_driver agp_amdk8_pci_driver = {
.name = "agpgart-amd-k8",
.id_table = agp_amdk8_pci_table,
.probe = agp_amdk8_probe,
......
drivers/char/agp/backend.c
View file @ 38c16b6b
......@@ -210,19 +210,6 @@ static void agp_backend_cleanup(struct agp_bridge_data *bridge)
phys_to_virt(bridge->scratch_page_real));
}
static int agp_power(struct pm_dev *dev, pm_request_t rq, void *data)
{
switch(rq) {
case PM_SUSPEND:
return agp_bridge->driver->suspend();
case PM_RESUME:
agp_bridge->driver->resume();
return 0;
}
return 0;
}
static const drm_agp_t drm_agp = {
&agp_free_memory,
&agp_allocate_memory,
......@@ -253,34 +240,39 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
int error;
if (!bridge->dev) {
printk(KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
return -EINVAL;
}
if (agp_count) {
printk(KERN_DEBUG PFX
printk (KERN_INFO PFX
"Only one agpgart device currently supported.\n");
return -ENODEV;
}
/* Grab reference on the chipset driver. */
if (!try_module_get(bridge->driver->owner))
if (!try_module_get(bridge->driver->owner)) {
printk (KERN_INFO PFX "Couldn't lock chipset driver.\n");
return -EINVAL;
}
bridge->type = SUPPORTED;
error = agp_backend_initialize(agp_bridge);
if (error)
if (error) {
printk (KERN_INFO PFX "agp_backend_initialize() failed.\n");
goto err_out;
}
error = agp_frontend_initialize();
if (error)
if (error) {
printk (KERN_INFO PFX "agp_frontend_initialize() failed.\n");
goto frontend_err;
}
/* FIXME: What to do with this? */
inter_module_register("drm_agp", THIS_MODULE, &drm_agp);
pm_register(PM_PCI_DEV, PM_PCI_ID(bridge->dev), agp_power);
agp_count++;
return 0;
......@@ -297,7 +289,6 @@ EXPORT_SYMBOL_GPL(agp_add_bridge);
void agp_remove_bridge(struct agp_bridge_data *bridge)
{
bridge->type = NOT_SUPPORTED;
pm_unregister_all(agp_power);
agp_frontend_cleanup();
agp_backend_cleanup(bridge);
inter_module_unregister("drm_agp");
......
drivers/char/agp/generic.c
View file @ 38c16b6b
......@@ -419,7 +419,35 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
if (!((*cmd & AGPSTAT_FW) && (*tmp & AGPSTAT_FW) && (*mode & AGPSTAT_FW)))
*cmd &= ~AGPSTAT_FW;
/* Set speed. */
/*
* Set speed.
* Check for invalid speeds. This can happen when applications
* written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
*/
if (*mode & AGPSTAT_MODE_3_0) {
/*
* Caller hasn't a clue what its doing. We are in 3.0 mode,
* have been passed a 3.0 mode, but with 2.x speed bits set.
* AGP2.x 4x -> AGP3.0 4x.
*/
if (*mode & AGPSTAT2_4X) {
printk (KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
current->comm, *mode);
*mode &= ~AGPSTAT2_4X;
*mode |= AGPSTAT3_4X;
}
} else {
/*
* The caller doesn't know what they are doing. We are in 3.0 mode,
* but have been passed an AGP 2.x mode.
* Convert AGP 1x,2x,4x -> AGP 3.0 4x.
*/
printk (KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
current->comm, *mode);
*mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
*mode |= AGPSTAT3_4X;
}
if (!((*cmd & AGPSTAT3_8X) && (*tmp & AGPSTAT3_8X) && (*mode & AGPSTAT3_8X)))
*cmd &= ~AGPSTAT3_8X;
......@@ -428,9 +456,9 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
/* Clear out unwanted bits. */
if (*cmd & AGPSTAT3_8X)
*cmd *= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
*cmd = ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
if (*cmd & AGPSTAT3_4X)
*cmd *= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
*cmd = ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
}
//FIXME: This doesn't smell right.
......@@ -539,7 +567,7 @@ void agp_generic_enable(u32 mode)
if (agp3 & AGPSTAT_MODE_3_0) {
/* If we have 3.5, we can do the isoch stuff. */
if (agp_bridge->minor_version >= 5)
agp_3_5_enable(agp_bridge, mode);
agp_3_5_enable(agp_bridge);
agp_device_command(command, TRUE);
return;
} else {
......@@ -671,20 +699,6 @@ int agp_generic_create_gatt_table(void)
}
EXPORT_SYMBOL(agp_generic_create_gatt_table);
int agp_generic_suspend(void)
{
return 0;
}
EXPORT_SYMBOL(agp_generic_suspend);
void agp_generic_resume(void)
{
return;
}
EXPORT_SYMBOL(agp_generic_resume);
int agp_generic_free_gatt_table(void)
{
int page_order;
......@@ -922,3 +936,13 @@ void global_cache_flush(void)
}
EXPORT_SYMBOL(global_cache_flush);
unsigned long agp_generic_mask_memory(unsigned long addr, int type)
{
/* memory type is ignored in the generic routine */
if (agp_bridge->driver->masks)
return addr | agp_bridge->driver->masks[0].mask;
else
return addr;
}
EXPORT_SYMBOL(agp_generic_mask_memory);
drivers/char/agp/hp-agp.c
View file @ 38c16b6b
......@@ -330,13 +330,13 @@ static unsigned long hp_zx1_mask_memory(unsigned long addr, int type)
struct agp_bridge_driver hp_zx1_driver = {
.owner = THIS_MODULE,
.masks = hp_zx1_masks,
.size_type = FIXED_APER_SIZE,
.configure = hp_zx1_configure,
.fetch_size = hp_zx1_fetch_size,
.cleanup = hp_zx1_cleanup,
.tlb_flush = hp_zx1_tlbflush,
.mask_memory = hp_zx1_mask_memory,
.masks = hp_zx1_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = hp_zx1_create_gatt_table,
......@@ -400,7 +400,7 @@ static struct pci_device_id agp_hp_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_hp_pci_table);
static struct __initdata pci_driver agp_hp_pci_driver = {
static struct pci_driver agp_hp_pci_driver = {
.name = "agpgart-hp",
.id_table = agp_hp_pci_table,
.probe = agp_hp_probe,
......
drivers/char/agp/i460-agp.c
View file @ 38c16b6b
......@@ -525,7 +525,6 @@ static unsigned long i460_mask_memory (unsigned long addr, int type)
struct agp_bridge_driver intel_i460_driver = {
.owner = THIS_MODULE,
.masks = i460_masks,
.aperture_sizes = i460_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 3,
......@@ -534,6 +533,7 @@ struct agp_bridge_driver intel_i460_driver = {
.cleanup = i460_cleanup,
.tlb_flush = i460_tlb_flush,
.mask_memory = i460_mask_memory,
.masks = i460_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = i460_create_gatt_table,
......@@ -551,8 +551,6 @@ struct agp_bridge_driver intel_i460_driver = {
#endif
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
.cant_use_aperture = 1,
};
......@@ -600,7 +598,7 @@ static struct pci_device_id agp_intel_i460_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table);
static struct __initdata pci_driver agp_intel_i460_pci_driver = {
static struct pci_driver agp_intel_i460_pci_driver = {
.name = "agpgart-intel-i460",
.id_table = agp_intel_i460_pci_table,
.probe = agp_intel_i460_probe,
......
drivers/char/agp/intel-agp.c
View file @ 38c16b6b
......@@ -782,11 +782,6 @@ static int intel_845_configure(void)
return 0;
}
static void intel_845_resume(void)
{
intel_845_configure();
}
static int intel_850_configure(void)
{
u32 temp;
......@@ -902,17 +897,6 @@ static int intel_7505_configure(void)
return 0;
}
static unsigned long intel_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void intel_resume(void)
{
intel_configure();
}
/* Setup function */
static struct gatt_mask intel_generic_masks[] =
{
......@@ -957,7 +941,6 @@ static struct aper_size_info_8 intel_830mp_sizes[4] =
struct agp_bridge_driver intel_generic_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_generic_sizes,
.size_type = U16_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -965,7 +948,8 @@ struct agp_bridge_driver intel_generic_driver = {
.fetch_size = intel_fetch_size,
.cleanup = intel_cleanup,
.tlb_flush = intel_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -976,13 +960,10 @@ struct agp_bridge_driver intel_generic_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = intel_resume,
};
struct agp_bridge_driver intel_810_driver = {
.owner = THIS_MODULE,
.masks = intel_i810_masks,
.aperture_sizes = intel_i810_sizes,
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -992,6 +973,7 @@ struct agp_bridge_driver intel_810_driver = {
.cleanup = intel_i810_cleanup,
.tlb_flush = intel_i810_tlbflush,
.mask_memory = intel_i810_mask_memory,
.masks = intel_i810_masks,
.agp_enable = intel_i810_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1002,14 +984,11 @@ struct agp_bridge_driver intel_810_driver = {
.free_by_type = intel_i810_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_815_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_815_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -1017,7 +996,8 @@ struct agp_bridge_driver intel_815_driver = {
.fetch_size = intel_815_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1028,13 +1008,10 @@ struct agp_bridge_driver intel_815_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_830_driver = {
.owner = THIS_MODULE,
.masks = intel_i810_masks,
.aperture_sizes = intel_i830_sizes,
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -1044,6 +1021,7 @@ struct agp_bridge_driver intel_830_driver = {
.cleanup = intel_i830_cleanup,
.tlb_flush = intel_i810_tlbflush,
.mask_memory = intel_i810_mask_memory,
.masks = intel_i810_masks,
.agp_enable = intel_i810_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = intel_i830_create_gatt_table,
......@@ -1054,14 +1032,11 @@ struct agp_bridge_driver intel_830_driver = {
.free_by_type = intel_i810_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_820_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1069,7 +1044,8 @@ struct agp_bridge_driver intel_820_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_820_cleanup,
.tlb_flush = intel_820_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1080,13 +1056,10 @@ struct agp_bridge_driver intel_820_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_830mp_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_830mp_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 4,
......@@ -1094,7 +1067,8 @@ struct agp_bridge_driver intel_830mp_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1105,13 +1079,10 @@ struct agp_bridge_driver intel_830mp_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_840_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1119,7 +1090,8 @@ struct agp_bridge_driver intel_840_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1130,13 +1102,10 @@ struct agp_bridge_driver intel_840_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_845_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1144,7 +1113,8 @@ struct agp_bridge_driver intel_845_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1155,13 +1125,10 @@ struct agp_bridge_driver intel_845_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = intel_845_resume,
};
struct agp_bridge_driver intel_850_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1169,7 +1136,8 @@ struct agp_bridge_driver intel_850_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1180,13 +1148,10 @@ struct agp_bridge_driver intel_850_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_860_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1194,7 +1159,8 @@ struct agp_bridge_driver intel_860_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1205,13 +1171,10 @@ struct agp_bridge_driver intel_860_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_7505_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1219,7 +1182,8 @@ struct agp_bridge_driver intel_7505_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1230,8 +1194,6 @@ struct agp_bridge_driver intel_7505_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int find_i810(u16 device, const char *name)
......@@ -1436,6 +1398,23 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
agp_put_bridge(bridge);
}
static int agp_intel_suspend(struct pci_dev *dev, u32 state)
{
return 0;
}
static int agp_intel_resume(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
if (bridge->driver == &intel_generic_driver)
intel_configure();
else if (bridge->driver == &intel_845_driver)
intel_845_configure();
return 0;
}
static struct pci_device_id agp_intel_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
......@@ -1450,11 +1429,13 @@ static struct pci_device_id agp_intel_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
static struct __initdata pci_driver agp_intel_pci_driver = {
static struct pci_driver agp_intel_pci_driver = {
.name = "agpgart-intel",
.id_table = agp_intel_pci_table,
.probe = agp_intel_probe,
.remove = agp_intel_remove,
.suspend = agp_intel_suspend,
.resume = agp_intel_resume,
};
/* intel_agp_init() must not be declared static for explicit
......
drivers/char/agp/isoch.c
View file @ 38c16b6b
......@@ -314,7 +314,7 @@ static void agp_3_5_nonisochronous_node_enable(struct agp_bridge_data *bridge,
* Fully configure and enable an AGP 3.0 host bridge and all the devices
* lying behind it.
*/
int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode)
int agp_3_5_enable(struct agp_bridge_data *bridge)
{
struct pci_dev *td = bridge->dev, *dev;
u8 mcapndx;
......@@ -448,6 +448,8 @@ int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode)
printk(KERN_INFO PFX "Something bad happened setting "
"up isochronous xfers. Falling back to "
"non-isochronous xfer mode.\n");
} else {
goto free_and_exit;
}
}
agp_3_5_nonisochronous_node_enable(bridge, dev_list, ndevs);
......
drivers/char/agp/nvidia-agp.c
View file @ 38c16b6b
......@@ -140,13 +140,12 @@ static void nvidia_cleanup(void)
}
static unsigned long nvidia_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
#if 0
/*
* Note we can't use the generic routines, even though they are 99% the same.
* Aperture sizes <64M still requires a full 64k GART directory, but
* only use the portion of the TLB entries that correspond to the apertures
* alignment inside the surrounding 64M block.
*/
extern int agp_memory_reserved;
static int nvidia_insert_memory(agp_memory * mem, off_t pg_start, int type)
......@@ -172,10 +171,11 @@ static int nvidia_insert_memory(agp_memory * mem, off_t pg_start, int type)
for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
agp_bridge->gatt_table[nvidia_private.pg_offset + j] = mem->memory[i];
agp_bridge->tlb_flush(mem);
agp_bridge->driver->tlb_flush(mem);
return 0;
}
static int nvidia_remove_memory(agp_memory * mem, off_t pg_start, int type)
{
int i;
......@@ -188,10 +188,9 @@ static int nvidia_remove_memory(agp_memory * mem, off_t pg_start, int type)
(unsigned long) agp_bridge->scratch_page;
}
agp_bridge->tlb_flush(mem);
agp_bridge->driver->tlb_flush(mem);
return 0;
}
#endif
static void nvidia_tlbflush(agp_memory * mem)
......@@ -238,13 +237,12 @@ static struct aper_size_info_8 nvidia_generic_sizes[5] =
static struct gatt_mask nvidia_generic_masks[] =
{
{0x00000001, 0}
{ .mask = 1, .type = 0}
};
struct agp_bridge_driver nvidia_driver = {
.owner = THIS_MODULE,
.masks = nvidia_generic_masks,
.aperture_sizes = nvidia_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 5,
......@@ -252,19 +250,18 @@ struct agp_bridge_driver nvidia_driver = {
.fetch_size = nvidia_fetch_size,
.cleanup = nvidia_cleanup,
.tlb_flush = nvidia_tlbflush,
.mask_memory = nvidia_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = nvidia_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
.free_gatt_table = agp_generic_free_gatt_table,
.insert_memory = agp_generic_insert_memory,
.remove_memory = agp_generic_remove_memory,
.insert_memory = nvidia_insert_memory,
.remove_memory = nvidia_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_nvidia_probe(struct pci_dev *pdev,
......@@ -354,7 +351,7 @@ static struct pci_device_id agp_nvidia_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_nvidia_pci_table);
static struct __initdata pci_driver agp_nvidia_pci_driver = {
static struct pci_driver agp_nvidia_pci_driver = {
.name = "agpgart-nvidia",
.id_table = agp_nvidia_pci_table,
.probe = agp_nvidia_probe,
......
drivers/char/agp/sis-agp.c
View file @ 38c16b6b
......@@ -63,13 +63,6 @@ static void sis_cleanup(void)
(previous_size->size_value & ~(0x03)));
}
static unsigned long sis_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static struct aper_size_info_8 sis_generic_sizes[7] =
{
{256, 65536, 6, 99},
......@@ -81,14 +74,8 @@ static struct aper_size_info_8 sis_generic_sizes[7] =
{4, 1024, 0, 3}
};
static struct gatt_mask sis_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
struct agp_bridge_driver sis_driver = {
.owner = THIS_MODULE,
.masks = sis_generic_masks,
.aperture_sizes = sis_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -96,7 +83,8 @@ struct agp_bridge_driver sis_driver = {
.fetch_size = sis_fetch_size,
.cleanup = sis_cleanup,
.tlb_flush = sis_tlbflush,
.mask_memory = sis_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -107,8 +95,6 @@ struct agp_bridge_driver sis_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_device_ids sis_agp_device_ids[] __initdata =
......@@ -240,7 +226,7 @@ static struct pci_device_id agp_sis_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_sis_pci_table);
static struct __initdata pci_driver agp_sis_pci_driver = {
static struct pci_driver agp_sis_pci_driver = {
.name = "agpgart-sis",
.id_table = agp_sis_pci_table,
.probe = agp_sis_probe,
......
drivers/char/agp/sworks-agp.c
View file @ 38c16b6b
......@@ -308,13 +308,6 @@ static void serverworks_cleanup(void)
iounmap((void *) serverworks_private.registers);
}
static unsigned long serverworks_mask_memory(unsigned long addr, int type)
{
/* Only type 0 is supported by the serverworks chipsets */
return addr | agp_bridge->driver->masks[0].mask;
}
static int serverworks_insert_memory(agp_memory * mem,
off_t pg_start, int type)
{
......@@ -383,7 +376,7 @@ static int serverworks_remove_memory(agp_memory * mem, off_t pg_start,
static struct gatt_mask serverworks_masks[] =
{
{.mask = 0x00000001, .type = 0}
{.mask = 1, .type = 0}
};
static struct aper_size_info_lvl2 serverworks_sizes[7] =
......@@ -421,7 +414,6 @@ static void serverworks_agp_enable(u32 mode)
struct agp_bridge_driver sworks_driver = {
.owner = THIS_MODULE,
.masks = serverworks_masks,
.aperture_sizes = serverworks_sizes,
.size_type = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -429,7 +421,8 @@ struct agp_bridge_driver sworks_driver = {
.fetch_size = serverworks_fetch_size,
.cleanup = serverworks_cleanup,
.tlb_flush = serverworks_tlbflush,
.mask_memory = serverworks_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = serverworks_masks,
.agp_enable = serverworks_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = serverworks_create_gatt_table,
......@@ -440,8 +433,6 @@ struct agp_bridge_driver sworks_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_serverworks_probe(struct pci_dev *pdev,
......@@ -532,7 +523,7 @@ static struct pci_device_id agp_serverworks_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_serverworks_pci_table);
static struct __initdata pci_driver agp_serverworks_pci_driver = {
static struct pci_driver agp_serverworks_pci_driver = {
.name = "agpgart-serverworks",
.id_table = agp_serverworks_pci_table,
.probe = agp_serverworks_probe,
......
drivers/char/agp/uninorth-agp.c 0 → 100644
View file @ 38c16b6b
/*
* UniNorth AGPGART routines.
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/pagemap.h>
#include <linux/agp_backend.h>
#include <asm/uninorth.h>
#include <asm/pci-bridge.h>
#include "agp.h"
static int agp_try_unsupported __initdata = 0;
static int uninorth_fetch_size(void)
{
int i;
u32 temp;
struct aper_size_info_32 *values;
pci_read_config_dword(agp_bridge->dev, UNI_N_CFG_GART_BASE, &temp);
temp &= ~(0xfffff000);
values = A_SIZE_32(agp_bridge->driver->aperture_sizes);
for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
if (temp == values[i].size_value) {
agp_bridge->previous_size =
agp_bridge->current_size = (void *) (values + i);
agp_bridge->aperture_size_idx = i;
return values[i].size;
}
}
agp_bridge->previous_size =
agp_bridge->current_size = (void *) (values + 1);
agp_bridge->aperture_size_idx = 1;
return values[1].size;
return 0;
}
static void uninorth_tlbflush(agp_memory * mem)
{
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE);
}
static void uninorth_cleanup(void)
{
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
0);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_2xRESET);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
0);
}
static int uninorth_configure(void)
{
struct aper_size_info_32 *current_size;
current_size = A_SIZE_32(agp_bridge->current_size);
printk(KERN_INFO PFX "configuring for size idx: %d\n",
current_size->size_value);
/* aperture size and gatt addr */
pci_write_config_dword(agp_bridge->dev,
UNI_N_CFG_GART_BASE,
(agp_bridge->gatt_bus_addr & 0xfffff000)
| current_size->size_value);
/* HACK ALERT
* UniNorth seem to be buggy enough not to handle properly when
* the AGP aperture isn't mapped at bus physical address 0
*/
agp_bridge->gart_bus_addr = 0;
pci_write_config_dword(agp_bridge->dev,
UNI_N_CFG_AGP_BASE, agp_bridge->gart_bus_addr);
return 0;
}
static int uninorth_insert_memory(agp_memory * mem, off_t pg_start, int type)
{
int i, j, num_entries;
void *temp;
temp = agp_bridge->current_size;
num_entries = A_SIZE_32(temp)->num_entries;
if (type != 0 || mem->type != 0)
/* We know nothing of memory types */
return -EINVAL;
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
j = pg_start;
while (j < (pg_start + mem->page_count)) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
return -EBUSY;
j++;
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
agp_bridge->gatt_table[j] = cpu_to_le32((mem->memory[i] & 0xfffff000) | 0x00000001UL);
flush_dcache_range((unsigned long)__va(mem->memory[i]),
(unsigned long)__va(mem->memory[i])+0x1000);
}
(void)in_le32((volatile u32*)&agp_bridge->gatt_table[pg_start]);
mb();
flush_dcache_range((unsigned long)&agp_bridge->gatt_table[pg_start],
(unsigned long)&agp_bridge->gatt_table[pg_start + mem->page_count]);
uninorth_tlbflush(mem);
return 0;
}
static void uninorth_agp_enable(u32 mode)
{
u32 command, scratch;
int timeout;
pci_read_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_STATUS,
&command);
command = agp_collect_device_status(mode, command);
command |= 0x100;
uninorth_tlbflush(NULL);
timeout = 0;
do {
pci_write_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_COMMAND,
command);
pci_read_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_COMMAND,
&scratch);
} while ((scratch & 0x100) == 0 && ++timeout < 1000);
if ((scratch & 0x100) == 0)
printk(KERN_ERR PFX "failed to write UniNorth AGP command reg\n");
agp_device_command(command, 0);
uninorth_tlbflush(NULL);
}
static int uninorth_create_gatt_table(void)
{
char *table;
char *table_end;
int size;
int page_order;
int num_entries;
int i;
void *temp;
struct page *page;
/* We can't handle 2 level gatt's */
if (agp_bridge->driver->size_type == LVL2_APER_SIZE)
return -EINVAL;
table = NULL;
i = agp_bridge->aperture_size_idx;
temp = agp_bridge->current_size;
size = page_order = num_entries = 0;
do {
size = A_SIZE_32(temp)->size;
page_order = A_SIZE_32(temp)->page_order;
num_entries = A_SIZE_32(temp)->num_entries;
table = (char *) __get_free_pages(GFP_KERNEL, page_order);
if (table == NULL) {
i++;
agp_bridge->current_size = A_IDX32(agp_bridge);
} else {
agp_bridge->aperture_size_idx = i;
}
} while (!table && (i < agp_bridge->driver->num_aperture_sizes));
if (table == NULL)
return -ENOMEM;
table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
SetPageReserved(page);
agp_bridge->gatt_table_real = (u32 *) table;
agp_bridge->gatt_table = (u32 *)table;
agp_bridge->gatt_bus_addr = virt_to_phys(table);
for (i = 0; i < num_entries; i++) {
agp_bridge->gatt_table[i] =
(unsigned long) agp_bridge->scratch_page;
}
flush_dcache_range((unsigned long)table, (unsigned long)table_end);
return 0;
}
static int uninorth_free_gatt_table(void)
{
int page_order;
char *table, *table_end;
void *temp;
struct page *page;
temp = agp_bridge->current_size;
page_order = A_SIZE_32(temp)->page_order;
/* Do not worry about freeing memory, because if this is
* called, then all agp memory is deallocated and removed
* from the table.
*/
table = (char *) agp_bridge->gatt_table_real;
table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
ClearPageReserved(page);
free_pages((unsigned long) agp_bridge->gatt_table_real, page_order);
return 0;
}
void null_cache_flush(void)
{
mb();
}
/* Setup function */
static struct aper_size_info_32 uninorth_sizes[7] =
{
#if 0 /* Not sure uninorth supports that high aperture sizes */
{256, 65536, 6, 64},
{128, 32768, 5, 32},
{64, 16384, 4, 16},
#endif
{32, 8192, 3, 8},
{16, 4096, 2, 4},
{8, 2048, 1, 2},
{4, 1024, 0, 1}
};
struct agp_bridge_driver uninorth_agp_driver = {
.owner = THIS_MODULE,
.aperture_sizes = (void *)uninorth_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 4,
.configure = uninorth_configure,
.fetch_size = uninorth_fetch_size,
.cleanup = uninorth_cleanup,
.tlb_flush = uninorth_tlbflush,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.cache_flush = null_cache_flush,
.agp_enable = uninorth_agp_enable,
.create_gatt_table = uninorth_create_gatt_table,
.free_gatt_table = uninorth_free_gatt_table,
.insert_memory = uninorth_insert_memory,
.remove_memory = agp_generic_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
.cant_use_aperture = 1,
};
struct agp_device_ids uninorth_agp_device_ids[] __initdata = {
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP,
.chipset_name = "UniNorth",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP_P,
.chipset_name = "UniNorth/Pangea",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP15,
.chipset_name = "UniNorth 1.5",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP2,
.chipset_name = "UniNorth 2",
},
};
static int __init agp_uninorth_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct agp_device_ids *devs = uninorth_agp_device_ids;
struct agp_bridge_data *bridge;
u8 cap_ptr;
int j;
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
for (j = 0; devs[j].chipset_name != NULL; ++j) {
if (pdev->device == devs[j].device_id) {
printk(KERN_INFO PFX "Detected Apple %s chipset\n",
devs[j].chipset_name);
goto found;
}
}
if (!agp_try_unsupported) {
printk(KERN_ERR PFX "Unsupported Apple chipset"
" (device id: %04x).\n", pdev->device);
printk(KERN_ERR PFX "You might want to try"
" agp_try_unsupported=1\n");
return -ENODEV;
}
printk(KERN_ERR PFX "Trying generic Uninorth routines"
" for device id %04x\n", pdev->device);
found:
bridge = agp_alloc_bridge();
if (!bridge)
return -ENOMEM;
bridge->driver = &uninorth_agp_driver;
bridge->dev = pdev;
bridge->capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(pdev, cap_ptr+PCI_AGP_STATUS, &bridge->mode);
pci_set_drvdata(pdev, bridge);
return agp_add_bridge(bridge);
}
static void __devexit agp_uninorth_remove(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
agp_remove_bridge(bridge);
agp_put_bridge(bridge);
}
static struct pci_device_id agp_uninorth_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_APPLE,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_uninorth_pci_table);
static struct pci_driver agp_uninorth_pci_driver = {
.name = "agpgart-uninorth",
.id_table = agp_uninorth_pci_table,
.probe = agp_uninorth_probe,
.remove = agp_uninorth_remove,
};
static int __init agp_uninorth_init(void)
{
return pci_module_init(&agp_uninorth_pci_driver);
}
static void __exit agp_uninorth_cleanup(void)
{
pci_unregister_driver(&agp_uninorth_pci_driver);
}
module_init(agp_uninorth_init);
module_exit(agp_uninorth_cleanup);
MODULE_PARM(agp_try_unsupported, "1i");
MODULE_AUTHOR("Ben Herrenschmidt & Paul Mackerras");
MODULE_LICENSE("GPL");
drivers/char/agp/via-agp.c
View file @ 38c16b6b
......@@ -75,14 +75,6 @@ static void via_tlbflush(agp_memory * mem)
}
static unsigned long via_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static struct aper_size_info_8 via_generic_sizes[7] =
{
{256, 65536, 6, 0},
......@@ -95,12 +87,6 @@ static struct aper_size_info_8 via_generic_sizes[7] =
};
static struct gatt_mask via_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
static int via_fetch_size_agp3(void)
{
int i;
......@@ -176,7 +162,6 @@ static struct aper_size_info_16 via_generic_agp3_sizes[11] =
struct agp_bridge_driver via_agp3_driver = {
.owner = THIS_MODULE,
.masks = via_generic_masks,
.aperture_sizes = via_generic_agp3_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 10,
......@@ -184,7 +169,8 @@ struct agp_bridge_driver via_agp3_driver = {
.fetch_size = via_fetch_size_agp3,
.cleanup = via_cleanup_agp3,
.tlb_flush = via_tlbflush_agp3,
.mask_memory = via_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -195,13 +181,10 @@ struct agp_bridge_driver via_agp3_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver via_driver = {
.owner = THIS_MODULE,
.masks = via_generic_masks,
.aperture_sizes = via_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -209,7 +192,8 @@ struct agp_bridge_driver via_driver = {
.fetch_size = via_fetch_size,
.cleanup = via_cleanup,
.tlb_flush = via_tlbflush,
.mask_memory = via_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -220,8 +204,6 @@ struct agp_bridge_driver via_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static struct agp_device_ids via_agp_device_ids[] __initdata =
......@@ -402,6 +384,7 @@ static int __init agp_via_probe(struct pci_dev *pdev,
bridge->dev = pdev;
bridge->capndx = cap_ptr;
bridge->driver = &via_driver;
switch (pdev->device) {
case PCI_DEVICE_ID_VIA_8367_0:
......@@ -427,7 +410,6 @@ static int __init agp_via_probe(struct pci_dev *pdev,
}
/*FALLTHROUGH*/
default:
bridge->driver = &via_driver;
break;
}
......@@ -466,7 +448,7 @@ static struct pci_device_id agp_via_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
static struct __initdata pci_driver agp_via_pci_driver = {
static struct pci_driver agp_via_pci_driver = {
.name = "agpgart-via",
.id_table = agp_via_pci_table,
.probe = agp_via_probe,
......
drivers/i2c/busses/Kconfig
View file @ 38c16b6b
......@@ -117,6 +117,31 @@ config I2C_PIIX4
http://www.lm-sensors.nu
config I2C_SIS96X
tristate " SiS 96x"
depends on I2C && PCI && EXPERIMENTAL
help
If you say yes to this option, support will be included for the SiS
96x SMBus (a subset of I2C) interfaces. Specifically, the following
chipsets are supported:
645/961
645DX/961
645DX/962
648/961
650/961
735
This can also be built as a module which can be inserted and removed
while the kernel is running. If you want to compile it as a module,
say M here and read <file:Documentation/modules.txt>.
The module will be called i2c-sis96x.
You will also need the latest user-space utilties: you can find them
in the lm_sensors package, which you can download at
http://www.lm-sensors.nu
config I2C_VIAPRO
tristate " VIA 82C596/82C686/823x"
depends on I2C && PCI && EXPERIMENTAL
......
drivers/i2c/busses/Makefile
View file @ 38c16b6b
......@@ -8,4 +8,5 @@ obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
obj-$(CONFIG_I2C_I801) += i2c-i801.o
obj-$(CONFIG_I2C_ISA) += i2c-isa.o
obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
drivers/i2c/busses/i2c-piix4.c
View file @ 38c16b6b
......@@ -269,7 +269,7 @@ static int piix4_transaction(void)
if (temp & 0x04) {
result = -1;
dev_err(&piix4_adapter.dev, "Error: no response!\n");
dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
}
if (inb_p(SMBHSTSTS) != 0x00)
......@@ -467,7 +467,7 @@ static void __devexit piix4_remove(struct pci_dev *dev)
static struct pci_driver piix4_driver = {
.name = "piix4 smbus",
.name = "piix4-smbus",
.id_table = piix4_ids,
.probe = piix4_probe,
.remove = __devexit_p(piix4_remove),
......
drivers/i2c/busses/i2c-sis96x.c 0 → 100644
View file @ 38c16b6b
/*
sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
monitoring
Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
This module must be considered BETA unless and until
the chipset manufacturer releases a datasheet.
The register definitions are based on the SiS630.
This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
for just about every machine for which users have reported.
If this module isn't detecting your 96x south bridge, have a
look there.
We assume there can only be one SiS96x with one SMBus interface.
*/
/* #define DEBUG */
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <asm/io.h>
/*
HISTORY:
2003-05-11 1.0.0 Updated from lm_sensors project for kernel 2.5
(was i2c-sis645.c from lm_sensors 2.7.0)
*/
#define SIS96x_VERSION "1.0.0"
/* SiS96x SMBus PCI device ID */
#define PCI_DEVICE_ID_SI_SMBUS 0x16
/* base address register in PCI config space */
#define SIS96x_BAR 0x04
/* SiS96x SMBus registers */
#define SMB_STS 0x00
#define SMB_EN 0x01
#define SMB_CNT 0x02
#define SMB_HOST_CNT 0x03
#define SMB_ADDR 0x04
#define SMB_CMD 0x05
#define SMB_PCOUNT 0x06
#define SMB_COUNT 0x07
#define SMB_BYTE 0x08
#define SMB_DEV_ADDR 0x10
#define SMB_DB0 0x11
#define SMB_DB1 0x12
#define SMB_SAA 0x13
/* register count for request_region */
#define SMB_IOSIZE 0x20
/* Other settings */
#define MAX_TIMEOUT 500
/* SiS96x SMBus constants */
#define SIS96x_QUICK 0x00
#define SIS96x_BYTE 0x01
#define SIS96x_BYTE_DATA 0x02
#define SIS96x_WORD_DATA 0x03
#define SIS96x_PROC_CALL 0x04
#define SIS96x_BLOCK_DATA 0x05
static struct i2c_adapter sis96x_adapter;
static u16 sis96x_smbus_base = 0;
static inline u8 sis96x_read(u8 reg)
{
return inb(sis96x_smbus_base + reg) ;
}
static inline void sis96x_write(u8 reg, u8 data)
{
outb(data, sis96x_smbus_base + reg) ;
}
/* Internally used pause function */
static void sis96x_do_pause(unsigned int amount)
{
current->state = TASK_INTERRUPTIBLE;
schedule_timeout(amount);
}
/* Execute a SMBus transaction.
int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
*/
static int sis96x_transaction(int size)
{
int temp;
int result = 0;
int timeout = 0;
dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
/* Make sure the SMBus host is ready to start transmitting */
if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
"Resetting...\n", temp);
/* kill the transaction */
sis96x_write(SMB_HOST_CNT, 0x20);
/* check it again */
if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
return -1;
} else {
dev_dbg(&sis96x_adapter.dev, "Successful\n");
}
}
/* Turn off timeout interrupts, set fast host clock */
sis96x_write(SMB_CNT, 0x20);
/* clear all (sticky) status flags */
temp = sis96x_read(SMB_STS);
sis96x_write(SMB_STS, temp & 0x1e);
/* start the transaction by setting bit 4 and size bits */
sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
/* We will always wait for a fraction of a second! */
do {
sis96x_do_pause(1);
temp = sis96x_read(SMB_STS);
} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
/* If the SMBus is still busy, we give up */
if (timeout >= MAX_TIMEOUT) {
dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
result = -1;
}
/* device error - probably missing ACK */
if (temp & 0x02) {
dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
result = -1;
}
/* bus collision */
if (temp & 0x04) {
dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
result = -1;
}
/* Finish up by resetting the bus */
sis96x_write(SMB_STS, temp);
if ((temp = sis96x_read(SMB_STS))) {
dev_dbg(&sis96x_adapter.dev, "Failed reset at "
"end of transaction! (0x%02x)\n", temp);
}
return result;
}
/* Return -1 on error. */
static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
unsigned short flags, char read_write,
u8 command, int size, union i2c_smbus_data * data)
{
switch (size) {
case I2C_SMBUS_QUICK:
sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
size = SIS96x_QUICK;
break;
case I2C_SMBUS_BYTE:
sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
if (read_write == I2C_SMBUS_WRITE)
sis96x_write(SMB_CMD, command);
size = SIS96x_BYTE;
break;
case I2C_SMBUS_BYTE_DATA:
sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
sis96x_write(SMB_CMD, command);
if (read_write == I2C_SMBUS_WRITE)
sis96x_write(SMB_BYTE, data->byte);
size = SIS96x_BYTE_DATA;
break;
case I2C_SMBUS_PROC_CALL:
case I2C_SMBUS_WORD_DATA:
sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
sis96x_write(SMB_CMD, command);
if (read_write == I2C_SMBUS_WRITE) {
sis96x_write(SMB_BYTE, data->word & 0xff);
sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
}
size = (size == I2C_SMBUS_PROC_CALL ?
SIS96x_PROC_CALL : SIS96x_WORD_DATA);
break;
case I2C_SMBUS_BLOCK_DATA:
/* TO DO: */
dev_info(&adap->dev, "SMBus block not implemented!\n");
return -1;
break;
default:
dev_info(&adap->dev, "Unsupported I2C size\n");
return -1;
break;
}
if (sis96x_transaction(size))
return -1;
if ((size != SIS96x_PROC_CALL) &&
((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
return 0;
switch (size) {
case SIS96x_BYTE:
case SIS96x_BYTE_DATA:
data->byte = sis96x_read(SMB_BYTE);
break;
case SIS96x_WORD_DATA:
case SIS96x_PROC_CALL:
data->word = sis96x_read(SMB_BYTE) +
(sis96x_read(SMB_BYTE + 1) << 8);
break;
}
return 0;
}
static u32 sis96x_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_PROC_CALL;
}
static struct i2c_algorithm smbus_algorithm = {
.name = "Non-I2C SMBus adapter",
.id = I2C_ALGO_SMBUS,
.smbus_xfer = sis96x_access,
.functionality = sis96x_func,
};
static struct i2c_adapter sis96x_adapter = {
.owner = THIS_MODULE,
.id = I2C_ALGO_SMBUS | I2C_HW_SMBUS_SIS96X,
.class = I2C_ADAP_CLASS_SMBUS,
.algo = &smbus_algorithm,
.dev = {
.name ="unset",
},
};
static struct pci_device_id sis96x_ids[] __devinitdata = {
{
.vendor = PCI_VENDOR_ID_SI,
.device = PCI_DEVICE_ID_SI_SMBUS,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ 0, }
};
static int __devinit sis96x_probe(struct pci_dev *dev,
const struct pci_device_id *id)
{
u16 ww = 0;
int retval;
if (sis96x_smbus_base) {
dev_err(&dev->dev, "Only one device supported.\n");
return -EBUSY;
}
pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
if (PCI_CLASS_SERIAL_SMBUS != ww) {
dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
return -ENODEV;
}
sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
if (!sis96x_smbus_base) {
dev_err(&dev->dev, "SiS96x SMBus base address "
"not initialized!\n");
return -EINVAL;
}
dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
sis96x_smbus_base);
/* Everything is happy, let's grab the memory and set things up. */
if (!request_region(sis96x_smbus_base, SMB_IOSIZE, "sis96x-smbus")) {
dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
"already in use!\n", sis96x_smbus_base,
sis96x_smbus_base + SMB_IOSIZE - 1);
sis96x_smbus_base = 0;
return -EINVAL;
}
/* set up the driverfs linkage to our parent device */
sis96x_adapter.dev.parent = &dev->dev;
snprintf(sis96x_adapter.dev.name, DEVICE_NAME_SIZE,
"SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
if ((retval = i2c_add_adapter(&sis96x_adapter))) {
dev_err(&dev->dev, "Couldn't register adapter!\n");
release_region(sis96x_smbus_base, SMB_IOSIZE);
sis96x_smbus_base = 0;
}
return retval;
}
static void __devexit sis96x_remove(struct pci_dev *dev)
{
if (sis96x_smbus_base) {
i2c_del_adapter(&sis96x_adapter);
release_region(sis96x_smbus_base, SMB_IOSIZE);
sis96x_smbus_base = 0;
}
}
static struct pci_driver sis96x_driver = {
.name = "sis96x smbus",
.id_table = sis96x_ids,
.probe = sis96x_probe,
.remove = __devexit_p(sis96x_remove),
};
static int __init i2c_sis96x_init(void)
{
printk(KERN_INFO "i2c-sis96x version %s\n", SIS96x_VERSION);
return pci_module_init(&sis96x_driver);
}
static void __exit i2c_sis96x_exit(void)
{
pci_unregister_driver(&sis96x_driver);
}
MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
MODULE_DESCRIPTION("SiS96x SMBus driver");
MODULE_LICENSE("GPL");
/* Register initialization functions using helper macros */
module_init(i2c_sis96x_init);
module_exit(i2c_sis96x_exit);
drivers/i2c/chips/it87.c
View file @ 38c16b6b
......@@ -630,7 +630,6 @@ int it87_detect(struct i2c_adapter *adapter, int address, int kind)
}
}
}
memset (new_client, 0x00, sizeof(struct i2c_client) + sizeof(struct it87_data));
/* OK. For now, we presume we have a valid client. We now create the
client structure, even though we cannot fill it completely yet.
......
drivers/i2c/i2c-dev.c
View file @ 38c16b6b
......@@ -3,6 +3,7 @@
Copyright (C) 1995-97 Simon G. Vogl
Copyright (C) 1998-99 Frodo Looijaard <frodol@dds.nl>
Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......@@ -28,8 +29,6 @@
/* The devfs code is contributed by Philipp Matthias Hahn
<pmhahn@titan.lahn.de> */
/* $Id: i2c-dev.c,v 1.53 2003/01/21 08:08:16 kmalkki Exp $ */
/* If you want debugging uncomment: */
/* #define DEBUG 1 */
......@@ -44,54 +43,84 @@
#include <linux/i2c-dev.h>
#include <asm/uaccess.h>
/* struct file_operations changed too often in the 2.1 series for nice code */
static struct i2c_client i2cdev_client_template;
static ssize_t i2cdev_read (struct file *file, char *buf, size_t count,
loff_t *offset);
static ssize_t i2cdev_write (struct file *file, const char *buf, size_t count,
loff_t *offset);
struct i2c_dev {
int minor;
struct i2c_adapter *adap;
struct class_device class_dev;
};
#define to_i2c_dev(d) container_of(d, struct i2c_dev, class_dev)
static int i2cdev_ioctl (struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg);
static int i2cdev_open (struct inode *inode, struct file *file);
#define I2C_MINORS 256
static struct i2c_dev *i2c_dev_array[I2C_MINORS];
static spinlock_t i2c_dev_array_lock = SPIN_LOCK_UNLOCKED;
static int i2cdev_release (struct inode *inode, struct file *file);
struct i2c_dev *i2c_dev_get_by_minor(unsigned index)
{
struct i2c_dev *i2c_dev;
static int i2cdev_attach_adapter(struct i2c_adapter *adap);
static int i2cdev_detach_adapter(struct i2c_adapter *adap);
static int i2cdev_detach_client(struct i2c_client *client);
static int i2cdev_command(struct i2c_client *client, unsigned int cmd,
void *arg);
spin_lock(&i2c_dev_array_lock);
i2c_dev = i2c_dev_array[index];
spin_unlock(&i2c_dev_array_lock);
return i2c_dev;
}
static struct file_operations i2cdev_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.read = i2cdev_read,
.write = i2cdev_write,
.ioctl = i2cdev_ioctl,
.open = i2cdev_open,
.release = i2cdev_release,
};
struct i2c_dev *i2c_dev_get_by_adapter(struct i2c_adapter *adap)
{
struct i2c_dev *i2c_dev = NULL;
int i;
static struct i2c_driver i2cdev_driver = {
.owner = THIS_MODULE,
.name = "dev driver",
.id = I2C_DRIVERID_I2CDEV,
.flags = I2C_DF_NOTIFY,
.attach_adapter = i2cdev_attach_adapter,
.detach_adapter = i2cdev_detach_adapter,
.detach_client = i2cdev_detach_client,
.command = i2cdev_command,
};
spin_lock(&i2c_dev_array_lock);
for (i = 0; i < I2C_MINORS; ++i) {
if ((i2c_dev_array[i]) &&
(i2c_dev_array[i]->adap == adap)) {
i2c_dev = i2c_dev_array[i];
break;
}
}
spin_unlock(&i2c_dev_array_lock);
return i2c_dev;
}
static struct i2c_client i2cdev_client_template = {
.dev = {
.name = "I2C /dev entry",
},
.id = 1,
.addr = -1,
.driver = &i2cdev_driver,
};
static struct i2c_dev *get_free_i2c_dev(void)
{
struct i2c_dev *i2c_dev;
unsigned int i;
i2c_dev = kmalloc(sizeof(*i2c_dev), GFP_KERNEL);
if (!i2c_dev)
return ERR_PTR(-ENOMEM);
memset(i2c_dev, 0x00, sizeof(*i2c_dev));
spin_lock(&i2c_dev_array_lock);
for (i = 0; i < I2C_MINORS; ++i) {
if (i2c_dev_array[i])
continue;
i2c_dev->minor = i;
i2c_dev_array[i] = i2c_dev;
spin_unlock(&i2c_dev_array_lock);
return i2c_dev;
}
spin_unlock(&i2c_dev_array_lock);
kfree(i2c_dev);
return ERR_PTR(-ENODEV);
}
static void return_i2c_dev(struct i2c_dev *i2c_dev)
{
spin_lock(&i2c_dev_array_lock);
i2c_dev_array[i2c_dev->minor] = NULL;
spin_unlock(&i2c_dev_array_lock);
kfree(i2c_dev);
}
static ssize_t show_dev(struct class_device *class_dev, char *buf)
{
struct i2c_dev *i2c_dev = to_i2c_dev(class_dev);
return sprintf(buf, "%04x\n", MKDEV(I2C_MAJOR, i2c_dev->minor));
}
static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
static ssize_t i2cdev_read (struct file *file, char *buf, size_t count,
loff_t *offset)
......@@ -104,7 +133,6 @@ static ssize_t i2cdev_read (struct file *file, char *buf, size_t count,
if (count > 8192)
count = 8192;
/* copy user space data to kernel space. */
tmp = kmalloc(count,GFP_KERNEL);
if (tmp==NULL)
return -ENOMEM;
......@@ -129,7 +157,6 @@ static ssize_t i2cdev_write (struct file *file, const char *buf, size_t count,
if (count > 8192)
count = 8192;
/* copy user space data to kernel space. */
tmp = kmalloc(count,GFP_KERNEL);
if (tmp==NULL)
return -ENOMEM;
......@@ -157,7 +184,7 @@ int i2cdev_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
int i,datasize,res;
unsigned long funcs;
pr_debug("i2c-dev.o: i2c-%d ioctl, cmd: 0x%x, arg: %lx.\n",
dev_dbg(&client->dev, "i2c-%d ioctl, cmd: 0x%x, arg: %lx.\n",
minor(inode->i_rdev),cmd, arg);
switch ( cmd ) {
......@@ -242,13 +269,11 @@ int i2cdev_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
rdwr_arg.nmsgs);
}
while(i-- > 0) {
if( res>=0 && (rdwr_pa[i].flags & I2C_M_RD))
{
if( res>=0 && (rdwr_pa[i].flags & I2C_M_RD)) {
if(copy_to_user(
rdwr_arg.msgs[i].buf,
rdwr_pa[i].buf,
rdwr_pa[i].len))
{
rdwr_pa[i].len)) {
res = -EFAULT;
}
}
......@@ -340,9 +365,14 @@ static int i2cdev_open(struct inode *inode, struct file *file)
unsigned int minor = minor(inode->i_rdev);
struct i2c_client *client;
struct i2c_adapter *adap;
struct i2c_dev *i2c_dev;
i2c_dev = i2c_dev_get_by_minor(minor);
if (!i2c_dev)
return -ENODEV;
adap = i2c_get_adapter(minor);
if (NULL == adap)
adap = i2c_get_adapter(i2c_dev->adap->nr);
if (!adap)
return -ENODEV;
client = kmalloc(sizeof(*client), GFP_KERNEL);
......@@ -370,29 +400,68 @@ static int i2cdev_release(struct inode *inode, struct file *file)
return 0;
}
int i2cdev_attach_adapter(struct i2c_adapter *adap)
{
int i;
static struct file_operations i2cdev_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.read = i2cdev_read,
.write = i2cdev_write,
.ioctl = i2cdev_ioctl,
.open = i2cdev_open,
.release = i2cdev_release,
};
i = i2c_adapter_id(adap);
devfs_mk_cdev(MKDEV(I2C_MAJOR, i),
S_IFCHR|S_IRUSR|S_IWUSR, "i2c/%d", i);
dev_dbg(&adap->dev, "Registered as minor %d\n", i);
static struct class i2c_dev_class = {
.name = "i2c-dev",
};
static int i2cdev_attach_adapter(struct i2c_adapter *adap)
{
struct i2c_dev *i2c_dev;
int retval;
i2c_dev = get_free_i2c_dev();
if (IS_ERR(i2c_dev))
return PTR_ERR(i2c_dev);
devfs_mk_cdev(MKDEV(I2C_MAJOR, i2c_dev->minor),
S_IFCHR|S_IRUSR|S_IWUSR, "i2c/%d", i2c_dev->minor);
dev_dbg(&adap->dev, "Registered as minor %d\n", i2c_dev->minor);
/* register this i2c device with the driver core */
i2c_dev->adap = adap;
if (adap->dev.parent == &legacy_bus)
i2c_dev->class_dev.dev = &adap->dev;
else
i2c_dev->class_dev.dev = adap->dev.parent;
i2c_dev->class_dev.class = &i2c_dev_class;
snprintf(i2c_dev->class_dev.class_id, BUS_ID_SIZE, "i2c-%d", i2c_dev->minor);
retval = class_device_register(&i2c_dev->class_dev);
if (retval)
goto error;
class_device_create_file(&i2c_dev->class_dev, &class_device_attr_dev);
return 0;
error:
return_i2c_dev(i2c_dev);
return retval;
}
int i2cdev_detach_adapter(struct i2c_adapter *adap)
static int i2cdev_detach_adapter(struct i2c_adapter *adap)
{
int i;
struct i2c_dev *i2c_dev;
i = i2c_adapter_id(adap);
i2c_dev = i2c_dev_get_by_adapter(adap);
if (!i2c_dev)
return -ENODEV;
class_device_unregister(&i2c_dev->class_dev);
devfs_remove("i2c/%d", i2c_dev->minor);
return_i2c_dev(i2c_dev);
devfs_remove("i2c/%d", i);
dev_dbg(&adap->dev, "Adapter unregistered\n");
return 0;
}
int i2cdev_detach_client(struct i2c_client *client)
static int i2cdev_detach_client(struct i2c_client *client)
{
return 0;
}
......@@ -403,7 +472,27 @@ static int i2cdev_command(struct i2c_client *client, unsigned int cmd,
return -1;
}
int __init i2c_dev_init(void)
static struct i2c_driver i2cdev_driver = {
.owner = THIS_MODULE,
.name = "dev driver",
.id = I2C_DRIVERID_I2CDEV,
.flags = I2C_DF_NOTIFY,
.attach_adapter = i2cdev_attach_adapter,
.detach_adapter = i2cdev_detach_adapter,
.detach_client = i2cdev_detach_client,
.command = i2cdev_command,
};
static struct i2c_client i2cdev_client_template = {
.dev = {
.name = "I2C /dev entry",
},
.id = 1,
.addr = -1,
.driver = &i2cdev_driver,
};
static int __init i2c_dev_init(void)
{
int res;
......@@ -416,6 +505,7 @@ int __init i2c_dev_init(void)
return -EIO;
}
devfs_mk_dir("i2c");
class_register(&i2c_dev_class);
if ((res = i2c_add_driver(&i2cdev_driver))) {
printk(KERN_ERR "i2c-dev.o: Driver registration failed, module not inserted.\n");
devfs_remove("i2c");
......@@ -428,11 +518,13 @@ int __init i2c_dev_init(void)
static void __exit i2c_dev_exit(void)
{
i2c_del_driver(&i2cdev_driver);
class_unregister(&i2c_dev_class);
devfs_remove("i2c");
unregister_chrdev(I2C_MAJOR,"i2c");
}
MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and Simon G. Vogl <simon@tk.uni-linz.ac.at>");
MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
"Simon G. Vogl <simon@tk.uni-linz.ac.at>");
MODULE_DESCRIPTION("I2C /dev entries driver");
MODULE_LICENSE("GPL");
......
drivers/pci/quirks.c
View file @ 38c16b6b
......@@ -696,6 +696,37 @@ static void __init asus_hides_smbus_lpc(struct pci_dev *dev)
}
}
/*
* SiS 96x south bridge: BIOS typically hides SMBus device...
*/
static void __init quirk_sis_96x_smbus(struct pci_dev *dev)
{
u8 val = 0;
printk(KERN_INFO "Enabling SiS 96x SMBus.\n");
pci_read_config_byte(dev, 0x77, &val);
pci_write_config_byte(dev, 0x77, val & ~0x10);
pci_read_config_byte(dev, 0x77, &val);
}
/*
* ... This is further complicated by the fact that some SiS96x south
* bridges pretend to be 85C503/5513 instead. In that case see if we
* spotted a compatible north bridge to make sure.
* (pci_find_device doesn't work yet)
*/
static int __devinitdata sis_96x_compatible = 0;
static void __init quirk_sis_503_smbus(struct pci_dev *dev)
{
if (sis_96x_compatible)
quirk_sis_96x_smbus(dev);
}
static void __init quirk_sis_96x_compatible(struct pci_dev *dev)
{
sis_96x_compatible = 1;
}
/*
* The main table of quirks.
*/
......@@ -729,6 +760,15 @@ static struct pci_fixup pci_fixups[] __devinitdata = {
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2, quirk_natoma },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503_smbus },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_645, quirk_sis_96x_compatible },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_646, quirk_sis_96x_compatible },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_648, quirk_sis_96x_compatible },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650, quirk_sis_96x_compatible },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_651, quirk_sis_96x_compatible },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1647, quirk_alimagik },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagik },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8363_0, quirk_vialatency },
......
drivers/scsi/esp.c
View file @ 38c16b6b
......@@ -1215,11 +1215,33 @@ static int __init esp_detect(Scsi_Host_Template *tpnt)
#endif /* !CONFIG_SUN4 */
/*
*/
static int esp_release(struct Scsi_Host *host)
{
struct esp *esp = (struct esp *) host->hostdata;
ESP_INTSOFF(esp->dregs);
#if 0
esp_reset_dma(esp);
esp_reset_esp(esp);
#endif
free_irq(esp->ehost->irq, esp);
sbus_free_consistent(esp->sdev, 16,
(void *) esp->esp_command, esp->esp_command_dvma);
sbus_iounmap(esp->eregs, ESP_REG_SIZE);
esp->dma->allocated = 0;
esp_chain_del(esp);
return 0;
}
/* The info function will return whatever useful
* information the developer sees fit. If not provided, then
* the name field will be used instead.
*/
const char *esp_info(struct Scsi_Host *host)
static const char *esp_info(struct Scsi_Host *host)
{
struct esp *esp;
......@@ -4370,6 +4392,7 @@ static Scsi_Host_Template driver_template = {
.detect = esp_detect,
.slave_alloc = esp_slave_alloc,
.slave_destroy = esp_slave_destroy,
.release = esp_release,
.info = esp_info,
.command = esp_command,
.queuecommand = esp_queue,
......
include/asm-ppc/agp.h 0 → 100644
View file @ 38c16b6b
#ifndef AGP_H
#define AGP_H 1
#include <asm/io.h>
/* nothing much needed here */
#define map_page_into_agp(page)
#define unmap_page_from_agp(page)
#define flush_agp_mappings()
#define flush_agp_cache() mb()
#endif
include/asm-sparc/bitops.h
View file @ 38c16b6b
......@@ -20,7 +20,7 @@
* within the first byte. Sparc is BIG-Endian. Unless noted otherwise
* all bit-ops return 0 if bit was previously clear and != 0 otherwise.
*/
static __inline__ int test_and_set_bit(unsigned long nr, volatile void *addr)
static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -39,7 +39,7 @@ static __inline__ int test_and_set_bit(unsigned long nr, volatile void *addr)
return mask != 0;
}
static __inline__ void set_bit(unsigned long nr, volatile void *addr)
static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -56,7 +56,7 @@ static __inline__ void set_bit(unsigned long nr, volatile void *addr)
: "g3", "g4", "g5", "g7", "cc");
}
static __inline__ int test_and_clear_bit(unsigned long nr, volatile void *addr)
static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -75,7 +75,7 @@ static __inline__ int test_and_clear_bit(unsigned long nr, volatile void *addr)
return mask != 0;
}
static __inline__ void clear_bit(unsigned long nr, volatile void *addr)
static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -92,7 +92,7 @@ static __inline__ void clear_bit(unsigned long nr, volatile void *addr)
: "g3", "g4", "g5", "g7", "cc");
}
static __inline__ int test_and_change_bit(unsigned long nr, volatile void *addr)
static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -111,7 +111,7 @@ static __inline__ int test_and_change_bit(unsigned long nr, volatile void *addr)
return mask != 0;
}
static __inline__ void change_bit(unsigned long nr, volatile void *addr)
static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
{
register unsigned long mask asm("g2");
register unsigned long *ADDR asm("g1");
......@@ -131,7 +131,7 @@ static __inline__ void change_bit(unsigned long nr, volatile void *addr)
/*
* non-atomic versions
*/
static __inline__ void __set_bit(int nr, volatile void *addr)
static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -139,7 +139,7 @@ static __inline__ void __set_bit(int nr, volatile void *addr)
*p |= mask;
}
static __inline__ void __clear_bit(int nr, volatile void *addr)
static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -147,7 +147,7 @@ static __inline__ void __clear_bit(int nr, volatile void *addr)
*p &= ~mask;
}
static __inline__ void __change_bit(int nr, volatile void *addr)
static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -155,7 +155,7 @@ static __inline__ void __change_bit(int nr, volatile void *addr)
*p ^= mask;
}
static __inline__ int __test_and_set_bit(int nr, volatile void *addr)
static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -165,7 +165,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void *addr)
return (old & mask) != 0;
}
static __inline__ int __test_and_clear_bit(int nr, volatile void *addr)
static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -175,7 +175,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void *addr)
return (old & mask) != 0;
}
static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = 1UL << (nr & 0x1f);
unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
......@@ -189,9 +189,9 @@ static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
#define smp_mb__after_clear_bit() do { } while(0)
/* The following routine need not be atomic. */
static __inline__ int test_bit(int nr, __const__ void *addr)
static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
{
return (1 & (((__const__ unsigned int *) addr)[nr >> 5] >> (nr & 31))) != 0;
return (1UL & (((unsigned long *)addr)[nr >> 5] >> (nr & 31))) != 0UL;
}
/* The easy/cheese version for now. */
......@@ -288,9 +288,10 @@ static __inline__ int ffs(int x)
* 'size' bits, starting the search at bit 'offset'. This is largely based
* on Linus's ALPHA routines, which are pretty portable BTW.
*/
static __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
static __inline__ unsigned long find_next_zero_bit(unsigned long *addr,
unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long *p = addr + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
......@@ -361,7 +362,7 @@ static __inline__ int find_next_bit(unsigned long *addr, int size, int offset)
/*
*/
static __inline__ int test_le_bit(int nr, __const__ void * addr)
static __inline__ int test_le_bit(int nr, __const__ unsigned long * addr)
{
__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
return (ADDR[nr >> 3] >> (nr & 7)) & 1;
......@@ -370,7 +371,7 @@ static __inline__ int test_le_bit(int nr, __const__ void * addr)
/*
* non-atomic versions
*/
static __inline__ void __set_le_bit(int nr, void *addr)
static __inline__ void __set_le_bit(int nr, unsigned long *addr)
{
unsigned char *ADDR = (unsigned char *)addr;
......@@ -378,7 +379,7 @@ static __inline__ void __set_le_bit(int nr, void *addr)
*ADDR |= 1 << (nr & 0x07);
}
static __inline__ void __clear_le_bit(int nr, void *addr)
static __inline__ void __clear_le_bit(int nr, unsigned long *addr)
{
unsigned char *ADDR = (unsigned char *)addr;
......@@ -386,7 +387,7 @@ static __inline__ void __clear_le_bit(int nr, void *addr)
*ADDR &= ~(1 << (nr & 0x07));
}
static __inline__ int __test_and_set_le_bit(int nr, void *addr)
static __inline__ int __test_and_set_le_bit(int nr, unsigned long *addr)
{
int mask, retval;
unsigned char *ADDR = (unsigned char *)addr;
......@@ -398,7 +399,7 @@ static __inline__ int __test_and_set_le_bit(int nr, void *addr)
return retval;
}
static __inline__ int __test_and_clear_le_bit(int nr, void *addr)
static __inline__ int __test_and_clear_le_bit(int nr, unsigned long *addr)
{
int mask, retval;
unsigned char *ADDR = (unsigned char *)addr;
......@@ -410,9 +411,10 @@ static __inline__ int __test_and_clear_le_bit(int nr, void *addr)
return retval;
}
static __inline__ unsigned long find_next_zero_le_bit(void *addr, unsigned long size, unsigned long offset)
static __inline__ unsigned long find_next_zero_le_bit(unsigned long *addr,
unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long *p = addr + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
......
include/asm-sparc/bug.h
View file @ 38c16b6b
......@@ -2,24 +2,18 @@
#ifndef _SPARC_BUG_H
#define _SPARC_BUG_H
/*
* XXX I am hitting compiler bugs with __builtin_trap. This has
* hit me before and rusty was blaming his netfilter bugs on
* this so lets disable it. - Anton
*/
#if 0
/* We need the mb()'s so we don't trigger a compiler bug - Anton */
#define BUG() do { \
mb(); \
__builtin_trap(); \
mb(); \
} while(0)
#else
#define BUG() do { \
printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); *(int *)0=0; \
#ifdef CONFIG_DEBUG_BUGVERBOSE
extern void do_BUG(const char *file, int line);
#define BUG() do { \
do_BUG(__FILE__, __LINE__); \
__builtin_trap(); \
} while (0)
#else
#define BUG() __builtin_trap()
#endif
#define PAGE_BUG(page) BUG()
#define PAGE_BUG(page) do { \
BUG(); \
} while (0)
#endif
include/asm-sparc/io-unit.h
View file @ 38c16b6b
......@@ -41,7 +41,7 @@
#define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */
struct iounit_struct {
unsigned int bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned int)];
unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)];
spinlock_t lock;
iopte_t *page_table;
unsigned long rotor[3];
......
include/asm-sparc/smp.h
View file @ 38c16b6b
......@@ -169,9 +169,6 @@ extern __inline__ int hard_smp_processor_id(void)
#endif
#define smp_processor_id() hard_smp_processor_id()
/* XXX We really need to implement this now. -DaveM */
extern __inline__ void smp_send_reschedule(int cpu) { }
extern __inline__ void smp_send_stop(void) { }
#endif /* !(__ASSEMBLY__) */
......
include/linux/i2c-id.h
View file @ 38c16b6b
......@@ -245,7 +245,7 @@
#define I2C_HW_SMBUS_SIS5595 0x06
#define I2C_HW_SMBUS_ALI1535 0x07
#define I2C_HW_SMBUS_SIS630 0x08
#define I2C_HW_SMBUS_SIS645 0x09
#define I2C_HW_SMBUS_SIS96X 0x09
#define I2C_HW_SMBUS_AMD8111 0x0a
#define I2C_HW_SMBUS_SCX200 0x0b
#define I2C_HW_SMBUS_NFORCE2 0x0c
......
include/linux/pci_ids.h
View file @ 38c16b6b
......@@ -569,6 +569,9 @@
#define PCI_DEVICE_ID_SI_751 0x0751
#define PCI_DEVICE_ID_SI_752 0x0752
#define PCI_DEVICE_ID_SI_900 0x0900
#define PCI_DEVICE_ID_SI_961 0x0961
#define PCI_DEVICE_ID_SI_962 0x0962
#define PCI_DEVICE_ID_SI_963 0x0963
#define PCI_DEVICE_ID_SI_5107 0x5107
#define PCI_DEVICE_ID_SI_5300 0x5300
#define PCI_DEVICE_ID_SI_5511 0x5511
......@@ -1128,6 +1131,7 @@
#define PCI_DEVICE_ID_VIA_8754 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177
#define PCI_DEVICE_ID_VIA_P4N333 0x3178
#define PCI_DEVICE_ID_VIA_K8T400M_0 0x3188
#define PCI_DEVICE_ID_VIA_8377_0 0x3189
#define PCI_DEVICE_ID_VIA_KM400 0x3205
#define PCI_DEVICE_ID_VIA_P4M400 0x3209
......
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