Commit 3b7b7647 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher

drm/amdgpu: add common gfx_ras_fini function

gfx_ras_fini can be shared among all generations of gfx
Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2adf1344
...@@ -619,6 +619,21 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, ...@@ -619,6 +619,21 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev,
return r; return r;
} }
void amdgpu_gfx_ras_fini(struct amdgpu_device *adev)
{
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
adev->gfx.ras_if) {
struct ras_common_if *ras_if = adev->gfx.ras_if;
struct ras_ih_if ih_info = {
.head = *ras_if,
.cb = amdgpu_gfx_process_ras_data_cb,
};
amdgpu_ras_late_fini(adev, ras_if, &ih_info);
kfree(ras_if);
}
}
int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev, int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data, void *err_data,
struct amdgpu_iv_entry *entry) struct amdgpu_iv_entry *entry)
......
...@@ -360,6 +360,7 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me, ...@@ -360,6 +360,7 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,
void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable); void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev,
void *ras_ih_info); void *ras_ih_info);
void amdgpu_gfx_ras_fini(struct amdgpu_device *adev);
int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev, int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
void *err_data, void *err_data,
struct amdgpu_iv_entry *entry); struct amdgpu_iv_entry *entry);
......
...@@ -2133,19 +2133,7 @@ static int gfx_v9_0_sw_fini(void *handle) ...@@ -2133,19 +2133,7 @@ static int gfx_v9_0_sw_fini(void *handle)
int i; int i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) && amdgpu_gfx_ras_fini(adev);
adev->gfx.ras_if) {
struct ras_common_if *ras_if = adev->gfx.ras_if;
struct ras_ih_if ih_info = {
.head = *ras_if,
};
amdgpu_ras_debugfs_remove(adev, ras_if);
amdgpu_ras_sysfs_remove(adev, ras_if);
amdgpu_ras_interrupt_remove_handler(adev, &ih_info);
amdgpu_ras_feature_enable(adev, ras_if, 0);
kfree(ras_if);
}
for (i = 0; i < adev->gfx.num_gfx_rings; i++) for (i = 0; i < adev->gfx.num_gfx_rings; i++)
amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); amdgpu_ring_fini(&adev->gfx.gfx_ring[i]);
......
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