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Kirill Smelkov
linux
Commits
3fed3ea9
Commit
3fed3ea9
authored
Mar 26, 2015
by
Ben Skeggs
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
drm/nouveau/gr/gm204: initial init+ctx code
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
990b4547
Changes
10
Hide whitespace changes
Inline
Side-by-side
Showing
10 changed files
with
1484 additions
and
18 deletions
+1484
-18
drivers/gpu/drm/nouveau/include/nvif/class.h
drivers/gpu/drm/nouveau/include/nvif/class.h
+2
-0
drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h
drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h
+1
-0
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+1
-3
drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild
+2
-0
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
+10
-0
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
+5
-5
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c
+1054
-0
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
+12
-0
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
+10
-10
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
+387
-0
No files found.
drivers/gpu/drm/nouveau/include/nvif/class.h
View file @
3fed3ea9
...
...
@@ -92,6 +92,7 @@
#define KEPLER_C 0x0000a297
#define MAXWELL_A 0x0000b097
#define MAXWELL_B 0x0000b197
#define FERMI_COMPUTE_A 0x000090c0
#define FERMI_COMPUTE_B 0x000091c0
...
...
@@ -100,6 +101,7 @@
#define KEPLER_COMPUTE_B 0x0000a1c0
#define MAXWELL_COMPUTE_A 0x0000b0c0
#define MAXWELL_COMPUTE_B 0x0000b1c0
/*******************************************************************************
...
...
drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h
View file @
3fed3ea9
...
...
@@ -72,6 +72,7 @@ extern struct nvkm_oclass *gk110_gr_oclass;
extern
struct
nvkm_oclass
*
gk110b_gr_oclass
;
extern
struct
nvkm_oclass
*
gk208_gr_oclass
;
extern
struct
nvkm_oclass
*
gm107_gr_oclass
;
extern
struct
nvkm_oclass
*
gm204_gr_oclass
;
#include <core/enum.h>
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
View file @
3fed3ea9
...
...
@@ -129,9 +129,7 @@ gm100_identify(struct nvkm_device *device)
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
gf110_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
gm204_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
gf100_sw_oclass
;
#if 0
device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
#endif
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
gm204_gr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
gm204_disp_oclass
;
device
->
oclass
[
NVDEV_ENGINE_CE0
]
=
&
gm204_ce0_oclass
;
device
->
oclass
[
NVDEV_ENGINE_CE1
]
=
&
gm204_ce1_oclass
;
...
...
drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild
View file @
3fed3ea9
...
...
@@ -12,6 +12,7 @@ nvkm-y += nvkm/engine/gr/ctxgk110.o
nvkm-y += nvkm/engine/gr/ctxgk110b.o
nvkm-y += nvkm/engine/gr/ctxgk208.o
nvkm-y += nvkm/engine/gr/ctxgm107.o
nvkm-y += nvkm/engine/gr/ctxgm204.o
nvkm-y += nvkm/engine/gr/nv04.o
nvkm-y += nvkm/engine/gr/nv10.o
nvkm-y += nvkm/engine/gr/nv20.o
...
...
@@ -34,3 +35,4 @@ nvkm-y += nvkm/engine/gr/gk110.o
nvkm-y += nvkm/engine/gr/gk110b.o
nvkm-y += nvkm/engine/gr/gk208.o
nvkm-y += nvkm/engine/gr/gm107.o
nvkm-y += nvkm/engine/gr/gm204.o
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
View file @
3fed3ea9
...
...
@@ -90,10 +90,17 @@ void gk104_grctx_generate_unkn(struct gf100_gr_priv *);
void
gk104_grctx_generate_r418bb8
(
struct
gf100_gr_priv
*
);
void
gk104_grctx_generate_rop_active_fbps
(
struct
gf100_gr_priv
*
);
extern
struct
nvkm_oclass
*
gk110_grctx_oclass
;
extern
struct
nvkm_oclass
*
gk110b_grctx_oclass
;
extern
struct
nvkm_oclass
*
gk208_grctx_oclass
;
extern
struct
nvkm_oclass
*
gm107_grctx_oclass
;
void
gm107_grctx_generate_bundle
(
struct
gf100_grctx
*
);
void
gm107_grctx_generate_pagepool
(
struct
gf100_grctx
*
);
void
gm107_grctx_generate_attrib
(
struct
gf100_grctx
*
);
extern
struct
nvkm_oclass
*
gm204_grctx_oclass
;
/* context init value lists */
...
...
@@ -197,4 +204,7 @@ extern const struct gf100_gr_init gk208_grctx_init_rstr2d_0[];
extern
const
struct
gf100_gr_init
gk208_grctx_init_prop_0
[];
extern
const
struct
gf100_gr_init
gk208_grctx_init_crstr_0
[];
extern
const
struct
gf100_gr_init
gm107_grctx_init_gpc_unk_0
[];
extern
const
struct
gf100_gr_init
gm107_grctx_init_wwdx_0
[];
#endif
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
View file @
3fed3ea9
...
...
@@ -699,7 +699,7 @@ gm107_grctx_pack_hub[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_grctx_init_gpc_unk_0
[]
=
{
{
0x418380
,
1
,
0x04
,
0x00000056
},
{}
...
...
@@ -834,7 +834,7 @@ gm107_grctx_init_cbm_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_grctx_init_wwdx_0
[]
=
{
{
0x41bf00
,
1
,
0x04
,
0x0a418820
},
{
0x41bf04
,
1
,
0x04
,
0x062080e6
},
...
...
@@ -860,7 +860,7 @@ gm107_grctx_pack_ppc[] = {
* PGRAPH context implementation
******************************************************************************/
static
void
void
gm107_grctx_generate_bundle
(
struct
gf100_grctx
*
info
)
{
const
struct
gf100_grctx_oclass
*
impl
=
gf100_grctx_impl
(
info
->
priv
);
...
...
@@ -877,7 +877,7 @@ gm107_grctx_generate_bundle(struct gf100_grctx *info)
mmio_wr32
(
info
,
0x4064c8
,
(
state_limit
<<
16
)
|
token_limit
);
}
static
void
void
gm107_grctx_generate_pagepool
(
struct
gf100_grctx
*
info
)
{
const
struct
gf100_grctx_oclass
*
impl
=
gf100_grctx_impl
(
info
->
priv
);
...
...
@@ -892,7 +892,7 @@ gm107_grctx_generate_pagepool(struct gf100_grctx *info)
mmio_wr32
(
info
,
0x418e30
,
0x80000000
);
/* guess at it being related */
}
static
void
void
gm107_grctx_generate_attrib
(
struct
gf100_grctx
*
info
)
{
struct
gf100_gr_priv
*
priv
=
info
->
priv
;
...
...
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c
0 → 100644
View file @
3fed3ea9
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "ctxgf100.h"
/*******************************************************************************
* PGRAPH context register lists
******************************************************************************/
static
const
struct
gf100_gr_init
gm204_grctx_init_icmd_0
[]
=
{
{
0x001000
,
1
,
0x01
,
0x00000002
},
{
0x0006aa
,
1
,
0x01
,
0x00000001
},
{
0x0006ad
,
2
,
0x01
,
0x00000100
},
{
0x0006b1
,
1
,
0x01
,
0x00000011
},
{
0x00078c
,
1
,
0x01
,
0x00000008
},
{
0x000792
,
1
,
0x01
,
0x00000001
},
{
0x000794
,
3
,
0x01
,
0x00000001
},
{
0x000797
,
1
,
0x01
,
0x000000cf
},
{
0x00079a
,
1
,
0x01
,
0x00000002
},
{
0x0007a1
,
1
,
0x01
,
0x00000001
},
{
0x0007a3
,
3
,
0x01
,
0x00000001
},
{
0x000831
,
1
,
0x01
,
0x00000004
},
{
0x01e100
,
1
,
0x01
,
0x00000001
},
{
0x001000
,
1
,
0x01
,
0x00000008
},
{
0x000039
,
3
,
0x01
,
0x00000000
},
{
0x000380
,
1
,
0x01
,
0x00000001
},
{
0x000366
,
2
,
0x01
,
0x00000000
},
{
0x000368
,
1
,
0x01
,
0x00000fff
},
{
0x000370
,
2
,
0x01
,
0x00000000
},
{
0x000372
,
1
,
0x01
,
0x000fffff
},
{
0x000374
,
1
,
0x01
,
0x00000100
},
{
0x000818
,
8
,
0x01
,
0x00000000
},
{
0x000848
,
16
,
0x01
,
0x00000000
},
{
0x000738
,
1
,
0x01
,
0x00000000
},
{
0x000b07
,
1
,
0x01
,
0x00000002
},
{
0x000b08
,
2
,
0x01
,
0x00000100
},
{
0x000b0a
,
1
,
0x01
,
0x00000001
},
{
0x000a04
,
1
,
0x01
,
0x000000ff
},
{
0x000a0b
,
1
,
0x01
,
0x00000040
},
{
0x00097f
,
1
,
0x01
,
0x00000100
},
{
0x000a02
,
1
,
0x01
,
0x00000001
},
{
0x000809
,
1
,
0x01
,
0x00000007
},
{
0x00c221
,
1
,
0x01
,
0x00000040
},
{
0x00c401
,
1
,
0x01
,
0x00000001
},
{
0x00c402
,
1
,
0x01
,
0x00010001
},
{
0x00c403
,
2
,
0x01
,
0x00000001
},
{
0x00c40e
,
1
,
0x01
,
0x00000020
},
{
0x01e100
,
1
,
0x01
,
0x00000001
},
{
0x001000
,
1
,
0x01
,
0x00000001
},
{
0x000b07
,
1
,
0x01
,
0x00000002
},
{
0x000b08
,
2
,
0x01
,
0x00000100
},
{
0x000b0a
,
1
,
0x01
,
0x00000001
},
{
0x01e100
,
1
,
0x01
,
0x00000001
},
{
0x001000
,
1
,
0x01
,
0x00000004
},
{
0x000039
,
3
,
0x01
,
0x00000000
},
{
0x0000a9
,
1
,
0x01
,
0x0000ffff
},
{
0x000038
,
1
,
0x01
,
0x0fac6881
},
{
0x00003d
,
1
,
0x01
,
0x00000001
},
{
0x0000e8
,
8
,
0x01
,
0x00000400
},
{
0x000078
,
8
,
0x01
,
0x00000300
},
{
0x000050
,
1
,
0x01
,
0x00000011
},
{
0x000058
,
8
,
0x01
,
0x00000008
},
{
0x000208
,
8
,
0x01
,
0x00000001
},
{
0x000081
,
1
,
0x01
,
0x00000001
},
{
0x000085
,
1
,
0x01
,
0x00000004
},
{
0x000088
,
1
,
0x01
,
0x00000400
},
{
0x000090
,
1
,
0x01
,
0x00000300
},
{
0x000098
,
1
,
0x01
,
0x00001001
},
{
0x0000e3
,
1
,
0x01
,
0x00000001
},
{
0x0000da
,
1
,
0x01
,
0x00000001
},
{
0x0000b4
,
4
,
0x01
,
0x88888888
},
{
0x0000f8
,
1
,
0x01
,
0x00000003
},
{
0x0000fa
,
1
,
0x01
,
0x00000001
},
{
0x0000b1
,
2
,
0x01
,
0x00000001
},
{
0x00009f
,
4
,
0x01
,
0x0000ffff
},
{
0x0000a8
,
1
,
0x01
,
0x0000ffff
},
{
0x0000ad
,
1
,
0x01
,
0x0000013e
},
{
0x0000e1
,
1
,
0x01
,
0x00000010
},
{
0x000290
,
16
,
0x01
,
0x00000000
},
{
0x0003b0
,
16
,
0x01
,
0x00000000
},
{
0x0002a0
,
16
,
0x01
,
0x00000000
},
{
0x000420
,
16
,
0x01
,
0x00000000
},
{
0x0002b0
,
16
,
0x01
,
0x00000000
},
{
0x000430
,
16
,
0x01
,
0x00000000
},
{
0x0002c0
,
16
,
0x01
,
0x00000000
},
{
0x0004d0
,
16
,
0x01
,
0x00000000
},
{
0x000720
,
16
,
0x01
,
0x00000000
},
{
0x0008c0
,
16
,
0x01
,
0x00000000
},
{
0x000890
,
16
,
0x01
,
0x00000000
},
{
0x0008e0
,
16
,
0x01
,
0x00000000
},
{
0x0008a0
,
16
,
0x01
,
0x00000000
},
{
0x0008f0
,
16
,
0x01
,
0x00000000
},
{
0x00094c
,
1
,
0x01
,
0x000000ff
},
{
0x00094d
,
1
,
0x01
,
0xffffffff
},
{
0x00094e
,
1
,
0x01
,
0x00000002
},
{
0x0002f2
,
2
,
0x01
,
0x00000001
},
{
0x0002f5
,
1
,
0x01
,
0x00000001
},
{
0x0002f7
,
1
,
0x01
,
0x00000001
},
{
0x000303
,
1
,
0x01
,
0x00000001
},
{
0x0002e6
,
1
,
0x01
,
0x00000001
},
{
0x000466
,
1
,
0x01
,
0x00000052
},
{
0x000301
,
1
,
0x01
,
0x3f800000
},
{
0x000304
,
1
,
0x01
,
0x30201000
},
{
0x000305
,
1
,
0x01
,
0x70605040
},
{
0x000306
,
1
,
0x01
,
0xb8a89888
},
{
0x000307
,
1
,
0x01
,
0xf8e8d8c8
},
{
0x00030a
,
1
,
0x01
,
0x00ffff00
},
{
0x00030b
,
1
,
0x01
,
0x0000001a
},
{
0x00030c
,
1
,
0x01
,
0x00000001
},
{
0x000318
,
1
,
0x01
,
0x00000001
},
{
0x000340
,
1
,
0x01
,
0x00000000
},
{
0x00037d
,
1
,
0x01
,
0x00000006
},
{
0x0003a0
,
1
,
0x01
,
0x00000002
},
{
0x0003aa
,
1
,
0x01
,
0x00000001
},
{
0x0003a9
,
1
,
0x01
,
0x00000001
},
{
0x000380
,
1
,
0x01
,
0x00000001
},
{
0x000383
,
1
,
0x01
,
0x00000011
},
{
0x000360
,
1
,
0x01
,
0x00000040
},
{
0x000366
,
2
,
0x01
,
0x00000000
},
{
0x000368
,
1
,
0x01
,
0x00000fff
},
{
0x000370
,
2
,
0x01
,
0x00000000
},
{
0x000372
,
1
,
0x01
,
0x000fffff
},
{
0x000374
,
1
,
0x01
,
0x00000100
},
{
0x00037a
,
1
,
0x01
,
0x00000012
},
{
0x000619
,
1
,
0x01
,
0x00000003
},
{
0x000811
,
1
,
0x01
,
0x00000003
},
{
0x000812
,
1
,
0x01
,
0x00000004
},
{
0x000813
,
1
,
0x01
,
0x00000006
},
{
0x000814
,
1
,
0x01
,
0x00000008
},
{
0x000815
,
1
,
0x01
,
0x0000000b
},
{
0x000800
,
6
,
0x01
,
0x00000001
},
{
0x000632
,
1
,
0x01
,
0x00000001
},
{
0x000633
,
1
,
0x01
,
0x00000002
},
{
0x000634
,
1
,
0x01
,
0x00000003
},
{
0x000635
,
1
,
0x01
,
0x00000004
},
{
0x000654
,
1
,
0x01
,
0x3f800000
},
{
0x000657
,
1
,
0x01
,
0x3f800000
},
{
0x000655
,
2
,
0x01
,
0x3f800000
},
{
0x0006cd
,
1
,
0x01
,
0x3f800000
},
{
0x0007f5
,
1
,
0x01
,
0x3f800000
},
{
0x0007dc
,
1
,
0x01
,
0x39291909
},
{
0x0007dd
,
1
,
0x01
,
0x79695949
},
{
0x0007de
,
1
,
0x01
,
0xb9a99989
},
{
0x0007df
,
1
,
0x01
,
0xf9e9d9c9
},
{
0x0007e8
,
1
,
0x01
,
0x00003210
},
{
0x0007e9
,
1
,
0x01
,
0x00007654
},
{
0x0007ea
,
1
,
0x01
,
0x00000098
},
{
0x0007ec
,
1
,
0x01
,
0x39291909
},
{
0x0007ed
,
1
,
0x01
,
0x79695949
},
{
0x0007ee
,
1
,
0x01
,
0xb9a99989
},
{
0x0007ef
,
1
,
0x01
,
0xf9e9d9c9
},
{
0x0007f0
,
1
,
0x01
,
0x00003210
},
{
0x0007f1
,
1
,
0x01
,
0x00007654
},
{
0x0007f2
,
1
,
0x01
,
0x00000098
},
{
0x0005a5
,
1
,
0x01
,
0x00000001
},
{
0x0005aa
,
1
,
0x01
,
0x00000002
},
{
0x0005cb
,
1
,
0x01
,
0x00000004
},
{
0x0005d0
,
1
,
0x01
,
0x20181008
},
{
0x0005d1
,
1
,
0x01
,
0x40383028
},
{
0x0005d2
,
1
,
0x01
,
0x60585048
},
{
0x0005d3
,
1
,
0x01
,
0x80787068
},
{
0x000980
,
128
,
0x01
,
0x00000000
},
{
0x000468
,
1
,
0x01
,
0x00000004
},
{
0x00046c
,
1
,
0x01
,
0x00000001
},
{
0x000470
,
96
,
0x01
,
0x00000000
},
{
0x0005e0
,
16
,
0x01
,
0x00000d10
},
{
0x000510
,
16
,
0x01
,
0x3f800000
},
{
0x000520
,
1
,
0x01
,
0x000002b6
},
{
0x000529
,
1
,
0x01
,
0x00000001
},
{
0x000530
,
16
,
0x01
,
0xffff0000
},
{
0x000550
,
32
,
0x01
,
0xffff0000
},
{
0x000585
,
1
,
0x01
,
0x0000003f
},
{
0x000576
,
1
,
0x01
,
0x00000003
},
{
0x00057b
,
1
,
0x01
,
0x00000059
},
{
0x000586
,
1
,
0x01
,
0x00000040
},
{
0x000582
,
2
,
0x01
,
0x00000080
},
{
0x000595
,
1
,
0x01
,
0x00400040
},
{
0x000596
,
1
,
0x01
,
0x00000492
},
{
0x000597
,
1
,
0x01
,
0x08080203
},
{
0x0005ad
,
1
,
0x01
,
0x00000008
},
{
0x000598
,
1
,
0x01
,
0x00020001
},
{
0x0005d4
,
1
,
0x01
,
0x00000001
},
{
0x0005c2
,
1
,
0x01
,
0x00000001
},
{
0x000638
,
2
,
0x01
,
0x00000001
},
{
0x00063a
,
1
,
0x01
,
0x00000002
},
{
0x00063b
,
2
,
0x01
,
0x00000001
},
{
0x00063d
,
1
,
0x01
,
0x00000002
},
{
0x00063e
,
1
,
0x01
,
0x00000001
},
{
0x0008b8
,
8
,
0x01
,
0x00000001
},
{
0x000900
,
8
,
0x01
,
0x00000001
},
{
0x000908
,
8
,
0x01
,
0x00000002
},
{
0x000910
,
16
,
0x01
,
0x00000001
},
{
0x000920
,
8
,
0x01
,
0x00000002
},
{
0x000928
,
8
,
0x01
,
0x00000001
},
{
0x000662
,
1
,
0x01
,
0x00000001
},
{
0x000648
,
9
,
0x01
,
0x00000001
},
{
0x000674
,
1
,
0x01
,
0x00000001
},
{
0x000658
,
1
,
0x01
,
0x0000000f
},
{
0x0007ff
,
1
,
0x01
,
0x0000000a
},
{
0x00066a
,
1
,
0x01
,
0x40000000
},
{
0x00066b
,
1
,
0x01
,
0x10000000
},
{
0x00066c
,
2
,
0x01
,
0xffff0000
},
{
0x0007af
,
2
,
0x01
,
0x00000008
},
{
0x0007f6
,
1
,
0x01
,
0x00000001
},
{
0x0006b2
,
1
,
0x01
,
0x00000055
},
{
0x0007ad
,
1
,
0x01
,
0x00000003
},
{
0x000971
,
1
,
0x01
,
0x00000008
},
{
0x000972
,
1
,
0x01
,
0x00000040
},
{
0x000973
,
1
,
0x01
,
0x0000012c
},
{
0x00097c
,
1
,
0x01
,
0x00000040
},
{
0x000975
,
1
,
0x01
,
0x00000020
},
{
0x000976
,
1
,
0x01
,
0x00000001
},
{
0x000977
,
1
,
0x01
,
0x00000020
},
{
0x000978
,
1
,
0x01
,
0x00000001
},
{
0x000957
,
1
,
0x01
,
0x00000003
},
{
0x00095e
,
1
,
0x01
,
0x20164010
},
{
0x00095f
,
1
,
0x01
,
0x00000020
},
{
0x000a0d
,
1
,
0x01
,
0x00000006
},
{
0x00097d
,
1
,
0x01
,
0x0000000c
},
{
0x000683
,
1
,
0x01
,
0x00000006
},
{
0x000687
,
1
,
0x01
,
0x003fffff
},
{
0x0006a0
,
1
,
0x01
,
0x00000005
},
{
0x000840
,
1
,
0x01
,
0x00400008
},
{
0x000841
,
1
,
0x01
,
0x08000080
},
{
0x000842
,
1
,
0x01
,
0x00400008
},
{
0x000843
,
1
,
0x01
,
0x08000080
},
{
0x000818
,
8
,
0x01
,
0x00000000
},
{
0x000848
,
16
,
0x01
,
0x00000000
},
{
0x000738
,
1
,
0x01
,
0x00000000
},
{
0x0006aa
,
1
,
0x01
,
0x00000001
},
{
0x0006ab
,
1
,
0x01
,
0x00000002
},
{
0x0006ac
,
1
,
0x01
,
0x00000080
},
{
0x0006ad
,
2
,
0x01
,
0x00000100
},
{
0x0006b1
,
1
,
0x01
,
0x00000011
},
{
0x0006bb
,
1
,
0x01
,
0x000000cf
},
{
0x0006ce
,
1
,
0x01
,
0x2a712488
},
{
0x000739
,
1
,
0x01
,
0x4085c000
},
{
0x00073a
,
1
,
0x01
,
0x00000080
},
{
0x000786
,
1
,
0x01
,
0x80000100
},
{
0x00073c
,
1
,
0x01
,
0x00010100
},
{
0x00073d
,
1
,
0x01
,
0x02800000
},
{
0x000787
,
1
,
0x01
,
0x000000cf
},
{
0x00078c
,
1
,
0x01
,
0x00000008
},
{
0x000792
,
1
,
0x01
,
0x00000001
},
{
0x000794
,
3
,
0x01
,
0x00000001
},
{
0x000797
,
1
,
0x01
,
0x000000cf
},
{
0x000836
,
1
,
0x01
,
0x00000001
},
{
0x00079a
,
1
,
0x01
,
0x00000002
},
{
0x000833
,
1
,
0x01
,
0x04444480
},
{
0x0007a1
,
1
,
0x01
,
0x00000001
},
{
0x0007a3
,
3
,
0x01
,
0x00000001
},
{
0x000831
,
1
,
0x01
,
0x00000004
},
{
0x000b07
,
1
,
0x01
,
0x00000002
},
{
0x000b08
,
2
,
0x01
,
0x00000100
},
{
0x000b0a
,
1
,
0x01
,
0x00000001
},
{
0x000a04
,
1
,
0x01
,
0x000000ff
},
{
0x000a0b
,
1
,
0x01
,
0x00000040
},
{
0x00097f
,
1
,
0x01
,
0x00000100
},
{
0x000a02
,
1
,
0x01
,
0x00000001
},
{
0x000809
,
1
,
0x01
,
0x00000007
},
{
0x00c221
,
1
,
0x01
,
0x00000040
},
{
0x00c1b0
,
8
,
0x01
,
0x0000000f
},
{
0x00c1b8
,
1
,
0x01
,
0x0fac6881
},
{
0x00c1b9
,
1
,
0x01
,
0x00fac688
},
{
0x00c401
,
1
,
0x01
,
0x00000001
},
{
0x00c402
,
1
,
0x01
,
0x00010001
},
{
0x00c403
,
2
,
0x01
,
0x00000001
},
{
0x00c40e
,
1
,
0x01
,
0x00000020
},
{
0x00c413
,
4
,
0x01
,
0x88888888
},
{
0x00c423
,
1
,
0x01
,
0x0000ff00
},
{
0x00c420
,
1
,
0x01
,
0x00880101
},
{
0x01e100
,
1
,
0x01
,
0x00000001
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_icmd
[]
=
{
{
gm204_grctx_init_icmd_0
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_b197_0
[]
=
{
{
0x000800
,
8
,
0x40
,
0x00000000
},
{
0x000804
,
8
,
0x40
,
0x00000000
},
{
0x000808
,
8
,
0x40
,
0x00000400
},
{
0x00080c
,
8
,
0x40
,
0x00000300
},
{
0x000810
,
1
,
0x04
,
0x000000cf
},
{
0x000850
,
7
,
0x40
,
0x00000000
},
{
0x000814
,
8
,
0x40
,
0x00000040
},
{
0x000818
,
8
,
0x40
,
0x00000001
},
{
0x00081c
,
8
,
0x40
,
0x00000000
},
{
0x000820
,
8
,
0x40
,
0x00000000
},
{
0x001c00
,
16
,
0x10
,
0x00000000
},
{
0x001c04
,
16
,
0x10
,
0x00000000
},
{
0x001c08
,
16
,
0x10
,
0x00000000
},
{
0x001c0c
,
16
,
0x10
,
0x00000000
},
{
0x001d00
,
16
,
0x10
,
0x00000000
},
{
0x001d04
,
16
,
0x10
,
0x00000000
},
{
0x001d08
,
16
,
0x10
,
0x00000000
},
{
0x001d0c
,
16
,
0x10
,
0x00000000
},
{
0x001f00
,
16
,
0x08
,
0x00000000
},
{
0x001f04
,
16
,
0x08
,
0x00000000
},
{
0x001f80
,
16
,
0x08
,
0x00000000
},
{
0x001f84
,
16
,
0x08
,
0x00000000
},
{
0x002000
,
1
,
0x04
,
0x00000000
},
{
0x002040
,
1
,
0x04
,
0x00000011
},
{
0x002080
,
1
,
0x04
,
0x00000020
},
{
0x0020c0
,
1
,
0x04
,
0x00000030
},
{
0x002100
,
1
,
0x04
,
0x00000040
},
{
0x002140
,
1
,
0x04
,
0x00000051
},
{
0x00200c
,
6
,
0x40
,
0x00000001
},
{
0x002010
,
1
,
0x04
,
0x00000000
},
{
0x002050
,
1
,
0x04
,
0x00000000
},
{
0x002090
,
1
,
0x04
,
0x00000001
},
{
0x0020d0
,
1
,
0x04
,
0x00000002
},
{
0x002110
,
1
,
0x04
,
0x00000003
},
{
0x002150
,
1
,
0x04
,
0x00000004
},
{
0x000380
,
4
,
0x20
,
0x00000000
},
{
0x000384
,
4
,
0x20
,
0x00000000
},
{
0x000388
,
4
,
0x20
,
0x00000000
},
{
0x00038c
,
4
,
0x20
,
0x00000000
},
{
0x000700
,
4
,
0x10
,
0x00000000
},
{
0x000704
,
4
,
0x10
,
0x00000000
},
{
0x000708
,
4
,
0x10
,
0x00000000
},
{
0x002800
,
128
,
0x04
,
0x00000000
},
{
0x000a00
,
16
,
0x20
,
0x00000000
},
{
0x000a04
,
16
,
0x20
,
0x00000000
},
{
0x000a08
,
16
,
0x20
,
0x00000000
},
{
0x000a0c
,
16
,
0x20
,
0x00000000
},
{
0x000a10
,
16
,
0x20
,
0x00000000
},
{
0x000a14
,
16
,
0x20
,
0x00000000
},
{
0x000a18
,
16
,
0x20
,
0x00006420
},
{
0x000a1c
,
16
,
0x20
,
0x00000000
},
{
0x000c00
,
16
,
0x10
,
0x00000000
},
{
0x000c04
,
16
,
0x10
,
0x00000000
},
{
0x000c08
,
16
,
0x10
,
0x00000000
},
{
0x000c0c
,
16
,
0x10
,
0x3f800000
},
{
0x000d00
,
8
,
0x08
,
0xffff0000
},
{
0x000d04
,
8
,
0x08
,
0xffff0000
},
{
0x000e00
,
16
,
0x10
,
0x00000000
},
{
0x000e04
,
16
,
0x10
,
0xffff0000
},
{
0x000e08
,
16
,
0x10
,
0xffff0000
},
{
0x000d40
,
4
,
0x08
,
0x00000000
},
{
0x000d44
,
4
,
0x08
,
0x00000000
},
{
0x001e00
,
8
,
0x20
,
0x00000001
},
{
0x001e04
,
8
,
0x20
,
0x00000001
},
{
0x001e08
,
8
,
0x20
,
0x00000002
},
{
0x001e0c
,
8
,
0x20
,
0x00000001
},
{
0x001e10
,
8
,
0x20
,
0x00000001
},
{
0x001e14
,
8
,
0x20
,
0x00000002
},
{
0x001e18
,
8
,
0x20
,
0x00000001
},
{
0x001480
,
8
,
0x10
,
0x00000000
},
{
0x001484
,
8
,
0x10
,
0x00000000
},
{
0x001488
,
8
,
0x10
,
0x00000000
},
{
0x003400
,
128
,
0x04
,
0x00000000
},
{
0x00030c
,
1
,
0x04
,
0x00000001
},
{
0x001944
,
1
,
0x04
,
0x00000000
},
{
0x001514
,
1
,
0x04
,
0x00000000
},
{
0x000d68
,
1
,
0x04
,
0x0000ffff
},
{
0x00121c
,
1
,
0x04
,
0x0fac6881
},
{
0x000fac
,
1
,
0x04
,
0x00000001
},
{
0x001538
,
1
,
0x04
,
0x00000001
},
{
0x000fe0
,
2
,
0x04
,
0x00000000
},
{
0x000fe8
,
1
,
0x04
,
0x00000014
},
{
0x000fec
,
1
,
0x04
,
0x00000040
},
{
0x000ff0
,
1
,
0x04
,
0x00000000
},
{
0x00179c
,
1
,
0x04
,
0x00000000
},
{
0x001228
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1
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0x04
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0x00000400
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0x00122c
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1
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0x04
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0x00000300
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0x001230
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1
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0x04
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0x00010001
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0x0007f8
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1
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0x04
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0x00000000
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0x001208
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1
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0x04
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0x00000000
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0x0015b4
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1
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0x04
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0x00000001
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0x0015cc
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1
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0x04
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0x00000000
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{
0x001534
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1
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0x04
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0x00000000
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0x000754
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1
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0x04
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0x00000001
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0x000fb0
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1
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0x04
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0x00000000
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0x0015d0
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1
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0x04
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0x00000000
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0x0011e0
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4
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0x04
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0x88888888
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0x00153c
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1
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0x04
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0x00000000
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0x0016b4
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1
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0x04
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0x00000003
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{
0x000fa4
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1
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0x04
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0x00000001
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{
0x000fbc
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4
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0x04
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0x0000ffff
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{
0x000fa8
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1
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0x04
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0x0000ffff
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0x000df8
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2
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0x04
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0x00000000
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{
0x001948
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1
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0x04
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0x00000000
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0x001970
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1
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0x04
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0x00000001
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0x00161c
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1
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0x04
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0x000009f0
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{
0x000dcc
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1
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0x04
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0x00000010
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0x0015e4
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1
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0x04
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0x00000000
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0x001160
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32
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0x04
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0x25e00040
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0x001880
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32
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0x04
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0x00000000
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0x000f84
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2
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0x04
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0x00000000
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0x0017c8
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2
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0x04
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0x00000000
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0x0017d0
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1
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0x04
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0x000000ff
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0x0017d4
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1
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0x04
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0xffffffff
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0x0017d8
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1
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0x04
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0x00000002
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0x0017dc
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1
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0x04
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0x00000000
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0x0015f4
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2
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0x04
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0x00000000
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0x001434
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2
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0x04
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0x00000000
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0x000d74
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1
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0x04
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0x00000000
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{
0x0013a4
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1
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0x04
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0x00000000
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{
0x001318
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1
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0x04
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0x00000001
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{
0x001080
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2
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0x04
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0x00000000
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{
0x001088
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2
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0x04
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0x00000001
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{
0x001090
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1
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0x04
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0x00000000
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{
0x001094
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1
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0x04
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0x00000001
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{
0x001098
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1
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0x04
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0x00000000
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{
0x00109c
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1
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0x04
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0x00000001
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{
0x0010a0
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2
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0x04
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0x00000000
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{
0x001644
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1
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0x04
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0x00000000
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0x000748
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1
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0x04
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0x00000000
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0x000de8
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1
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0x04
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0x00000000
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0x001648
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1
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0x04
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0x00000000
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0x0012a4
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1
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0x04
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0x00000000
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0x001120
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4
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0x04
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0x00000000
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0x001118
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1
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0x04
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0x00000000
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0x00164c
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1
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0x04
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0x00000000
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0x001658
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1
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0x04
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0x00000000
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0x001910
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1
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0x04
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0x00000290
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{
0x001518
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1
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0x04
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0x00000000
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{
0x00165c
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1
,
0x04
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0x00000001
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{
0x001520
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1
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0x04
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0x00000000
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{
0x001604
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1
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0x04
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0x00000000
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0x001570
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1
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0x04
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0x00000000
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0x0013b0
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2
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0x04
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0x3f800000
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0x00020c
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1
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0x04
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0x00000000
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0x001670
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1
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0x04
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0x30201000
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0x001674
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1
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0x04
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0x70605040
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0x001678
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1
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0x04
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0xb8a89888
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0x00167c
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1
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0x04
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0xf8e8d8c8
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{
0x00166c
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1
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0x04
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0x00000000
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{
0x001680
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1
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0x04
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0x00ffff00
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{
0x0012d0
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1
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0x04
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0x00000003
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0x00113c
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1
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0x04
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0x00000000
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{
0x0012d4
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1
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0x04
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0x00000002
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{
0x001684
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2
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0x04
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0x00000000
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{
0x000dac
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2
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0x04
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0x00001b02
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0x000db4
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1
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0x04
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0x00000000
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{
0x00168c
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1
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0x04
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0x00000000
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{
0x0015bc
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1
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0x04
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0x00000000
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{
0x00156c
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1
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0x04
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0x00000000
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{
0x00187c
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1
,
0x04
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0x00000000
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{
0x001110
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1
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0x04
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0x00000001
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{
0x000dc0
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3
,
0x04
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0x00000000
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{
0x000f40
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5
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0x04
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0x00000000
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0x001234
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1
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0x04
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0x00000000
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{
0x001690
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1
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0x04
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0x00000000
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0x000790
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5
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0x04
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0x00000000
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0x00077c
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1
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0x04
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0x00000000
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0x001000
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1
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0x04
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0x00000010
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0x0010fc
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1
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0x04
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0x00000000
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{
0x001290
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1
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0x04
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0x00000000
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0x000218
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1
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0x04
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0x00000010
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0x0012d8
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1
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0x04
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0x00000000
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{
0x0012dc
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1
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0x04
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0x00000010
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{
0x000d94
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1
,
0x04
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0x00000001
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{
0x00155c
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2
,
0x04
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0x00000000
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{
0x001564
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1
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0x04
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0x00000fff
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0x001574
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2
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0x04
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0x00000000
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0x00157c
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1
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0x04
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0x000fffff
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0x001354
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1
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0x04
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0x00000000
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0x001610
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1
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0x04
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0x00000012
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{
0x001608
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2
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0x04
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0x00000000
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0x00260c
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1
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0x04
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0x00000000
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0x0007ac
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1
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0x04
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0x00000000
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0x00162c
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1
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0x04
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0x00000003
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0x000210
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1
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0x04
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0x00000000
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0x000320
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1
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0x04
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0x00000000
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0x000324
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6
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0x04
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0x3f800000
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0x000750
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1
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0x04
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0x00000000
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0x000760
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1
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0x04
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0x39291909
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0x000764
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1
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0x04
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0x79695949
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0x000768
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1
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0x04
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0xb9a99989
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0x00076c
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1
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0x04
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0xf9e9d9c9
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0x000770
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1
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0x04
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0x30201000
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0x000774
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1
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0x04
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0x70605040
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0x000778
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1
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0x04
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0x00009080
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0x000780
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1
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0x04
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0x39291909
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0x000784
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1
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0x04
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0x000788
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1
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0x04
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0x00078c
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1
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0x04
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0xf9e9d9c9
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0x0007d0
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1
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0x04
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0x0007d4
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1
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0x04
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0x70605040
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0x0007d8
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1
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0x04
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0x00009080
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0x001004
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1
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0x04
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0x00000000
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{
0x001240
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8
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0x04
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0x00000000
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{
0x00037c
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1
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0x04
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0x00000001
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{
0x000740
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1
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0x04
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0x00000000
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{
0x001148
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1
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0x04
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0x00000000
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0x000fb4
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1
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0x04
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0x00000000
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0x000fb8
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1
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0x04
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0x00000002
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0x001130
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1
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0x04
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0x00000002
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0x000fd4
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2
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0x04
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0x00000000
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0x001030
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1
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0x04
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0x20181008
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0x001034
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1
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0x04
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0x001038
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1
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0x60585048
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0x00103c
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1
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0x04
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0x000744
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1
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0x04
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0x00000000
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0x002600
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1
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0x04
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0x00000000
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0x001918
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1
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0x04
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0x00000000
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0x00191c
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1
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0x04
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0x00000900
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{
0x001920
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1
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0x04
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0x00000405
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{
0x001308
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1
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0x04
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0x00000001
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{
0x001924
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1
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0x04
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0x00000000
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{
0x0013ac
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1
,
0x04
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0x00000000
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{
0x00192c
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1
,
0x04
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0x00000001
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{
0x00193c
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1
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0x04
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0x00002c1c
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{
0x000d7c
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1
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0x04
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0x00000000
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0x000f8c
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1
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0x04
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0x00000000
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{
0x0002c0
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1
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0x04
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0x00000001
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{
0x001510
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1
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0x04
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0x00000000
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{
0x001940
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1
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0x04
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0x00000000
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0x000ff4
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2
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0x04
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0x00000000
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0x00194c
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2
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0x04
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0x00000000
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0x001968
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1
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0x04
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0x00000000
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0x001590
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1
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0x04
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0x0000003f
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0x0007e8
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4
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0x04
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0x00000000
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0x00196c
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1
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0x04
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0x00000011
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0x0002e4
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1
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0x04
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0x0000b001
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0x00036c
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2
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0x04
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0x00000000
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0x00197c
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1
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0x04
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0x00000000
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0x000fcc
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2
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0x04
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0x00000000
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0x0002d8
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1
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0x04
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0x00000040
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0x001980
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1
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0x04
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0x001504
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1
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0x04
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0x00000080
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0x001984
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1
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0x04
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0x00000000
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0x000f60
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1
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0x04
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0x00000000
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0x000f64
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1
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0x04
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0x000f68
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1
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0x04
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0x000f6c
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1
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0x04
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0x08080203
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0x001108
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1
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0x04
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0x00000008
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0x000f70
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1
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0x04
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0x00080001
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0x000ffc
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1
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0x04
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0x00000000
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0x001134
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1
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0x04
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0x00000000
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0x000f1c
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1
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0x04
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0x00000000
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{
0x0011f8
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1
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0x04
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0x00000000
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{
0x001138
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1
,
0x04
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0x00000001
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{
0x000300
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1
,
0x04
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0x00000001
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{
0x0013a8
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1
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0x04
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0x00000000
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{
0x001224
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1
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0x04
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0x00000000
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0x0012ec
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1
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0x00000000
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{
0x001310
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1
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0x04
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0x00000000
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{
0x001314
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1
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0x04
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0x00000001
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{
0x001380
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1
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0x04
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0x00000000
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{
0x001384
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4
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0x04
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0x00000001
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{
0x001394
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1
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0x04
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0x00000000
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{
0x00139c
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1
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0x04
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0x00000000
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0x001398
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1
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0x04
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0x00000000
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{
0x001594
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1
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0x04
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0x00000000
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{
0x001598
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4
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0x04
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0x00000001
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0x000f54
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3
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0x04
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0x00000000
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{
0x0019bc
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1
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0x04
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0x00000000
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0x000f9c
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2
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0x04
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0x00000000
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0x0012cc
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1
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0x00000000
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0x0012e8
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1
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0x04
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0x00000000
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{
0x00130c
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1
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0x04
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0x00000001
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{
0x001360
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8
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0x04
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0x00000000
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{
0x00133c
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2
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0x04
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0x00000001
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{
0x001344
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1
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0x04
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0x00000002
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{
0x001348
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2
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0x04
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0x00000001
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0x001350
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1
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0x04
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0x00000002
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{
0x001358
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1
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0x04
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0x00000001
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0x0012e4
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1
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0x00000000
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0x00131c
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4
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0x04
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0x00000000
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0x0019c0
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1
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0x00000000
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0x001140
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1
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0x00000000
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0x000dd0
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1
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0x04
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0x00000000
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0x000dd4
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1
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0x04
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0x00000001
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0x0002f4
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1
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0x04
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0x00000000
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0x0019c4
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1
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0x0019c8
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1
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0x00135c
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1
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0x000f90
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1
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0x00000000
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{
0x0019e0
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8
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0x04
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0x00000001
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{
0x0019cc
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1
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0x04
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0x00000001
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{
0x00111c
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1
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0x04
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0x00000001
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{
0x0015b8
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1
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0x04
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0x00000000
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{
0x001a00
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1
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0x04
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0x001a04
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7
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0x00000000
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0x000d6c
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2
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0x04
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0x0010f8
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0x000d80
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5
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0x00000000
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0x000da0
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0x0007a4
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2
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0x001508
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1
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0x00150c
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1
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0x04
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0x001668
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1
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0x000318
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2
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0x04
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0x00000008
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0x000d9c
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1
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0x04
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0x00000001
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0x000f14
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1
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0x04
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0x00000000
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0x000374
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1
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0x04
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0x000378
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1
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0x0007dc
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0x00000000
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0x00074c
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0x04
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0x001420
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1
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0x001008
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0x00100c
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1
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0x04
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0x001010
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1
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0x04
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0x0000012c
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0x000d60
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1
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0x04
,
0x00000040
},
{
0x001018
,
1
,
0x04
,
0x00000020
},
{
0x00101c
,
1
,
0x04
,
0x00000001
},
{
0x001020
,
1
,
0x04
,
0x00000020
},
{
0x001024
,
1
,
0x04
,
0x00000001
},
{
0x001444
,
3
,
0x04
,
0x00000000
},
{
0x000360
,
1
,
0x04
,
0x20164010
},
{
0x000364
,
1
,
0x04
,
0x00000020
},
{
0x000368
,
1
,
0x04
,
0x00000000
},
{
0x000da8
,
1
,
0x04
,
0x00000030
},
{
0x000de4
,
1
,
0x04
,
0x00000000
},
{
0x000204
,
1
,
0x04
,
0x00000006
},
{
0x0002d0
,
1
,
0x04
,
0x003fffff
},
{
0x001220
,
1
,
0x04
,
0x00000005
},
{
0x000fdc
,
1
,
0x04
,
0x00000000
},
{
0x000f98
,
1
,
0x04
,
0x00400008
},
{
0x001284
,
1
,
0x04
,
0x08000080
},
{
0x001450
,
1
,
0x04
,
0x00400008
},
{
0x001454
,
1
,
0x04
,
0x08000080
},
{
0x000214
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_mthd
[]
=
{
{
gm204_grctx_init_b197_0
,
0xb197
},
{
gf100_grctx_init_902d_0
,
0x902d
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_fe_0
[]
=
{
{
0x404004
,
8
,
0x04
,
0x00000000
},
{
0x404024
,
1
,
0x04
,
0x0000e000
},
{
0x404028
,
8
,
0x04
,
0x00000000
},
{
0x4040a8
,
8
,
0x04
,
0x00000000
},
{
0x4040c8
,
1
,
0x04
,
0xf801008f
},
{
0x4040d0
,
6
,
0x04
,
0x00000000
},
{
0x4040f8
,
1
,
0x04
,
0x00000000
},
{
0x404100
,
10
,
0x04
,
0x00000000
},
{
0x404130
,
2
,
0x04
,
0x00000000
},
{
0x404150
,
1
,
0x04
,
0x0000002e
},
{
0x404154
,
2
,
0x04
,
0x00000800
},
{
0x404164
,
1
,
0x04
,
0x00000045
},
{
0x40417c
,
2
,
0x04
,
0x00000000
},
{
0x404194
,
1
,
0x04
,
0x33000700
},
{
0x4041a0
,
4
,
0x04
,
0x00000000
},
{
0x4041c4
,
2
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_ds_0
[]
=
{
{
0x405800
,
1
,
0x04
,
0x8f8001bf
},
{
0x405830
,
1
,
0x04
,
0x04001000
},
{
0x405834
,
1
,
0x04
,
0x08000000
},
{
0x405838
,
1
,
0x04
,
0x00010000
},
{
0x405854
,
1
,
0x04
,
0x00000000
},
{
0x405870
,
4
,
0x04
,
0x00000001
},
{
0x405a00
,
2
,
0x04
,
0x00000000
},
{
0x405a18
,
1
,
0x04
,
0x00000000
},
{
0x405a1c
,
1
,
0x04
,
0x000000ff
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_cwd_0
[]
=
{
{
0x405b00
,
1
,
0x04
,
0x00000000
},
{
0x405b10
,
1
,
0x04
,
0x00001000
},
{
0x405b20
,
1
,
0x04
,
0x04000000
},
{
0x405b60
,
6
,
0x04
,
0x00000000
},
{
0x405ba0
,
6
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_pd_0
[]
=
{
{
0x406020
,
1
,
0x04
,
0x17410001
},
{
0x406028
,
4
,
0x04
,
0x00000001
},
{
0x4064a8
,
1
,
0x04
,
0x00000000
},
{
0x4064ac
,
1
,
0x04
,
0x00003fff
},
{
0x4064b0
,
3
,
0x04
,
0x00000000
},
{
0x4064c0
,
1
,
0x04
,
0x80400280
},
{
0x4064c4
,
1
,
0x04
,
0x0400ffff
},
{
0x4064c8
,
1
,
0x04
,
0x01800780
},
{
0x4064cc
,
9
,
0x04
,
0x00000000
},
{
0x4064fc
,
1
,
0x04
,
0x0000022a
},
{
0x406500
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_be_0
[]
=
{
{
0x408800
,
1
,
0x04
,
0x32882a3c
},
{
0x408804
,
1
,
0x04
,
0x00000040
},
{
0x408808
,
1
,
0x04
,
0x1003e005
},
{
0x408840
,
1
,
0x04
,
0x00000e0b
},
{
0x408900
,
1
,
0x04
,
0xb080b801
},
{
0x408904
,
1
,
0x04
,
0x63038001
},
{
0x408908
,
1
,
0x04
,
0x12c8502f
},
{
0x408980
,
1
,
0x04
,
0x0000011d
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_hub
[]
=
{
{
gf100_grctx_init_main_0
},
{
gm204_grctx_init_fe_0
},
{
gk110_grctx_init_pri_0
},
{
gk104_grctx_init_memfmt_0
},
{
gm204_grctx_init_ds_0
},
{
gm204_grctx_init_cwd_0
},
{
gm204_grctx_init_pd_0
},
{
gk208_grctx_init_rstr2d_0
},
{
gk104_grctx_init_scc_0
},
{
gm204_grctx_init_be_0
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_prop_0
[]
=
{
{
0x418400
,
1
,
0x04
,
0x38e01e00
},
{
0x418404
,
1
,
0x04
,
0x70001fff
},
{
0x41840c
,
1
,
0x04
,
0x20001008
},
{
0x418410
,
2
,
0x04
,
0x0fff0fff
},
{
0x418418
,
1
,
0x04
,
0x07ff07ff
},
{
0x41841c
,
1
,
0x04
,
0x3feffbff
},
{
0x418450
,
6
,
0x04
,
0x00000000
},
{
0x418468
,
1
,
0x04
,
0x00000001
},
{
0x41846c
,
2
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_gpc_unk_1
[]
=
{
{
0x418600
,
1
,
0x04
,
0x0000007f
},
{
0x418684
,
1
,
0x04
,
0x0000001f
},
{
0x418700
,
1
,
0x04
,
0x00000002
},
{
0x418704
,
1
,
0x04
,
0x00000080
},
{
0x418708
,
1
,
0x04
,
0x40000000
},
{
0x41870c
,
2
,
0x04
,
0x00000000
},
{
0x418728
,
1
,
0x04
,
0x00010000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_setup_0
[]
=
{
{
0x418800
,
1
,
0x04
,
0x7006863a
},
{
0x418808
,
1
,
0x04
,
0x00000000
},
{
0x418810
,
1
,
0x04
,
0x00000000
},
{
0x418828
,
1
,
0x04
,
0x00000044
},
{
0x418830
,
1
,
0x04
,
0x10000001
},
{
0x4188d8
,
1
,
0x04
,
0x00000008
},
{
0x4188e0
,
1
,
0x04
,
0x01000000
},
{
0x4188e8
,
5
,
0x04
,
0x00000000
},
{
0x4188fc
,
1
,
0x04
,
0x20100058
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_gpm_0
[]
=
{
{
0x418c10
,
8
,
0x04
,
0x00000000
},
{
0x418c40
,
1
,
0x04
,
0xffffffff
},
{
0x418c6c
,
1
,
0x04
,
0x00000001
},
{
0x418c80
,
1
,
0x04
,
0x20200000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_gpc_unk_2
[]
=
{
{
0x418e00
,
1
,
0x04
,
0x90040000
},
{
0x418e24
,
1
,
0x04
,
0x00000000
},
{
0x418e28
,
1
,
0x04
,
0x00000030
},
{
0x418e2c
,
1
,
0x04
,
0x00000100
},
{
0x418e30
,
3
,
0x04
,
0x00000000
},
{
0x418e40
,
22
,
0x04
,
0x00000000
},
{
0x418ea0
,
12
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_gpc
[]
=
{
{
gm107_grctx_init_gpc_unk_0
},
{
gm204_grctx_init_prop_0
},
{
gm204_grctx_init_gpc_unk_1
},
{
gm204_grctx_init_setup_0
},
{
gf100_grctx_init_zcull_0
},
{
gk208_grctx_init_crstr_0
},
{
gm204_grctx_init_gpm_0
},
{
gm204_grctx_init_gpc_unk_2
},
{
gf100_grctx_init_gcc_0
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_pe_0
[]
=
{
{
0x419848
,
1
,
0x04
,
0x00000000
},
{
0x419864
,
1
,
0x04
,
0x00000029
},
{
0x419888
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_tex_0
[]
=
{
{
0x419a00
,
1
,
0x04
,
0x000100f0
},
{
0x419a04
,
1
,
0x04
,
0x00000005
},
{
0x419a08
,
1
,
0x04
,
0x00000621
},
{
0x419a0c
,
1
,
0x04
,
0x00320000
},
{
0x419a10
,
1
,
0x04
,
0x00000000
},
{
0x419a14
,
1
,
0x04
,
0x00000200
},
{
0x419a1c
,
1
,
0x04
,
0x0010c000
},
{
0x419a20
,
1
,
0x04
,
0x20008a00
},
{
0x419a30
,
1
,
0x04
,
0x00000001
},
{
0x419a3c
,
1
,
0x04
,
0x0000181e
},
{
0x419ac4
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_mpc_0
[]
=
{
{
0x419c00
,
1
,
0x04
,
0x0000009a
},
{
0x419c04
,
1
,
0x04
,
0x80000bd6
},
{
0x419c08
,
1
,
0x04
,
0x00000002
},
{
0x419c20
,
1
,
0x04
,
0x00000000
},
{
0x419c24
,
1
,
0x04
,
0x00084210
},
{
0x419c28
,
1
,
0x04
,
0x3efbefbe
},
{
0x419c2c
,
1
,
0x04
,
0x00000000
},
{
0x419c34
,
1
,
0x04
,
0x71ff1ff3
},
{
0x419c3c
,
1
,
0x04
,
0x00001919
},
{
0x419c50
,
1
,
0x04
,
0x00000005
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_l1c_0
[]
=
{
{
0x419c84
,
1
,
0x04
,
0x0000003e
},
{
0x419c90
,
1
,
0x04
,
0x0000000a
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_sm_0
[]
=
{
{
0x419e04
,
3
,
0x04
,
0x00000000
},
{
0x419e10
,
1
,
0x04
,
0x00001c02
},
{
0x419e44
,
1
,
0x04
,
0x00d3eff2
},
{
0x419e48
,
1
,
0x04
,
0x00000000
},
{
0x419e4c
,
1
,
0x04
,
0x0000007f
},
{
0x419e50
,
1
,
0x04
,
0x00000000
},
{
0x419e58
,
6
,
0x04
,
0x00000000
},
{
0x419e74
,
10
,
0x04
,
0x00000000
},
{
0x419eac
,
1
,
0x04
,
0x0001cf8b
},
{
0x419eb0
,
1
,
0x04
,
0x00030300
},
{
0x419eb8
,
1
,
0x04
,
0x40000000
},
{
0x419ef0
,
24
,
0x04
,
0x00000000
},
{
0x419f68
,
2
,
0x04
,
0x00000000
},
{
0x419f70
,
1
,
0x04
,
0x00000020
},
{
0x419f78
,
1
,
0x04
,
0x00010beb
},
{
0x419f7c
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_tpc
[]
=
{
{
gm204_grctx_init_pe_0
},
{
gm204_grctx_init_tex_0
},
{
gm204_grctx_init_mpc_0
},
{
gm204_grctx_init_l1c_0
},
{
gm204_grctx_init_sm_0
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_pes_0
[]
=
{
{
0x41be24
,
1
,
0x04
,
0x0000000e
},
{}
};
static
const
struct
gf100_gr_init
gm204_grctx_init_cbm_0
[]
=
{
{
0x41bec0
,
1
,
0x04
,
0x00000000
},
{
0x41bec4
,
1
,
0x04
,
0x01030000
},
{
0x41bee4
,
1
,
0x04
,
0x00000000
},
{
0x41bef0
,
1
,
0x04
,
0x000003ff
},
{
0x41bef4
,
2
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_pack
gm204_grctx_pack_ppc
[]
=
{
{
gm204_grctx_init_pes_0
},
{
gm204_grctx_init_cbm_0
},
{
gm107_grctx_init_wwdx_0
},
{}
};
/*******************************************************************************
* PGRAPH context implementation
******************************************************************************/
static
void
gm204_grctx_generate_tpcid
(
struct
gf100_gr_priv
*
priv
)
{
int
gpc
,
tpc
,
id
;
for
(
tpc
=
0
,
id
=
0
;
tpc
<
4
;
tpc
++
)
{
for
(
gpc
=
0
;
gpc
<
priv
->
gpc_nr
;
gpc
++
)
{
if
(
tpc
<
priv
->
tpc_nr
[
gpc
])
{
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x698
),
id
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0c10
+
tpc
*
4
),
id
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x088
),
id
);
id
++
;
}
}
}
}
static
void
gm204_grctx_generate_rop_active_fbps
(
struct
gf100_gr_priv
*
priv
)
{
const
u32
fbp_count
=
nv_rd32
(
priv
,
0x12006c
);
nv_mask
(
priv
,
0x408850
,
0x0000000f
,
fbp_count
);
/* zrop */
nv_mask
(
priv
,
0x408958
,
0x0000000f
,
fbp_count
);
/* crop */
}
static
void
gm204_grctx_generate_405b60
(
struct
gf100_gr_priv
*
priv
)
{
const
u32
dist_nr
=
DIV_ROUND_UP
(
priv
->
tpc_total
,
4
);
u32
dist
[
TPC_MAX
]
=
{};
u32
gpcs
[
GPC_MAX
]
=
{};
u8
tpcnr
[
GPC_MAX
];
int
tpc
,
gpc
,
i
;
memcpy
(
tpcnr
,
priv
->
tpc_nr
,
sizeof
(
priv
->
tpc_nr
));
/* won't result in the same distribution as the binary driver where
* some of the gpcs have more tpcs than others, but this shall do
* for the moment. the code for earlier gpus has this issue too.
*/
for
(
gpc
=
-
1
,
i
=
0
;
i
<
priv
->
tpc_total
;
i
++
)
{
do
{
gpc
=
(
gpc
+
1
)
%
priv
->
gpc_nr
;
}
while
(
!
tpcnr
[
gpc
]);
tpc
=
priv
->
tpc_nr
[
gpc
]
-
tpcnr
[
gpc
]
--
;
dist
[
i
/
4
]
|=
((
gpc
<<
4
)
|
tpc
)
<<
((
i
%
4
)
*
8
);
gpcs
[
gpc
]
|=
i
<<
(
tpc
*
8
);
}
for
(
i
=
0
;
i
<
dist_nr
;
i
++
)
nv_wr32
(
priv
,
0x405b60
+
(
i
*
4
),
dist
[
i
]);
for
(
i
=
0
;
i
<
priv
->
gpc_nr
;
i
++
)
nv_wr32
(
priv
,
0x405ba0
+
(
i
*
4
),
gpcs
[
i
]);
}
static
void
gm204_grctx_generate_main
(
struct
gf100_gr_priv
*
priv
,
struct
gf100_grctx
*
info
)
{
struct
gf100_grctx_oclass
*
oclass
=
(
void
*
)
nv_engine
(
priv
)
->
cclass
;
u32
tmp
;
int
i
;
gf100_gr_mmio
(
priv
,
oclass
->
hub
);
gf100_gr_mmio
(
priv
,
oclass
->
gpc
);
gf100_gr_mmio
(
priv
,
oclass
->
zcull
);
gf100_gr_mmio
(
priv
,
oclass
->
tpc
);
gf100_gr_mmio
(
priv
,
oclass
->
ppc
);
nv_wr32
(
priv
,
0x404154
,
0x00000000
);
oclass
->
bundle
(
info
);
oclass
->
pagepool
(
info
);
oclass
->
attrib
(
info
);
oclass
->
unkn
(
priv
);
gm204_grctx_generate_tpcid
(
priv
);
gf100_grctx_generate_r406028
(
priv
);
gk104_grctx_generate_r418bb8
(
priv
);
for
(
i
=
0
;
i
<
8
;
i
++
)
nv_wr32
(
priv
,
0x4064d0
+
(
i
*
0x04
),
0x00000000
);
nv_wr32
(
priv
,
0x406500
,
0x00000000
);
nv_wr32
(
priv
,
0x405b00
,
(
priv
->
tpc_total
<<
8
)
|
priv
->
gpc_nr
);
gm204_grctx_generate_rop_active_fbps
(
priv
);
for
(
tmp
=
0
,
i
=
0
;
i
<
priv
->
gpc_nr
;
i
++
)
tmp
|=
((
1
<<
priv
->
tpc_nr
[
i
])
-
1
)
<<
(
i
*
4
);
nv_wr32
(
priv
,
0x4041c4
,
tmp
);
gm204_grctx_generate_405b60
(
priv
);
gf100_gr_icmd
(
priv
,
oclass
->
icmd
);
nv_wr32
(
priv
,
0x404154
,
0x00000800
);
gf100_gr_mthd
(
priv
,
oclass
->
mthd
);
nv_mask
(
priv
,
0x418e94
,
0xffffffff
,
0xc4230000
);
nv_mask
(
priv
,
0x418e4c
,
0xffffffff
,
0x70000000
);
}
struct
nvkm_oclass
*
gm204_grctx_oclass
=
&
(
struct
gf100_grctx_oclass
)
{
.
base
.
handle
=
NV_ENGCTX
(
GR
,
0x24
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
gf100_gr_context_ctor
,
.
dtor
=
gf100_gr_context_dtor
,
.
init
=
_nvkm_gr_context_init
,
.
fini
=
_nvkm_gr_context_fini
,
.
rd32
=
_nvkm_gr_context_rd32
,
.
wr32
=
_nvkm_gr_context_wr32
,
},
.
main
=
gm204_grctx_generate_main
,
.
unkn
=
gk104_grctx_generate_unkn
,
.
hub
=
gm204_grctx_pack_hub
,
.
gpc
=
gm204_grctx_pack_gpc
,
.
zcull
=
gf100_grctx_pack_zcull
,
.
tpc
=
gm204_grctx_pack_tpc
,
.
ppc
=
gm204_grctx_pack_ppc
,
.
icmd
=
gm204_grctx_pack_icmd
,
.
mthd
=
gm204_grctx_pack_mthd
,
.
bundle
=
gm107_grctx_generate_bundle
,
.
bundle_size
=
0x3000
,
.
bundle_min_gpm_fifo_depth
=
0x180
,
.
bundle_token_limit
=
0x780
,
.
pagepool
=
gm107_grctx_generate_pagepool
,
.
pagepool_size
=
0x20000
,
.
attrib
=
gm107_grctx_generate_attrib
,
.
attrib_nr_max
=
0x600
,
.
attrib_nr
=
0x400
,
.
alpha_nr_max
=
0x1800
,
.
alpha_nr
=
0x1000
,
}.
base
;
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
View file @
3fed3ea9
...
...
@@ -247,4 +247,16 @@ extern const struct gf100_gr_init gk110_gr_init_tex_0[];
extern
const
struct
gf100_gr_init
gk110_gr_init_sm_0
[];
extern
const
struct
gf100_gr_init
gk208_gr_init_gpc_unk_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_scc_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_prop_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_setup_1
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_zcull_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_gpc_unk_1
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_tex_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_l1c_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_wwdx_0
[];
extern
const
struct
gf100_gr_init
gm107_gr_init_cbm_0
[];
void
gm107_gr_init_bios
(
struct
gf100_gr_priv
*
);
#endif
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
View file @
3fed3ea9
...
...
@@ -71,7 +71,7 @@ gm107_gr_init_ds_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_scc_0
[]
=
{
{
0x40803c
,
1
,
0x04
,
0x00000010
},
{}
...
...
@@ -85,14 +85,14 @@ gm107_gr_init_sked_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_prop_0
[]
=
{
{
0x418408
,
1
,
0x04
,
0x00000000
},
{
0x4184a0
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_setup_1
[]
=
{
{
0x4188c8
,
2
,
0x04
,
0x00000000
},
{
0x4188d0
,
1
,
0x04
,
0x00010000
},
...
...
@@ -100,7 +100,7 @@ gm107_gr_init_setup_1[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_zcull_0
[]
=
{
{
0x418910
,
1
,
0x04
,
0x00010001
},
{
0x418914
,
1
,
0x04
,
0x00000301
},
...
...
@@ -111,7 +111,7 @@ gm107_gr_init_zcull_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_gpc_unk_1
[]
=
{
{
0x418d00
,
1
,
0x04
,
0x00000000
},
{
0x418f00
,
1
,
0x04
,
0x00000400
},
...
...
@@ -134,7 +134,7 @@ gm107_gr_init_tpccs_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_tex_0
[]
=
{
{
0x419ab0
,
1
,
0x04
,
0x00000000
},
{
0x419ab8
,
1
,
0x04
,
0x000000e7
},
...
...
@@ -160,7 +160,7 @@ gm107_gr_init_pe_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_l1c_0
[]
=
{
{
0x419c98
,
1
,
0x04
,
0x00000000
},
{
0x419cc0
,
2
,
0x04
,
0x00000000
},
...
...
@@ -206,14 +206,14 @@ gm107_gr_init_pes_0[] = {
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_wwdx_0
[]
=
{
{
0x41bfd4
,
1
,
0x04
,
0x00800000
},
{
0x41bfdc
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
const
struct
gf100_gr_init
gm107_gr_init_cbm_0
[]
=
{
{
0x41becc
,
1
,
0x04
,
0x00000000
},
{}
...
...
@@ -291,7 +291,7 @@ gm107_gr_pack_mmio[] = {
* PGRAPH engine/subdev functions
******************************************************************************/
static
void
void
gm107_gr_init_bios
(
struct
gf100_gr_priv
*
priv
)
{
static
const
struct
{
...
...
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
0 → 100644
View file @
3fed3ea9
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "gf100.h"
#include "ctxgf100.h"
#include <nvif/class.h>
/*******************************************************************************
* Graphics object classes
******************************************************************************/
static
struct
nvkm_oclass
gm204_gr_sclass
[]
=
{
{
FERMI_TWOD_A
,
&
nvkm_object_ofuncs
},
{
KEPLER_INLINE_TO_MEMORY_B
,
&
nvkm_object_ofuncs
},
{
MAXWELL_B
,
&
gf100_fermi_ofuncs
,
gf100_gr_9097_omthds
},
{
MAXWELL_COMPUTE_B
,
&
nvkm_object_ofuncs
,
gf100_gr_90c0_omthds
},
{}
};
/*******************************************************************************
* PGRAPH register lists
******************************************************************************/
static
const
struct
gf100_gr_init
gm204_gr_init_main_0
[]
=
{
{
0x400080
,
1
,
0x04
,
0x003003e2
},
{
0x400088
,
1
,
0x04
,
0xe007bfe7
},
{
0x40008c
,
1
,
0x04
,
0x00060000
},
{
0x400090
,
1
,
0x04
,
0x00000030
},
{
0x40013c
,
1
,
0x04
,
0x003901f3
},
{
0x400140
,
1
,
0x04
,
0x00000100
},
{
0x400144
,
1
,
0x04
,
0x00000000
},
{
0x400148
,
1
,
0x04
,
0x00000110
},
{
0x400138
,
1
,
0x04
,
0x00000000
},
{
0x400130
,
2
,
0x04
,
0x00000000
},
{
0x400124
,
1
,
0x04
,
0x00000002
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_fe_0
[]
=
{
{
0x40415c
,
1
,
0x04
,
0x00000000
},
{
0x404170
,
1
,
0x04
,
0x00000000
},
{
0x4041b4
,
1
,
0x04
,
0x00000000
},
{
0x4041b8
,
1
,
0x04
,
0x00000010
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_ds_0
[]
=
{
{
0x40583c
,
1
,
0x04
,
0x00000000
},
{
0x405844
,
1
,
0x04
,
0x00ffffff
},
{
0x40584c
,
1
,
0x04
,
0x00000001
},
{
0x405850
,
1
,
0x04
,
0x00000000
},
{
0x405900
,
1
,
0x04
,
0x00000000
},
{
0x405908
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_sked_0
[]
=
{
{
0x407010
,
1
,
0x04
,
0x00000000
},
{
0x407040
,
1
,
0x04
,
0x80440434
},
{
0x407048
,
1
,
0x04
,
0x00000008
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_tpccs_0
[]
=
{
{
0x419d60
,
1
,
0x04
,
0x0000003f
},
{
0x419d88
,
3
,
0x04
,
0x00000000
},
{
0x419dc4
,
1
,
0x04
,
0x00000000
},
{
0x419dc8
,
1
,
0x04
,
0x00000501
},
{
0x419dd0
,
1
,
0x04
,
0x00000000
},
{
0x419dd4
,
1
,
0x04
,
0x00000100
},
{
0x419dd8
,
1
,
0x04
,
0x00000001
},
{
0x419ddc
,
1
,
0x04
,
0x00000002
},
{
0x419de0
,
1
,
0x04
,
0x00000001
},
{
0x419de8
,
1
,
0x04
,
0x000000cc
},
{
0x419dec
,
1
,
0x04
,
0x00000000
},
{
0x419df0
,
1
,
0x04
,
0x000000cc
},
{
0x419df4
,
1
,
0x04
,
0x00000000
},
{
0x419d0c
,
1
,
0x04
,
0x00000000
},
{
0x419d10
,
1
,
0x04
,
0x00000014
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_pe_0
[]
=
{
{
0x419900
,
1
,
0x04
,
0x000000ff
},
{
0x419810
,
1
,
0x04
,
0x00000000
},
{
0x41980c
,
1
,
0x04
,
0x00000010
},
{
0x419844
,
1
,
0x04
,
0x00000000
},
{
0x419838
,
1
,
0x04
,
0x000000ff
},
{
0x419850
,
1
,
0x04
,
0x00000004
},
{
0x419854
,
2
,
0x04
,
0x00000000
},
{
0x419894
,
3
,
0x04
,
0x00100401
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_sm_0
[]
=
{
{
0x419e30
,
1
,
0x04
,
0x000000ff
},
{
0x419e00
,
1
,
0x04
,
0x00000000
},
{
0x419ea0
,
1
,
0x04
,
0x00000000
},
{
0x419ee4
,
1
,
0x04
,
0x00000000
},
{
0x419ea4
,
1
,
0x04
,
0x00000100
},
{
0x419ea8
,
1
,
0x04
,
0x00000000
},
{
0x419ee8
,
1
,
0x04
,
0x00000091
},
{
0x419eb4
,
1
,
0x04
,
0x00000000
},
{
0x419ebc
,
2
,
0x04
,
0x00000000
},
{
0x419edc
,
1
,
0x04
,
0x000c1810
},
{
0x419ed8
,
1
,
0x04
,
0x00000000
},
{
0x419ee0
,
1
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_l1c_1
[]
=
{
{
0x419cf8
,
2
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_sm_1
[]
=
{
{
0x419f74
,
1
,
0x04
,
0x00055155
},
{
0x419f80
,
4
,
0x04
,
0x00000000
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_l1c_2
[]
=
{
{
0x419ccc
,
2
,
0x04
,
0x00000000
},
{
0x419c80
,
1
,
0x04
,
0x3f006022
},
{
0x419c88
,
1
,
0x04
,
0x00210000
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_pes_0
[]
=
{
{
0x41be50
,
1
,
0x04
,
0x000000ff
},
{
0x41be04
,
1
,
0x04
,
0x00000000
},
{
0x41be08
,
1
,
0x04
,
0x00000004
},
{
0x41be0c
,
1
,
0x04
,
0x00000008
},
{
0x41be10
,
1
,
0x04
,
0x2e3b8bc7
},
{
0x41be14
,
2
,
0x04
,
0x00000000
},
{
0x41be3c
,
5
,
0x04
,
0x00100401
},
{}
};
static
const
struct
gf100_gr_init
gm204_gr_init_be_0
[]
=
{
{
0x408890
,
1
,
0x04
,
0x000000ff
},
{
0x40880c
,
1
,
0x04
,
0x00000000
},
{
0x408850
,
1
,
0x04
,
0x00000004
},
{
0x408878
,
1
,
0x04
,
0x01b4201c
},
{
0x40887c
,
1
,
0x04
,
0x80004c55
},
{
0x408880
,
1
,
0x04
,
0x0018c258
},
{
0x408884
,
1
,
0x04
,
0x0000160f
},
{
0x408974
,
1
,
0x04
,
0x000000ff
},
{
0x408910
,
9
,
0x04
,
0x00000000
},
{
0x408950
,
1
,
0x04
,
0x00000000
},
{
0x408954
,
1
,
0x04
,
0x0000ffff
},
{
0x408958
,
1
,
0x04
,
0x00000034
},
{
0x40895c
,
1
,
0x04
,
0x84b17403
},
{
0x408960
,
1
,
0x04
,
0x04c1884f
},
{
0x408964
,
1
,
0x04
,
0x04714445
},
{
0x408968
,
1
,
0x04
,
0x0280802f
},
{
0x40896c
,
1
,
0x04
,
0x04304856
},
{
0x408970
,
1
,
0x04
,
0x00012800
},
{
0x408984
,
1
,
0x04
,
0x00000000
},
{
0x408988
,
1
,
0x04
,
0x08040201
},
{
0x40898c
,
1
,
0x04
,
0x80402010
},
{}
};
static
const
struct
gf100_gr_pack
gm204_gr_pack_mmio
[]
=
{
{
gm204_gr_init_main_0
},
{
gm204_gr_init_fe_0
},
{
gf100_gr_init_pri_0
},
{
gf100_gr_init_rstr2d_0
},
{
gf100_gr_init_pd_0
},
{
gm204_gr_init_ds_0
},
{
gm107_gr_init_scc_0
},
{
gm204_gr_init_sked_0
},
{
gk110_gr_init_cwd_0
},
{
gm107_gr_init_prop_0
},
{
gk208_gr_init_gpc_unk_0
},
{
gf100_gr_init_setup_0
},
{
gf100_gr_init_crstr_0
},
{
gm107_gr_init_setup_1
},
{
gm107_gr_init_zcull_0
},
{
gf100_gr_init_gpm_0
},
{
gm107_gr_init_gpc_unk_1
},
{
gf100_gr_init_gcc_0
},
{
gm204_gr_init_tpccs_0
},
{
gm107_gr_init_tex_0
},
{
gm204_gr_init_pe_0
},
{
gm107_gr_init_l1c_0
},
{
gf100_gr_init_mpc_0
},
{
gm204_gr_init_sm_0
},
{
gm204_gr_init_l1c_1
},
{
gm204_gr_init_sm_1
},
{
gm204_gr_init_l1c_2
},
{
gm204_gr_init_pes_0
},
{
gm107_gr_init_wwdx_0
},
{
gm107_gr_init_cbm_0
},
{
gm204_gr_init_be_0
},
{}
};
const
struct
gf100_gr_pack
*
gm204_gr_data
[]
=
{
gm204_gr_pack_mmio
,
NULL
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
static
int
gm204_gr_init_ctxctl
(
struct
gf100_gr_priv
*
priv
)
{
return
0
;
}
static
int
gm204_gr_init
(
struct
nvkm_object
*
object
)
{
struct
gf100_gr_oclass
*
oclass
=
(
void
*
)
object
->
oclass
;
struct
gf100_gr_priv
*
priv
=
(
void
*
)
object
;
const
u32
magicgpc918
=
DIV_ROUND_UP
(
0x00800000
,
priv
->
tpc_total
);
u32
data
[
TPC_MAX
/
8
]
=
{};
u8
tpcnr
[
GPC_MAX
];
int
gpc
,
tpc
,
ppc
,
rop
;
int
ret
,
i
;
u32
tmp
;
ret
=
nvkm_gr_init
(
&
priv
->
base
);
if
(
ret
)
return
ret
;
tmp
=
nv_rd32
(
priv
,
0x100c80
);
/*XXX: mask? */
nv_wr32
(
priv
,
0x418880
,
0x00001000
|
(
tmp
&
0x00000fff
));
nv_wr32
(
priv
,
0x418890
,
0x00000000
);
nv_wr32
(
priv
,
0x418894
,
0x00000000
);
nv_wr32
(
priv
,
0x4188b4
,
priv
->
unk4188b4
->
addr
>>
8
);
nv_wr32
(
priv
,
0x4188b8
,
priv
->
unk4188b8
->
addr
>>
8
);
nv_mask
(
priv
,
0x4188b0
,
0x00040000
,
0x00040000
);
/*XXX: belongs in fb */
nv_wr32
(
priv
,
0x100cc8
,
priv
->
unk4188b4
->
addr
>>
8
);
nv_wr32
(
priv
,
0x100ccc
,
priv
->
unk4188b8
->
addr
>>
8
);
nv_mask
(
priv
,
0x100cc4
,
0x00040000
,
0x00040000
);
gf100_gr_mmio
(
priv
,
oclass
->
mmio
);
gm107_gr_init_bios
(
priv
);
nv_wr32
(
priv
,
GPC_UNIT
(
0
,
0x3018
),
0x00000001
);
memset
(
data
,
0x00
,
sizeof
(
data
));
memcpy
(
tpcnr
,
priv
->
tpc_nr
,
sizeof
(
priv
->
tpc_nr
));
for
(
i
=
0
,
gpc
=
-
1
;
i
<
priv
->
tpc_total
;
i
++
)
{
do
{
gpc
=
(
gpc
+
1
)
%
priv
->
gpc_nr
;
}
while
(
!
tpcnr
[
gpc
]);
tpc
=
priv
->
tpc_nr
[
gpc
]
-
tpcnr
[
gpc
]
--
;
data
[
i
/
8
]
|=
tpc
<<
((
i
%
8
)
*
4
);
}
nv_wr32
(
priv
,
GPC_BCAST
(
0x0980
),
data
[
0
]);
nv_wr32
(
priv
,
GPC_BCAST
(
0x0984
),
data
[
1
]);
nv_wr32
(
priv
,
GPC_BCAST
(
0x0988
),
data
[
2
]);
nv_wr32
(
priv
,
GPC_BCAST
(
0x098c
),
data
[
3
]);
for
(
gpc
=
0
;
gpc
<
priv
->
gpc_nr
;
gpc
++
)
{
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0914
),
priv
->
magic_not_rop_nr
<<
8
|
priv
->
tpc_nr
[
gpc
]);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0910
),
0x00040000
|
priv
->
tpc_total
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0918
),
magicgpc918
);
}
nv_wr32
(
priv
,
GPC_BCAST
(
0x3fd4
),
magicgpc918
);
nv_wr32
(
priv
,
GPC_BCAST
(
0x08ac
),
nv_rd32
(
priv
,
0x100800
));
nv_wr32
(
priv
,
GPC_BCAST
(
0x033c
),
nv_rd32
(
priv
,
0x100804
));
nv_wr32
(
priv
,
0x400500
,
0x00010001
);
nv_wr32
(
priv
,
0x400100
,
0xffffffff
);
nv_wr32
(
priv
,
0x40013c
,
0xffffffff
);
nv_wr32
(
priv
,
0x400124
,
0x00000002
);
nv_wr32
(
priv
,
0x409c24
,
0x000e0000
);
nv_wr32
(
priv
,
0x405848
,
0xc0000000
);
nv_wr32
(
priv
,
0x40584c
,
0x00000001
);
nv_wr32
(
priv
,
0x404000
,
0xc0000000
);
nv_wr32
(
priv
,
0x404600
,
0xc0000000
);
nv_wr32
(
priv
,
0x408030
,
0xc0000000
);
nv_wr32
(
priv
,
0x404490
,
0xc0000000
);
nv_wr32
(
priv
,
0x406018
,
0xc0000000
);
nv_wr32
(
priv
,
0x407020
,
0x40000000
);
nv_wr32
(
priv
,
0x405840
,
0xc0000000
);
nv_wr32
(
priv
,
0x405844
,
0x00ffffff
);
nv_mask
(
priv
,
0x419cc0
,
0x00000008
,
0x00000008
);
for
(
gpc
=
0
;
gpc
<
priv
->
gpc_nr
;
gpc
++
)
{
printk
(
KERN_ERR
"ppc %d %d
\n
"
,
gpc
,
priv
->
ppc_nr
[
gpc
]);
for
(
ppc
=
0
;
ppc
<
priv
->
ppc_nr
[
gpc
];
ppc
++
)
nv_wr32
(
priv
,
PPC_UNIT
(
gpc
,
ppc
,
0x038
),
0xc0000000
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0420
),
0xc0000000
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0900
),
0xc0000000
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x1028
),
0xc0000000
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x0824
),
0xc0000000
);
for
(
tpc
=
0
;
tpc
<
priv
->
tpc_nr
[
gpc
];
tpc
++
)
{
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x508
),
0xffffffff
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x50c
),
0xffffffff
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x224
),
0xc0000000
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x48c
),
0xc0000000
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x084
),
0xc0000000
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x430
),
0xc0000000
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x644
),
0x00dffffe
);
nv_wr32
(
priv
,
TPC_UNIT
(
gpc
,
tpc
,
0x64c
),
0x00000005
);
}
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x2c90
),
0xffffffff
);
nv_wr32
(
priv
,
GPC_UNIT
(
gpc
,
0x2c94
),
0xffffffff
);
}
for
(
rop
=
0
;
rop
<
priv
->
rop_nr
;
rop
++
)
{
nv_wr32
(
priv
,
ROP_UNIT
(
rop
,
0x144
),
0x40000000
);
nv_wr32
(
priv
,
ROP_UNIT
(
rop
,
0x070
),
0x40000000
);
nv_wr32
(
priv
,
ROP_UNIT
(
rop
,
0x204
),
0xffffffff
);
nv_wr32
(
priv
,
ROP_UNIT
(
rop
,
0x208
),
0xffffffff
);
}
nv_wr32
(
priv
,
0x400108
,
0xffffffff
);
nv_wr32
(
priv
,
0x400138
,
0xffffffff
);
nv_wr32
(
priv
,
0x400118
,
0xffffffff
);
nv_wr32
(
priv
,
0x400130
,
0xffffffff
);
nv_wr32
(
priv
,
0x40011c
,
0xffffffff
);
nv_wr32
(
priv
,
0x400134
,
0xffffffff
);
nv_wr32
(
priv
,
0x400054
,
0x2c350f63
);
gf100_gr_zbc_init
(
priv
);
return
gm204_gr_init_ctxctl
(
priv
);
}
struct
nvkm_oclass
*
gm204_gr_oclass
=
&
(
struct
gf100_gr_oclass
)
{
.
base
.
handle
=
NV_ENGINE
(
GR
,
0x24
),
.
base
.
ofuncs
=
&
(
struct
nvkm_ofuncs
)
{
.
ctor
=
gf100_gr_ctor
,
.
dtor
=
gf100_gr_dtor
,
.
init
=
gm204_gr_init
,
.
fini
=
_nvkm_gr_fini
,
},
.
cclass
=
&
gm204_grctx_oclass
,
.
sclass
=
gm204_gr_sclass
,
.
mmio
=
gm204_gr_pack_mmio
,
.
ppc_nr
=
2
,
}.
base
;
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