Commit 41d3f099 authored by Aaron Sierra's avatar Aaron Sierra Committed by Greg Kroah-Hartman

serial: 8250_pci: change BayTrail default uartclk

The Intel BayTrail HSUART power-on default reference clock is 44.2368 MHz,
but 73.728 MHz provides 0% error for additional "conventional" baud rates
above 460800 (e.g. 576000, 921600, and 1152000).
Signed-off-by: default avatarAaron Sierra <asierra@xes-inc.com>
Reviewed-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 50825c57
...@@ -1401,9 +1401,9 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios, ...@@ -1401,9 +1401,9 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios,
p->uartclk = 40000000; p->uartclk = 40000000;
break; break;
default: default:
m = 6912; m = 2304;
n = 15625; n = 3125;
p->uartclk = 44236800; p->uartclk = 73728000;
} }
/* Reset the clock */ /* Reset the clock */
...@@ -3470,6 +3470,10 @@ static struct pciserial_board pci_boards[] = { ...@@ -3470,6 +3470,10 @@ static struct pciserial_board pci_boards[] = {
.base_baud = 921600, .base_baud = 921600,
.reg_shift = 2, .reg_shift = 2,
}, },
/*
* Intel BayTrail HSUART reference clock is 44.2368 MHz at power-on,
* but is overridden by byt_set_termios.
*/
[pbn_byt] = { [pbn_byt] = {
.flags = FL_BASE0, .flags = FL_BASE0,
.num_ports = 1, .num_ports = 1,
......
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