Commit 42027dfe authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:

- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
  XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)

- Krzysztof fixes the L2 cache controller node name to conform to
  dtschema

- Maxime introduces two new clock providers for Raspberry Pi 4, one to
  support firmware based clocks and another one for the DVP block
  feeding into the two HDMI blocks.

* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
  ARM: dts: BCM5301X: Specify switch ports for Luxul devices
  ARM: dts: bcm2711: Add HDMI DVP
  ARM: dts: bcm2711: Add firmware clocks node

Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 67b25638 aee13efe
...@@ -91,7 +91,7 @@ gic: interrupt-controller@21000 { ...@@ -91,7 +91,7 @@ gic: interrupt-controller@21000 {
<0x20100 0x100>; <0x20100 0x100>;
}; };
L2: l2-cache@22000 { L2: cache-controller@22000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>; reg = <0x22000 0x1000>;
cache-unified; cache-unified;
......
...@@ -104,7 +104,7 @@ gic: interrupt-controller@21000 { ...@@ -104,7 +104,7 @@ gic: interrupt-controller@21000 {
<0x20100 0x100>; <0x20100 0x100>;
}; };
L2: l2-cache@22000 { L2: cache-controller@22000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>; reg = <0x22000 0x1000>;
cache-unified; cache-unified;
......
...@@ -122,7 +122,7 @@ gic: interrupt-controller@21000 { ...@@ -122,7 +122,7 @@ gic: interrupt-controller@21000 {
<0x20100 0x100>; <0x20100 0x100>;
}; };
L2: l2-cache@22000 { L2: cache-controller@22000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>; reg = <0x22000 0x1000>;
cache-unified; cache-unified;
......
...@@ -90,7 +90,7 @@ uart@3e002000 { ...@@ -90,7 +90,7 @@ uart@3e002000 {
reg-io-width = <4>; reg-io-width = <4>;
}; };
L2: l2-cache@3ff20000 { L2: cache-controller@3ff20000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0x3ff20000 0x1000>; reg = <0x3ff20000 0x1000>;
cache-unified; cache-unified;
......
...@@ -69,6 +69,11 @@ sd_vcc_reg: sd_vcc_reg { ...@@ -69,6 +69,11 @@ sd_vcc_reg: sd_vcc_reg {
}; };
&firmware { &firmware {
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
expgpio: gpio { expgpio: gpio {
compatible = "raspberrypi,firmware-gpio"; compatible = "raspberrypi,firmware-gpio";
gpio-controller; gpio-controller;
......
...@@ -12,6 +12,13 @@ / { ...@@ -12,6 +12,13 @@ / {
interrupt-parent = <&gicv2>; interrupt-parent = <&gicv2>;
clk_108MHz: clk-108M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <108000000>;
clock-output-names = "108MHz-clock";
};
soc { soc {
/* /*
* Defined ranges: * Defined ranges:
...@@ -244,6 +251,14 @@ pwm1: pwm@7e20c800 { ...@@ -244,6 +251,14 @@ pwm1: pwm@7e20c800 {
hvs@7e400000 { hvs@7e400000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
}; };
dvp: clock@7ef00000 {
compatible = "brcm,brcm2711-dvp";
reg = <0x7ef00000 0x10>;
clocks = <&clk_108MHz>;
#clock-cells = <1>;
#reset-cells = <1>;
};
}; };
/* /*
......
...@@ -60,3 +60,28 @@ &spi_nor { ...@@ -60,3 +60,28 @@ &spi_nor {
&usb3_phy { &usb3_phy {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "poe";
};
port@4 {
reg = <4>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -67,3 +67,23 @@ &spi_nor { ...@@ -67,3 +67,23 @@ &spi_nor {
&usb3_phy { &usb3_phy {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@4 {
reg = <4>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -60,3 +60,23 @@ &spi_nor { ...@@ -60,3 +60,23 @@ &spi_nor {
&usb3_phy { &usb3_phy {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@4 {
reg = <4>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -108,3 +108,43 @@ &spi_nor { ...@@ -108,3 +108,43 @@ &spi_nor {
&usb3_phy { &usb3_phy {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -54,3 +54,28 @@ restart { ...@@ -54,3 +54,28 @@ restart {
&spi_nor { &spi_nor {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "poe";
};
port@1 {
reg = <1>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -51,3 +51,23 @@ &uart1 { ...@@ -51,3 +51,23 @@ &uart1 {
&spi_nor { &spi_nor {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -103,3 +103,43 @@ &spi_nor { ...@@ -103,3 +103,43 @@ &spi_nor {
&usb3_phy { &usb3_phy {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
...@@ -74,3 +74,43 @@ &usb3 { ...@@ -74,3 +74,43 @@ &usb3 {
&spi_nor { &spi_nor {
status = "okay"; status = "okay";
}; };
&srab {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};
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