Commit 444cde13 authored by David S. Miller's avatar David S. Miller

Merge branch 'cpsw-xdp'

Julien Panis says:

====================
Add minimal XDP support to TI AM65 CPSW Ethernet driver

This patch adds XDP support to TI AM65 CPSW Ethernet driver.

The following features are implemented: NETDEV_XDP_ACT_BASIC,
NETDEV_XDP_ACT_REDIRECT, and NETDEV_XDP_ACT_NDO_XMIT.

Zero-copy and non-linear XDP buffer supports are NOT implemented.

Besides, the page pool memory model is used to get better performance.
====================
Signed-off-by: default avatarJulien Panis <jpanis@baylibre.com>
parents 50aee97d 8acacc40
This diff is collapsed.
......@@ -14,6 +14,7 @@
#include <linux/platform_device.h>
#include <linux/soc/ti/k3-ringacc.h>
#include <net/devlink.h>
#include <net/xdp.h>
#include "am65-cpsw-qos.h"
struct am65_cpts;
......@@ -56,10 +57,18 @@ struct am65_cpsw_port {
bool rx_ts_enabled;
struct am65_cpsw_qos qos;
struct devlink_port devlink_port;
struct bpf_prog *xdp_prog;
struct xdp_rxq_info xdp_rxq;
/* Only for suspend resume context */
u32 vid_context;
};
enum am65_cpsw_tx_buf_type {
AM65_CPSW_TX_BUF_TYPE_SKB,
AM65_CPSW_TX_BUF_TYPE_XDP_TX,
AM65_CPSW_TX_BUF_TYPE_XDP_NDO,
};
struct am65_cpsw_host {
struct am65_cpsw_common *common;
void __iomem *port_base;
......@@ -80,6 +89,7 @@ struct am65_cpsw_tx_chn {
int irq;
u32 id;
u32 descs_num;
unsigned char dsize_log2;
char tx_chn_name[128];
u32 rate_mbps;
};
......@@ -89,7 +99,10 @@ struct am65_cpsw_rx_chn {
struct device *dma_dev;
struct k3_cppi_desc_pool *desc_pool;
struct k3_udma_glue_rx_channel *rx_chn;
struct page_pool *page_pool;
struct page **pages;
u32 descs_num;
unsigned char dsize_log2;
int irq;
};
......
......@@ -22,6 +22,7 @@ struct k3_cppi_desc_pool {
size_t mem_size;
size_t num_desc;
struct gen_pool *gen_pool;
void **desc_infos;
};
void k3_cppi_desc_pool_destroy(struct k3_cppi_desc_pool *pool)
......@@ -37,7 +38,11 @@ void k3_cppi_desc_pool_destroy(struct k3_cppi_desc_pool *pool)
dma_free_coherent(pool->dev, pool->mem_size, pool->cpumem,
pool->dma_addr);
kfree(pool->desc_infos);
gen_pool_destroy(pool->gen_pool); /* frees pool->name */
kfree(pool);
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_destroy);
......@@ -50,7 +55,7 @@ k3_cppi_desc_pool_create_name(struct device *dev, size_t size,
const char *pool_name = NULL;
int ret = -ENOMEM;
pool = devm_kzalloc(dev, sizeof(*pool), GFP_KERNEL);
pool = kzalloc(sizeof(*pool), GFP_KERNEL);
if (!pool)
return ERR_PTR(ret);
......@@ -62,18 +67,21 @@ k3_cppi_desc_pool_create_name(struct device *dev, size_t size,
pool_name = kstrdup_const(name ? name : dev_name(pool->dev),
GFP_KERNEL);
if (!pool_name)
return ERR_PTR(-ENOMEM);
goto gen_pool_create_fail;
pool->gen_pool = gen_pool_create(ilog2(pool->desc_size), -1);
if (!pool->gen_pool) {
ret = -ENOMEM;
dev_err(pool->dev, "pool create failed %d\n", ret);
kfree_const(pool_name);
goto gen_pool_create_fail;
}
pool->gen_pool->name = pool_name;
pool->desc_infos = kcalloc(pool->num_desc,
sizeof(*pool->desc_infos), GFP_KERNEL);
if (!pool->desc_infos)
goto gen_pool_desc_infos_alloc_fail;
pool->cpumem = dma_alloc_coherent(pool->dev, pool->mem_size,
&pool->dma_addr, GFP_KERNEL);
......@@ -94,9 +102,11 @@ k3_cppi_desc_pool_create_name(struct device *dev, size_t size,
dma_free_coherent(pool->dev, pool->mem_size, pool->cpumem,
pool->dma_addr);
dma_alloc_fail:
kfree(pool->desc_infos);
gen_pool_desc_infos_alloc_fail:
gen_pool_destroy(pool->gen_pool); /* frees pool->name */
gen_pool_create_fail:
devm_kfree(pool->dev, pool);
kfree(pool);
return ERR_PTR(ret);
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_create_name);
......@@ -132,5 +142,31 @@ size_t k3_cppi_desc_pool_avail(struct k3_cppi_desc_pool *pool)
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_avail);
size_t k3_cppi_desc_pool_desc_size(const struct k3_cppi_desc_pool *pool)
{
return pool->desc_size;
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_desc_size);
void *k3_cppi_desc_pool_cpuaddr(const struct k3_cppi_desc_pool *pool)
{
return pool->cpumem;
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_cpuaddr);
void k3_cppi_desc_pool_desc_info_set(struct k3_cppi_desc_pool *pool,
int desc_idx, void *info)
{
pool->desc_infos[desc_idx] = info;
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_desc_info_set);
void *k3_cppi_desc_pool_desc_info(const struct k3_cppi_desc_pool *pool,
int desc_idx)
{
return pool->desc_infos[desc_idx];
}
EXPORT_SYMBOL_GPL(k3_cppi_desc_pool_desc_info);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("TI K3 CPPI5 descriptors pool API");
......@@ -26,5 +26,11 @@ k3_cppi_desc_pool_dma2virt(struct k3_cppi_desc_pool *pool, dma_addr_t dma);
void *k3_cppi_desc_pool_alloc(struct k3_cppi_desc_pool *pool);
void k3_cppi_desc_pool_free(struct k3_cppi_desc_pool *pool, void *addr);
size_t k3_cppi_desc_pool_avail(struct k3_cppi_desc_pool *pool);
size_t k3_cppi_desc_pool_desc_size(const struct k3_cppi_desc_pool *pool);
void *k3_cppi_desc_pool_cpuaddr(const struct k3_cppi_desc_pool *pool);
void k3_cppi_desc_pool_desc_info_set(struct k3_cppi_desc_pool *pool,
int desc_idx, void *info);
void *k3_cppi_desc_pool_desc_info(const struct k3_cppi_desc_pool *pool,
int desc_idx);
#endif /* K3_CPPI_DESC_POOL_H_ */
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