Commit 468808bd authored by Paul Mackerras's avatar Paul Mackerras Committed by Michael Ellerman

KVM: PPC: Book3S HV: Set process table for HPT guests on POWER9

This adds the implementation of the KVM_PPC_CONFIGURE_V3_MMU ioctl
for HPT guests on POWER9.  With this, we can return 1 for the
KVM_CAP_PPC_MMU_HASH_V3 capability.
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent c9270132
...@@ -264,6 +264,7 @@ struct kvm_arch { ...@@ -264,6 +264,7 @@ struct kvm_arch {
atomic_t hpte_mod_interest; atomic_t hpte_mod_interest;
cpumask_t need_tlb_flush; cpumask_t need_tlb_flush;
int hpt_cma_alloc; int hpt_cma_alloc;
u64 process_table;
struct dentry *debugfs_dir; struct dentry *debugfs_dir;
struct dentry *htab_dentry; struct dentry *htab_dentry;
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
......
...@@ -3091,8 +3091,8 @@ static void kvmppc_setup_partition_table(struct kvm *kvm) ...@@ -3091,8 +3091,8 @@ static void kvmppc_setup_partition_table(struct kvm *kvm)
/* HTABSIZE and HTABORG fields */ /* HTABSIZE and HTABORG fields */
dw0 |= kvm->arch.sdr1; dw0 |= kvm->arch.sdr1;
/* Second dword has GR=0; other fields are unused since UPRT=0 */ /* Second dword as set by userspace */
dw1 = 0; dw1 = kvm->arch.process_table;
mmu_partition_table_set_entry(kvm->arch.lpid, dw0, dw1); mmu_partition_table_set_entry(kvm->arch.lpid, dw0, dw1);
} }
...@@ -3657,10 +3657,37 @@ static void init_default_hcalls(void) ...@@ -3657,10 +3657,37 @@ static void init_default_hcalls(void)
} }
} }
/* dummy implementations for now */
static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
{ {
unsigned long lpcr;
/* If not on a POWER9, reject it */
if (!cpu_has_feature(CPU_FTR_ARCH_300))
return -ENODEV;
/* If any unknown flags set, reject it */
if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
return -EINVAL;
/* We can't do radix yet */
if (cfg->flags & KVM_PPC_MMUV3_RADIX)
return -EINVAL;
/* GR (guest radix) bit in process_table field must match */
if (cfg->process_table & PATB_GR)
return -EINVAL; return -EINVAL;
/* Process table size field must be reasonable, i.e. <= 24 */
if ((cfg->process_table & PRTS_MASK) > 24)
return -EINVAL;
kvm->arch.process_table = cfg->process_table;
kvmppc_setup_partition_table(kvm);
lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
return 0;
} }
static int kvmhv_get_rmmu_info(struct kvm *kvm, struct kvm_ppc_rmmu_info *info) static int kvmhv_get_rmmu_info(struct kvm *kvm, struct kvm_ppc_rmmu_info *info)
......
...@@ -569,7 +569,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) ...@@ -569,7 +569,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
r = !!(0 && hv_enabled && radix_enabled()); r = !!(0 && hv_enabled && radix_enabled());
break; break;
case KVM_CAP_PPC_MMU_HASH_V3: case KVM_CAP_PPC_MMU_HASH_V3:
r = !!(0 && hv_enabled && !radix_enabled() && r = !!(hv_enabled && !radix_enabled() &&
cpu_has_feature(CPU_FTR_ARCH_300)); cpu_has_feature(CPU_FTR_ARCH_300));
break; break;
#endif #endif
......
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