Commit 47bed3fb authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab

media: ti-vpe: cal: Merge all status variables in IRQ handler

The cal_irq() function reads three IRQ status registers and stores their
values in three different variables. As each value is processed right
after reading the corresponding register, a single variable is enough.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 255502a7
...@@ -1206,19 +1206,19 @@ static irqreturn_t cal_irq(int irq_cal, void *data) ...@@ -1206,19 +1206,19 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
struct cal_dev *dev = (struct cal_dev *)data; struct cal_dev *dev = (struct cal_dev *)data;
struct cal_ctx *ctx; struct cal_ctx *ctx;
struct cal_dmaqueue *dma_q; struct cal_dmaqueue *dma_q;
u32 irqst0, irqst1, irqst2; u32 status;
irqst0 = reg_read(dev, CAL_HL_IRQSTATUS(0)); status = reg_read(dev, CAL_HL_IRQSTATUS(0));
if (irqst0) { if (status) {
int i; int i;
reg_write(dev, CAL_HL_IRQSTATUS(0), irqst0); reg_write(dev, CAL_HL_IRQSTATUS(0), status);
if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK) if (status & CAL_HL_IRQ_OCPO_ERR_MASK)
dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n"); dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n");
for (i = 0; i < 2; ++i) { for (i = 0; i < 2; ++i) {
if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) { if (status & CAL_HL_IRQ_CIO_MASK(i)) {
u32 cio_stat = reg_read(dev, u32 cio_stat = reg_read(dev,
CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); CAL_CSI2_COMPLEXIO_IRQSTATUS(i));
...@@ -1232,15 +1232,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data) ...@@ -1232,15 +1232,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
} }
/* Check which DMA just finished */ /* Check which DMA just finished */
irqst1 = reg_read(dev, CAL_HL_IRQSTATUS(1)); status = reg_read(dev, CAL_HL_IRQSTATUS(1));
if (irqst1) { if (status) {
int i; int i;
/* Clear Interrupt status */ /* Clear Interrupt status */
reg_write(dev, CAL_HL_IRQSTATUS(1), irqst1); reg_write(dev, CAL_HL_IRQSTATUS(1), status);
for (i = 0; i < 2; ++i) { for (i = 0; i < 2; ++i) {
if (isportirqset(irqst1, i)) { if (isportirqset(status, i)) {
ctx = dev->ctx[i]; ctx = dev->ctx[i];
spin_lock(&ctx->slock); spin_lock(&ctx->slock);
...@@ -1255,15 +1255,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data) ...@@ -1255,15 +1255,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
} }
/* Check which DMA just started */ /* Check which DMA just started */
irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2)); status = reg_read(dev, CAL_HL_IRQSTATUS(2));
if (irqst2) { if (status) {
int i; int i;
/* Clear Interrupt status */ /* Clear Interrupt status */
reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); reg_write(dev, CAL_HL_IRQSTATUS(2), status);
for (i = 0; i < 2; ++i) { for (i = 0; i < 2; ++i) {
if (isportirqset(irqst2, i)) { if (isportirqset(status, i)) {
ctx = dev->ctx[i]; ctx = dev->ctx[i];
dma_q = &ctx->vidq; dma_q = &ctx->vidq;
......
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