Commit 48793410 authored by Linus Walleij's avatar Linus Walleij Committed by Arnd Bergmann

ARM: ux500: add SCU and WD to device tree

The Ux500 like other Cortex-A9 SoC's has a Snoop Control
Unit (SCU) and a Watchdog in the same address range as
the local timers. Add these to the SoC device tree.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent bc2ad8ff
...@@ -185,6 +185,11 @@ intc: interrupt-controller@a0411000 { ...@@ -185,6 +185,11 @@ intc: interrupt-controller@a0411000 {
<0xa0410100 0x100>; <0xa0410100 0x100>;
}; };
scu@a04100000 {
compatible = "arm,cortex-a9-scu";
reg = <0xa0410000 0x100>;
};
L2: l2-cache { L2: l2-cache {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>; reg = <0xa0412000 0x1000>;
...@@ -245,6 +250,13 @@ timer@a0410600 { ...@@ -245,6 +250,13 @@ timer@a0410600 {
clocks = <&smp_twd_clk>; clocks = <&smp_twd_clk>;
}; };
watchdog@a0410620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0xa0410620 0x20>;
interrupts = <1 14 0x304>;
clocks = <&smp_twd_clk>;
};
rtc@80154000 { rtc@80154000 {
compatible = "arm,rtc-pl031", "arm,primecell"; compatible = "arm,rtc-pl031", "arm,primecell";
reg = <0x80154000 0x1000>; reg = <0x80154000 0x1000>;
......
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