Commit 4ab60c3f authored by Stratos Karafotis's avatar Stratos Karafotis Committed by Rafael J. Wysocki

cpufreq: intel_pstate: Disable interrupts during MSRs reading

According to Intel 64 and IA-32 Architectures SDM, Volume 3,
Chapter 14.2, "Software needs to exercise care to avoid delays
between the two RDMSRs (for example interrupts)".

So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF.
This should increase the accuracy of the calculations.
Signed-off-by: default avatarStratos Karafotis <stratosk@semaphore.gr>
Signed-off-by: default avatarDirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent c410833a
...@@ -577,9 +577,12 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu) ...@@ -577,9 +577,12 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu)
static inline void intel_pstate_sample(struct cpudata *cpu) static inline void intel_pstate_sample(struct cpudata *cpu)
{ {
u64 aperf, mperf; u64 aperf, mperf;
unsigned long flags;
local_irq_save(flags);
rdmsrl(MSR_IA32_APERF, aperf); rdmsrl(MSR_IA32_APERF, aperf);
rdmsrl(MSR_IA32_MPERF, mperf); rdmsrl(MSR_IA32_MPERF, mperf);
local_irq_restore(flags);
aperf = aperf >> FRAC_BITS; aperf = aperf >> FRAC_BITS;
mperf = mperf >> FRAC_BITS; mperf = mperf >> FRAC_BITS;
......
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