Commit 4b6b5132 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pwm/for-6.9-rc5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux

Pull pwm fixes from Uwe Kleine-König:
 "The first patch fixes a regression in the suspend/resume path for the
  dwc pwm driver that was introduced in v6.9-rc1 when support for 16
  channel devices was added.

  The second patch fixes a bunch of device tree binding check warnings"

* tag 'pwm/for-6.9-rc5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux:
  dt-bindings: pwm: mediatek,pwm-disp: Document power-domains property
  pwm: dwc: allow suspend/resume for 16 channels
parents 96fca68c fb7c3d8b
......@@ -52,6 +52,9 @@ properties:
- const: main
- const: mm
power-domains:
maxItems: 1
required:
- compatible
- reg
......
......@@ -172,7 +172,6 @@ struct pwm_chip *dwc_pwm_alloc(struct device *dev)
dwc->clk_ns = 10;
chip->ops = &dwc_pwm_ops;
dev_set_drvdata(dev, chip);
return chip;
}
EXPORT_SYMBOL_GPL(dwc_pwm_alloc);
......
......@@ -31,26 +31,34 @@ static const struct dwc_pwm_info ehl_pwm_info = {
.size = 0x1000,
};
static int dwc_pwm_init_one(struct device *dev, void __iomem *base, unsigned int offset)
static int dwc_pwm_init_one(struct device *dev, struct dwc_pwm_drvdata *ddata, unsigned int idx)
{
struct pwm_chip *chip;
struct dwc_pwm *dwc;
int ret;
chip = dwc_pwm_alloc(dev);
if (IS_ERR(chip))
return PTR_ERR(chip);
dwc = to_dwc_pwm(chip);
dwc->base = base + offset;
dwc->base = ddata->io_base + (ddata->info->size * idx);
return devm_pwmchip_add(dev, chip);
ret = devm_pwmchip_add(dev, chip);
if (ret)
return ret;
ddata->chips[idx] = chip;
return 0;
}
static int dwc_pwm_probe(struct pci_dev *pci, const struct pci_device_id *id)
{
const struct dwc_pwm_info *info;
struct device *dev = &pci->dev;
int i, ret;
struct dwc_pwm_drvdata *ddata;
unsigned int idx;
int ret;
ret = pcim_enable_device(pci);
if (ret)
......@@ -63,17 +71,25 @@ static int dwc_pwm_probe(struct pci_dev *pci, const struct pci_device_id *id)
return dev_err_probe(dev, ret, "Failed to iomap PCI BAR\n");
info = (const struct dwc_pwm_info *)id->driver_data;
ddata = devm_kzalloc(dev, struct_size(ddata, chips, info->nr), GFP_KERNEL);
if (!ddata)
return -ENOMEM;
for (i = 0; i < info->nr; i++) {
/*
* No need to check for pcim_iomap_table() failure,
* pcim_iomap_regions() already does it for us.
*/
ret = dwc_pwm_init_one(dev, pcim_iomap_table(pci)[0], i * info->size);
ddata->io_base = pcim_iomap_table(pci)[0];
ddata->info = info;
for (idx = 0; idx < ddata->info->nr; idx++) {
ret = dwc_pwm_init_one(dev, ddata, idx);
if (ret)
return ret;
}
dev_set_drvdata(dev, ddata);
pm_runtime_put(dev);
pm_runtime_allow(dev);
......@@ -88,9 +104,13 @@ static void dwc_pwm_remove(struct pci_dev *pci)
static int dwc_pwm_suspend(struct device *dev)
{
struct pwm_chip *chip = dev_get_drvdata(dev);
struct dwc_pwm_drvdata *ddata = dev_get_drvdata(dev);
unsigned int idx;
for (idx = 0; idx < ddata->info->nr; idx++) {
struct pwm_chip *chip = ddata->chips[idx];
struct dwc_pwm *dwc = to_dwc_pwm(chip);
int i;
unsigned int i;
for (i = 0; i < DWC_TIMERS_TOTAL; i++) {
if (chip->pwms[i].state.enabled) {
......@@ -102,21 +122,27 @@ static int dwc_pwm_suspend(struct device *dev)
dwc->ctx[i].cnt2 = dwc_pwm_readl(dwc, DWC_TIM_LD_CNT2(i));
dwc->ctx[i].ctrl = dwc_pwm_readl(dwc, DWC_TIM_CTRL(i));
}
}
return 0;
}
static int dwc_pwm_resume(struct device *dev)
{
struct pwm_chip *chip = dev_get_drvdata(dev);
struct dwc_pwm_drvdata *ddata = dev_get_drvdata(dev);
unsigned int idx;
for (idx = 0; idx < ddata->info->nr; idx++) {
struct pwm_chip *chip = ddata->chips[idx];
struct dwc_pwm *dwc = to_dwc_pwm(chip);
int i;
unsigned int i;
for (i = 0; i < DWC_TIMERS_TOTAL; i++) {
dwc_pwm_writel(dwc, dwc->ctx[i].cnt, DWC_TIM_LD_CNT(i));
dwc_pwm_writel(dwc, dwc->ctx[i].cnt2, DWC_TIM_LD_CNT2(i));
dwc_pwm_writel(dwc, dwc->ctx[i].ctrl, DWC_TIM_CTRL(i));
}
}
return 0;
}
......
......@@ -38,6 +38,12 @@ struct dwc_pwm_info {
unsigned int size;
};
struct dwc_pwm_drvdata {
const struct dwc_pwm_info *info;
void __iomem *io_base;
struct pwm_chip *chips[];
};
struct dwc_pwm_ctx {
u32 cnt;
u32 cnt2;
......
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