Commit 4b89aa3c authored by David S. Miller's avatar David S. Miller

Merge branch 'bnxt_en-next'

Michael Chan says:

====================
bnxt_en: Misc. updates for net-next.

Miscellaneous updates including firmware spec update, ethtool -p blinking
LED support, RDMA SRIOV config callback, and minor fixes.

v2: Dropped the DCBX RoCE app TLV patch until the ETH_P_IBOE RDMA patch
is merged.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 718e14bb 2f593846
...@@ -2467,6 +2467,8 @@ static int bnxt_calc_nr_ring_pages(u32 ring_size, int desc_per_pg) ...@@ -2467,6 +2467,8 @@ static int bnxt_calc_nr_ring_pages(u32 ring_size, int desc_per_pg)
static void bnxt_set_tpa_flags(struct bnxt *bp) static void bnxt_set_tpa_flags(struct bnxt *bp)
{ {
bp->flags &= ~BNXT_FLAG_TPA; bp->flags &= ~BNXT_FLAG_TPA;
if (bp->flags & BNXT_FLAG_NO_AGG_RINGS)
return;
if (bp->dev->features & NETIF_F_LRO) if (bp->dev->features & NETIF_F_LRO)
bp->flags |= BNXT_FLAG_LRO; bp->flags |= BNXT_FLAG_LRO;
if (bp->dev->features & NETIF_F_GRO) if (bp->dev->features & NETIF_F_GRO)
...@@ -4944,6 +4946,7 @@ static int bnxt_setup_int_mode(struct bnxt *bp) ...@@ -4944,6 +4946,7 @@ static int bnxt_setup_int_mode(struct bnxt *bp)
return rc; return rc;
} }
#ifdef CONFIG_RFS_ACCEL
static unsigned int bnxt_get_max_func_rss_ctxs(struct bnxt *bp) static unsigned int bnxt_get_max_func_rss_ctxs(struct bnxt *bp)
{ {
#if defined(CONFIG_BNXT_SRIOV) #if defined(CONFIG_BNXT_SRIOV)
...@@ -4961,6 +4964,7 @@ static unsigned int bnxt_get_max_func_vnics(struct bnxt *bp) ...@@ -4961,6 +4964,7 @@ static unsigned int bnxt_get_max_func_vnics(struct bnxt *bp)
#endif #endif
return bp->pf.max_vnics; return bp->pf.max_vnics;
} }
#endif
unsigned int bnxt_get_max_func_stat_ctxs(struct bnxt *bp) unsigned int bnxt_get_max_func_stat_ctxs(struct bnxt *bp)
{ {
...@@ -5617,6 +5621,45 @@ static int bnxt_hwrm_shutdown_link(struct bnxt *bp) ...@@ -5617,6 +5621,45 @@ static int bnxt_hwrm_shutdown_link(struct bnxt *bp)
return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
} }
static int bnxt_hwrm_port_led_qcaps(struct bnxt *bp)
{
struct hwrm_port_led_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
struct hwrm_port_led_qcaps_input req = {0};
struct bnxt_pf_info *pf = &bp->pf;
int rc;
if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10601)
return 0;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_QCAPS, -1, -1);
req.port_id = cpu_to_le16(pf->port_id);
mutex_lock(&bp->hwrm_cmd_lock);
rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (rc) {
mutex_unlock(&bp->hwrm_cmd_lock);
return rc;
}
if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) {
int i;
bp->num_leds = resp->num_leds;
memcpy(bp->leds, &resp->led0_id, sizeof(bp->leds[0]) *
bp->num_leds);
for (i = 0; i < bp->num_leds; i++) {
struct bnxt_led_info *led = &bp->leds[i];
__le16 caps = led->led_state_caps;
if (!led->led_group_id ||
!BNXT_LED_ALT_BLINK_CAP(caps)) {
bp->num_leds = 0;
break;
}
}
}
mutex_unlock(&bp->hwrm_cmd_lock);
return 0;
}
static bool bnxt_eee_config_ok(struct bnxt *bp) static bool bnxt_eee_config_ok(struct bnxt *bp)
{ {
struct ethtool_eee *eee = &bp->eee; struct ethtool_eee *eee = &bp->eee;
...@@ -7240,6 +7283,7 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -7240,6 +7283,7 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
} }
bnxt_hwrm_func_qcfg(bp); bnxt_hwrm_func_qcfg(bp);
bnxt_hwrm_port_led_qcaps(bp);
bnxt_set_tpa_flags(bp); bnxt_set_tpa_flags(bp);
bnxt_set_ring_params(bp); bnxt_set_ring_params(bp);
......
...@@ -868,6 +868,20 @@ struct bnxt_queue_info { ...@@ -868,6 +868,20 @@ struct bnxt_queue_info {
u8 queue_profile; u8 queue_profile;
}; };
#define BNXT_MAX_LED 4
struct bnxt_led_info {
u8 led_id;
u8 led_type;
u8 led_group_id;
u8 unused;
__le16 led_state_caps;
#define BNXT_LED_ALT_BLINK_CAP(x) ((x) & \
cpu_to_le16(PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED))
__le16 led_color_caps;
};
#define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400
#define BNXT_CAG_REG_LEGACY_INT_STATUS 0x4014 #define BNXT_CAG_REG_LEGACY_INT_STATUS 0x4014
#define BNXT_CAG_REG_BASE 0x300000 #define BNXT_CAG_REG_BASE 0x300000
...@@ -1123,6 +1137,9 @@ struct bnxt { ...@@ -1123,6 +1137,9 @@ struct bnxt {
struct ethtool_eee eee; struct ethtool_eee eee;
u32 lpi_tmr_lo; u32 lpi_tmr_lo;
u32 lpi_tmr_hi; u32 lpi_tmr_hi;
u8 num_leds;
struct bnxt_led_info leds[BNXT_MAX_LED];
}; };
#define BNXT_RX_STATS_OFFSET(counter) \ #define BNXT_RX_STATS_OFFSET(counter) \
......
...@@ -2080,6 +2080,47 @@ static int bnxt_nway_reset(struct net_device *dev) ...@@ -2080,6 +2080,47 @@ static int bnxt_nway_reset(struct net_device *dev)
return rc; return rc;
} }
static int bnxt_set_phys_id(struct net_device *dev,
enum ethtool_phys_id_state state)
{
struct hwrm_port_led_cfg_input req = {0};
struct bnxt *bp = netdev_priv(dev);
struct bnxt_pf_info *pf = &bp->pf;
struct bnxt_led_cfg *led_cfg;
u8 led_state;
__le16 duration;
int i, rc;
if (!bp->num_leds || BNXT_VF(bp))
return -EOPNOTSUPP;
if (state == ETHTOOL_ID_ACTIVE) {
led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
duration = cpu_to_le16(500);
} else if (state == ETHTOOL_ID_INACTIVE) {
led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
duration = cpu_to_le16(0);
} else {
return -EINVAL;
}
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
req.port_id = cpu_to_le16(pf->port_id);
req.num_leds = bp->num_leds;
led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
for (i = 0; i < bp->num_leds; i++, led_cfg++) {
req.enables |= BNXT_LED_DFLT_ENABLES(i);
led_cfg->led_id = bp->leds[i].led_id;
led_cfg->led_state = led_state;
led_cfg->led_blink_on = duration;
led_cfg->led_blink_off = duration;
led_cfg->led_group_id = bp->leds[i].led_group_id;
}
rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
if (rc)
rc = -EIO;
return rc;
}
const struct ethtool_ops bnxt_ethtool_ops = { const struct ethtool_ops bnxt_ethtool_ops = {
.get_link_ksettings = bnxt_get_link_ksettings, .get_link_ksettings = bnxt_get_link_ksettings,
.set_link_ksettings = bnxt_set_link_ksettings, .set_link_ksettings = bnxt_set_link_ksettings,
...@@ -2111,5 +2152,6 @@ const struct ethtool_ops bnxt_ethtool_ops = { ...@@ -2111,5 +2152,6 @@ const struct ethtool_ops bnxt_ethtool_ops = {
.set_eee = bnxt_set_eee, .set_eee = bnxt_set_eee,
.get_module_info = bnxt_get_module_info, .get_module_info = bnxt_get_module_info,
.get_module_eeprom = bnxt_get_module_eeprom, .get_module_eeprom = bnxt_get_module_eeprom,
.nway_reset = bnxt_nway_reset .nway_reset = bnxt_nway_reset,
.set_phys_id = bnxt_set_phys_id,
}; };
...@@ -10,6 +10,29 @@ ...@@ -10,6 +10,29 @@
#ifndef BNXT_ETHTOOL_H #ifndef BNXT_ETHTOOL_H
#define BNXT_ETHTOOL_H #define BNXT_ETHTOOL_H
struct bnxt_led_cfg {
u8 led_id;
u8 led_state;
u8 led_color;
u8 unused;
__le16 led_blink_on;
__le16 led_blink_off;
u8 led_group_id;
u8 rsvd;
};
#define BNXT_LED_DFLT_ENA \
(PORT_LED_CFG_REQ_ENABLES_LED0_ID | \
PORT_LED_CFG_REQ_ENABLES_LED0_STATE | \
PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_ON | \
PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_OFF | \
PORT_LED_CFG_REQ_ENABLES_LED0_GROUP_ID)
#define BNXT_LED_DFLT_ENA_SHIFT 6
#define BNXT_LED_DFLT_ENABLES(x) \
cpu_to_le32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
extern const struct ethtool_ops bnxt_ethtool_ops; extern const struct ethtool_ops bnxt_ethtool_ops;
u32 _bnxt_fw_to_ethtool_adv_spds(u16, u8); u32 _bnxt_fw_to_ethtool_adv_spds(u16, u8);
......
/* Broadcom NetXtreme-C/E network driver. /* Broadcom NetXtreme-C/E network driver.
* *
* Copyright (c) 2014-2016 Broadcom Corporation * Copyright (c) 2014-2016 Broadcom Corporation
* Copyright (c) 2016 Broadcom Limited * Copyright (c) 2016-2017 Broadcom Limited
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
...@@ -11,12 +11,12 @@ ...@@ -11,12 +11,12 @@
#ifndef BNXT_HSI_H #ifndef BNXT_HSI_H
#define BNXT_HSI_H #define BNXT_HSI_H
/* HSI and HWRM Specification 1.6.0 */ /* HSI and HWRM Specification 1.6.1 */
#define HWRM_VERSION_MAJOR 1 #define HWRM_VERSION_MAJOR 1
#define HWRM_VERSION_MINOR 6 #define HWRM_VERSION_MINOR 6
#define HWRM_VERSION_UPDATE 0 #define HWRM_VERSION_UPDATE 1
#define HWRM_VERSION_STR "1.6.0" #define HWRM_VERSION_STR "1.6.1"
/* /*
* Following is the signature for HWRM message field that indicates not * Following is the signature for HWRM message field that indicates not
* applicable (All F's). Need to cast it the size of the field if needed. * applicable (All F's). Need to cast it the size of the field if needed.
...@@ -549,6 +549,8 @@ struct hwrm_ver_get_output { ...@@ -549,6 +549,8 @@ struct hwrm_ver_get_output {
__le32 dev_caps_cfg; __le32 dev_caps_cfg;
#define VER_GET_RESP_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED 0x1UL #define VER_GET_RESP_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED 0x1UL
#define VER_GET_RESP_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED 0x2UL #define VER_GET_RESP_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED 0x2UL
#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED 0x4UL
#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_REQUIRED 0x8UL
u8 roce_fw_maj; u8 roce_fw_maj;
u8 roce_fw_min; u8 roce_fw_min;
u8 roce_fw_bld; u8 roce_fw_bld;
...@@ -1919,6 +1921,219 @@ struct hwrm_port_phy_i2c_read_output { ...@@ -1919,6 +1921,219 @@ struct hwrm_port_phy_i2c_read_output {
u8 valid; u8 valid;
}; };
/* hwrm_port_led_cfg */
/* Input (64 bytes) */
struct hwrm_port_led_cfg_input {
__le16 req_type;
__le16 cmpl_ring;
__le16 seq_id;
__le16 target_id;
__le64 resp_addr;
__le32 enables;
#define PORT_LED_CFG_REQ_ENABLES_LED0_ID 0x1UL
#define PORT_LED_CFG_REQ_ENABLES_LED0_STATE 0x2UL
#define PORT_LED_CFG_REQ_ENABLES_LED0_COLOR 0x4UL
#define PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_ON 0x8UL
#define PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_OFF 0x10UL
#define PORT_LED_CFG_REQ_ENABLES_LED0_GROUP_ID 0x20UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_ID 0x40UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_STATE 0x80UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_COLOR 0x100UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_BLINK_ON 0x200UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_BLINK_OFF 0x400UL
#define PORT_LED_CFG_REQ_ENABLES_LED1_GROUP_ID 0x800UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_ID 0x1000UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_STATE 0x2000UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_COLOR 0x4000UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_BLINK_ON 0x8000UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_BLINK_OFF 0x10000UL
#define PORT_LED_CFG_REQ_ENABLES_LED2_GROUP_ID 0x20000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_ID 0x40000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_STATE 0x80000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_COLOR 0x100000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_BLINK_ON 0x200000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_BLINK_OFF 0x400000UL
#define PORT_LED_CFG_REQ_ENABLES_LED3_GROUP_ID 0x800000UL
__le16 port_id;
u8 num_leds;
u8 rsvd;
u8 led0_id;
u8 led0_state;
#define PORT_LED_CFG_REQ_LED0_STATE_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED0_STATE_OFF 0x1UL
#define PORT_LED_CFG_REQ_LED0_STATE_ON 0x2UL
#define PORT_LED_CFG_REQ_LED0_STATE_BLINK 0x3UL
#define PORT_LED_CFG_REQ_LED0_STATE_BLINKALT 0x4UL
u8 led0_color;
#define PORT_LED_CFG_REQ_LED0_COLOR_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED0_COLOR_AMBER 0x1UL
#define PORT_LED_CFG_REQ_LED0_COLOR_GREEN 0x2UL
#define PORT_LED_CFG_REQ_LED0_COLOR_GREENAMBER 0x3UL
u8 unused_0;
__le16 led0_blink_on;
__le16 led0_blink_off;
u8 led0_group_id;
u8 rsvd0;
u8 led1_id;
u8 led1_state;
#define PORT_LED_CFG_REQ_LED1_STATE_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED1_STATE_OFF 0x1UL
#define PORT_LED_CFG_REQ_LED1_STATE_ON 0x2UL
#define PORT_LED_CFG_REQ_LED1_STATE_BLINK 0x3UL
#define PORT_LED_CFG_REQ_LED1_STATE_BLINKALT 0x4UL
u8 led1_color;
#define PORT_LED_CFG_REQ_LED1_COLOR_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED1_COLOR_AMBER 0x1UL
#define PORT_LED_CFG_REQ_LED1_COLOR_GREEN 0x2UL
#define PORT_LED_CFG_REQ_LED1_COLOR_GREENAMBER 0x3UL
u8 unused_1;
__le16 led1_blink_on;
__le16 led1_blink_off;
u8 led1_group_id;
u8 rsvd1;
u8 led2_id;
u8 led2_state;
#define PORT_LED_CFG_REQ_LED2_STATE_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED2_STATE_OFF 0x1UL
#define PORT_LED_CFG_REQ_LED2_STATE_ON 0x2UL
#define PORT_LED_CFG_REQ_LED2_STATE_BLINK 0x3UL
#define PORT_LED_CFG_REQ_LED2_STATE_BLINKALT 0x4UL
u8 led2_color;
#define PORT_LED_CFG_REQ_LED2_COLOR_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED2_COLOR_AMBER 0x1UL
#define PORT_LED_CFG_REQ_LED2_COLOR_GREEN 0x2UL
#define PORT_LED_CFG_REQ_LED2_COLOR_GREENAMBER 0x3UL
u8 unused_2;
__le16 led2_blink_on;
__le16 led2_blink_off;
u8 led2_group_id;
u8 rsvd2;
u8 led3_id;
u8 led3_state;
#define PORT_LED_CFG_REQ_LED3_STATE_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED3_STATE_OFF 0x1UL
#define PORT_LED_CFG_REQ_LED3_STATE_ON 0x2UL
#define PORT_LED_CFG_REQ_LED3_STATE_BLINK 0x3UL
#define PORT_LED_CFG_REQ_LED3_STATE_BLINKALT 0x4UL
u8 led3_color;
#define PORT_LED_CFG_REQ_LED3_COLOR_DEFAULT 0x0UL
#define PORT_LED_CFG_REQ_LED3_COLOR_AMBER 0x1UL
#define PORT_LED_CFG_REQ_LED3_COLOR_GREEN 0x2UL
#define PORT_LED_CFG_REQ_LED3_COLOR_GREENAMBER 0x3UL
u8 unused_3;
__le16 led3_blink_on;
__le16 led3_blink_off;
u8 led3_group_id;
u8 rsvd3;
};
/* Output (16 bytes) */
struct hwrm_port_led_cfg_output {
__le16 error_code;
__le16 req_type;
__le16 seq_id;
__le16 resp_len;
__le32 unused_0;
u8 unused_1;
u8 unused_2;
u8 unused_3;
u8 valid;
};
/* hwrm_port_led_qcaps */
/* Input (24 bytes) */
struct hwrm_port_led_qcaps_input {
__le16 req_type;
__le16 cmpl_ring;
__le16 seq_id;
__le16 target_id;
__le64 resp_addr;
__le16 port_id;
__le16 unused_0[3];
};
/* Output (48 bytes) */
struct hwrm_port_led_qcaps_output {
__le16 error_code;
__le16 req_type;
__le16 seq_id;
__le16 resp_len;
u8 num_leds;
u8 unused_0[3];
u8 led0_id;
u8 led0_type;
#define PORT_LED_QCAPS_RESP_LED0_TYPE_SPEED 0x0UL
#define PORT_LED_QCAPS_RESP_LED0_TYPE_ACTIVITY 0x1UL
#define PORT_LED_QCAPS_RESP_LED0_TYPE_INVALID 0xffUL
u8 led0_group_id;
u8 unused_1;
__le16 led0_state_caps;
#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_ENABLED 0x1UL
#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_OFF_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_ON_SUPPORTED 0x4UL
#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_BLINK_SUPPORTED 0x8UL
#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED 0x10UL
__le16 led0_color_caps;
#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_RSVD 0x1UL
#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_AMBER_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_GREEN_SUPPORTED 0x4UL
u8 led1_id;
u8 led1_type;
#define PORT_LED_QCAPS_RESP_LED1_TYPE_SPEED 0x0UL
#define PORT_LED_QCAPS_RESP_LED1_TYPE_ACTIVITY 0x1UL
#define PORT_LED_QCAPS_RESP_LED1_TYPE_INVALID 0xffUL
u8 led1_group_id;
u8 unused_2;
__le16 led1_state_caps;
#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_ENABLED 0x1UL
#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_OFF_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_ON_SUPPORTED 0x4UL
#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_BLINK_SUPPORTED 0x8UL
#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED 0x10UL
__le16 led1_color_caps;
#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_RSVD 0x1UL
#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_AMBER_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_GREEN_SUPPORTED 0x4UL
u8 led2_id;
u8 led2_type;
#define PORT_LED_QCAPS_RESP_LED2_TYPE_SPEED 0x0UL
#define PORT_LED_QCAPS_RESP_LED2_TYPE_ACTIVITY 0x1UL
#define PORT_LED_QCAPS_RESP_LED2_TYPE_INVALID 0xffUL
u8 led2_group_id;
u8 unused_3;
__le16 led2_state_caps;
#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_ENABLED 0x1UL
#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_OFF_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_ON_SUPPORTED 0x4UL
#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_BLINK_SUPPORTED 0x8UL
#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED 0x10UL
__le16 led2_color_caps;
#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_RSVD 0x1UL
#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_AMBER_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_GREEN_SUPPORTED 0x4UL
u8 led3_id;
u8 led3_type;
#define PORT_LED_QCAPS_RESP_LED3_TYPE_SPEED 0x0UL
#define PORT_LED_QCAPS_RESP_LED3_TYPE_ACTIVITY 0x1UL
#define PORT_LED_QCAPS_RESP_LED3_TYPE_INVALID 0xffUL
u8 led3_group_id;
u8 unused_4;
__le16 led3_state_caps;
#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_ENABLED 0x1UL
#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_OFF_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_ON_SUPPORTED 0x4UL
#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_BLINK_SUPPORTED 0x8UL
#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED 0x10UL
__le16 led3_color_caps;
#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_RSVD 0x1UL
#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_AMBER_SUPPORTED 0x2UL
#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_GREEN_SUPPORTED 0x4UL
u8 unused_5;
u8 unused_6;
u8 unused_7;
u8 valid;
};
/* hwrm_queue_qportcfg */ /* hwrm_queue_qportcfg */
/* Input (24 bytes) */ /* Input (24 bytes) */
struct hwrm_queue_qportcfg_input { struct hwrm_queue_qportcfg_input {
...@@ -4092,9 +4307,7 @@ struct hwrm_fw_set_structured_data_input { ...@@ -4092,9 +4307,7 @@ struct hwrm_fw_set_structured_data_input {
__le64 src_data_addr; __le64 src_data_addr;
__le16 data_len; __le16 data_len;
u8 hdr_cnt; u8 hdr_cnt;
u8 unused_0; u8 unused_0[5];
__le16 port_id;
__le16 unused_1;
}; };
/* Output (16 bytes) */ /* Output (16 bytes) */
...@@ -4111,7 +4324,7 @@ struct hwrm_fw_set_structured_data_output { ...@@ -4111,7 +4324,7 @@ struct hwrm_fw_set_structured_data_output {
}; };
/* hwrm_fw_get_structured_data */ /* hwrm_fw_get_structured_data */
/* Input (40 bytes) */ /* Input (32 bytes) */
struct hwrm_fw_get_structured_data_input { struct hwrm_fw_get_structured_data_input {
__le16 req_type; __le16 req_type;
__le16 cmpl_ring; __le16 cmpl_ring;
...@@ -4131,8 +4344,6 @@ struct hwrm_fw_get_structured_data_input { ...@@ -4131,8 +4344,6 @@ struct hwrm_fw_get_structured_data_input {
#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NON_TPMR_OPERATIONAL 0x202UL #define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NON_TPMR_OPERATIONAL 0x202UL
u8 count; u8 count;
u8 unused_0; u8 unused_0;
__le16 port_id;
__le16 unused_1[3];
}; };
/* Output (16 bytes) */ /* Output (16 bytes) */
...@@ -4616,7 +4827,8 @@ struct hwrm_nvm_install_update_input { ...@@ -4616,7 +4827,8 @@ struct hwrm_nvm_install_update_input {
__le32 install_type; __le32 install_type;
#define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_NORMAL 0x0UL #define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_NORMAL 0x0UL
#define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_ALL 0xffffffffUL #define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_ALL 0xffffffffUL
__le32 unused_0; __le16 flags;
__le16 unused_0;
}; };
/* Output (24 bytes) */ /* Output (24 bytes) */
...@@ -4973,12 +5185,13 @@ struct ctx_hw_stats { ...@@ -4973,12 +5185,13 @@ struct ctx_hw_stats {
struct hwrm_struct_hdr { struct hwrm_struct_hdr {
__le16 struct_id; __le16 struct_id;
#define STRUCT_HDR_STRUCT_ID_LLDP_CFG 0x41bUL #define STRUCT_HDR_STRUCT_ID_LLDP_CFG 0x41bUL
#define STRUCT_HDR_STRUCT_ID_DCBX_ETS_CFG 0x41dUL #define STRUCT_HDR_STRUCT_ID_DCBX_ETS 0x41dUL
#define STRUCT_HDR_STRUCT_ID_DCBX_PFC_CFG 0x41fUL #define STRUCT_HDR_STRUCT_ID_DCBX_PFC 0x41fUL
#define STRUCT_HDR_STRUCT_ID_DCBX_APP_CFG 0x421UL #define STRUCT_HDR_STRUCT_ID_DCBX_APP 0x421UL
#define STRUCT_HDR_STRUCT_ID_DCBX_STATE_CFG 0x422UL #define STRUCT_HDR_STRUCT_ID_DCBX_FEATURE_STATE 0x422UL
#define STRUCT_HDR_STRUCT_ID_LLDP_GENERIC_CFG 0x424UL #define STRUCT_HDR_STRUCT_ID_LLDP_GENERIC 0x424UL
#define STRUCT_HDR_STRUCT_ID_LLDP_DEVICE_CFG 0x426UL #define STRUCT_HDR_STRUCT_ID_LLDP_DEVICE 0x426UL
#define STRUCT_HDR_STRUCT_ID_PORT_DESCRIPTION 0xaUL
__le16 len; __le16 len;
u8 version; u8 version;
u8 count; u8 count;
...@@ -4988,14 +5201,14 @@ struct hwrm_struct_hdr { ...@@ -4988,14 +5201,14 @@ struct hwrm_struct_hdr {
__le16 unused_0[3]; __le16 unused_0[3];
}; };
/* DCBX Application configuration structure (8 bytes) */ /* DCBX Application configuration structure (1057) (8 bytes) */
struct hwrm_struct_data_dcbx_app_cfg { struct hwrm_struct_data_dcbx_app {
__le16 protocol_id; __be16 protocol_id;
u8 protocol_selector; u8 protocol_selector;
#define STRUCT_DATA_DCBX_APP_CFG_PROTOCOL_SELECTOR_ETHER_TYPE 0x1UL #define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_ETHER_TYPE 0x1UL
#define STRUCT_DATA_DCBX_APP_CFG_PROTOCOL_SELECTOR_TCP_PORT 0x2UL #define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_TCP_PORT 0x2UL
#define STRUCT_DATA_DCBX_APP_CFG_PROTOCOL_SELECTOR_UDP_PORT 0x3UL #define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_UDP_PORT 0x3UL
#define STRUCT_DATA_DCBX_APP_CFG_PROTOCOL_SELECTOR_TCP_UDP_PORT 0x4UL #define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_TCP_UDP_PORT 0x4UL
u8 priority; u8 priority;
u8 valid; u8 valid;
u8 unused_0[3]; u8 unused_0[3];
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/etherdevice.h> #include <linux/etherdevice.h>
#include "bnxt_hsi.h" #include "bnxt_hsi.h"
#include "bnxt.h" #include "bnxt.h"
#include "bnxt_ulp.h"
#include "bnxt_sriov.h" #include "bnxt_sriov.h"
#include "bnxt_ethtool.h" #include "bnxt_ethtool.h"
...@@ -555,6 +556,8 @@ static int bnxt_sriov_enable(struct bnxt *bp, int *num_vfs) ...@@ -555,6 +556,8 @@ static int bnxt_sriov_enable(struct bnxt *bp, int *num_vfs)
if (rc) if (rc)
goto err_out2; goto err_out2;
bnxt_ulp_sriov_cfg(bp, *num_vfs);
rc = pci_enable_sriov(bp->pdev, *num_vfs); rc = pci_enable_sriov(bp->pdev, *num_vfs);
if (rc) if (rc)
goto err_out2; goto err_out2;
...@@ -596,6 +599,8 @@ void bnxt_sriov_disable(struct bnxt *bp) ...@@ -596,6 +599,8 @@ void bnxt_sriov_disable(struct bnxt *bp)
rtnl_lock(); rtnl_lock();
bnxt_restore_pf_fw_resources(bp); bnxt_restore_pf_fw_resources(bp);
rtnl_unlock(); rtnl_unlock();
bnxt_ulp_sriov_cfg(bp, 0);
} }
int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs) int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs)
......
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