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Commit 4c942d72 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Linus Torvalds
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[PATCH] Q40/Q60 IRQ updates from 2.4.x 

Q40/Q60 IRQ updates from 2.4.x
parent dfca615d
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Showing with 96 additions and 153 deletions
arch/m68k/q40/q40ints.c
View file @ 4c942d72
...@@ -207,7 +207,6 @@ void q40_process_int (int level, struct pt_regs *fp) ...@@ -207,7 +207,6 @@ void q40_process_int (int level, struct pt_regs *fp)
int ql_ticks; /* 200Hz ticks since last jiffie */ int ql_ticks; /* 200Hz ticks since last jiffie */
static int sound_ticks; static int sound_ticks;
short q40rtc_oldsecs;
#define SVOL 45 #define SVOL 45
...@@ -234,7 +233,6 @@ static void (*q40_timer_routine)(int, void *, struct pt_regs *); ...@@ -234,7 +233,6 @@ static void (*q40_timer_routine)(int, void *, struct pt_regs *);
static void q40_timer_int (int irq, void * dev, struct pt_regs * regs) static void q40_timer_int (int irq, void * dev, struct pt_regs * regs)
{ {
#if (HZ==100)
ql_ticks = ql_ticks ? 0 : 1; ql_ticks = ql_ticks ? 0 : 1;
if (sound_ticks) if (sound_ticks)
{ {
...@@ -243,16 +241,9 @@ static void q40_timer_int (int irq, void * dev, struct pt_regs * regs) ...@@ -243,16 +241,9 @@ static void q40_timer_int (int irq, void * dev, struct pt_regs * regs)
*DAC_LEFT=sval; *DAC_LEFT=sval;
*DAC_RIGHT=sval; *DAC_RIGHT=sval;
} }
#if defined(CONFIG_Q40RTC) || defined(CONFIG_GEN_RTC)
if (gen_rtc_irq_ctrl && (q40rtc_oldsecs != Q40_RTC_SECS))
{
q40rtc_oldsecs = Q40_RTC_SECS;
gen_rtc_irq_flags = RTC_UIE;
gen_rtc_interrupt(0);
}
#endif
if (ql_ticks) return; if (ql_ticks) return;
#endif
q40_timer_routine(irq, dev, regs); q40_timer_routine(irq, dev, regs);
} }
...@@ -261,30 +252,14 @@ void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *)) ...@@ -261,30 +252,14 @@ void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
int timer_irq; int timer_irq;
q40_timer_routine = timer_routine; q40_timer_routine = timer_routine;
#if (HZ==10000)
timer_irq=Q40_IRQ_SAMPLE;
#else
timer_irq=Q40_IRQ_FRAME; timer_irq=Q40_IRQ_FRAME;
#endif
/*printk("registering sched/timer IRQ %d, handler %p\n", timer_irq,q40_timer_int);*/
/*printk("timer routine %p\n",q40_timer_routine);*/
if (request_irq(timer_irq, q40_timer_int, 0, if (request_irq(timer_irq, q40_timer_int, 0,
"timer", q40_timer_int)) "timer", q40_timer_int))
panic ("Couldn't register timer int"); panic ("Couldn't register timer int");
#if (HZ==10000) master_outb(-1,FRAME_CLEAR_REG);
master_outb(SAMPLE_LOW,SAMPLE_RATE_REG);
master_outb(-1,SAMPLE_CLEAR_REG);
master_outb(1,SAMPLE_ENABLE_REG);
#else
master_outb(-1,FRAME_CLEAR_REG); /* not necessary ? */
#if (HZ==100)
master_outb( 1,FRAME_RATE_REG); master_outb( 1,FRAME_RATE_REG);
#endif
#endif
} }
...@@ -297,20 +272,20 @@ void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *)) ...@@ -297,20 +272,20 @@ void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
struct IRQ_TABLE{ unsigned mask; int irq ;}; struct IRQ_TABLE{ unsigned mask; int irq ;};
#if 0 #if 0
static struct IRQ_TABLE iirqs[]={ static struct IRQ_TABLE iirqs[]={
{IRQ_FRAME_MASK,Q40_IRQ_FRAME}, {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
{IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD}, {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
{0,0}}; {0,0}};
#endif #endif
static struct IRQ_TABLE eirqs[]={ static struct IRQ_TABLE eirqs[]={
{IRQ3_MASK,3}, /* ser 1 */ {Q40_IRQ3_MASK,3}, /* ser 1 */
{IRQ4_MASK,4}, /* ser 2 */ {Q40_IRQ4_MASK,4}, /* ser 2 */
{IRQ14_MASK,14}, /* IDE 1 */ {Q40_IRQ14_MASK,14}, /* IDE 1 */
{IRQ15_MASK,15}, /* IDE 2 */ {Q40_IRQ15_MASK,15}, /* IDE 2 */
{IRQ6_MASK,6}, /* floppy */ {Q40_IRQ6_MASK,6}, /* floppy, handled elsewhere */
{IRQ7_MASK,7}, /* par */ {Q40_IRQ7_MASK,7}, /* par */
{IRQ5_MASK,5}, {Q40_IRQ5_MASK,5},
{IRQ10_MASK,10}, {Q40_IRQ10_MASK,10},
...@@ -325,7 +300,7 @@ static int ccleirq=60; /* ISA dev IRQ's*/ ...@@ -325,7 +300,7 @@ static int ccleirq=60; /* ISA dev IRQ's*/
#define IRQ_INPROGRESS 1 #define IRQ_INPROGRESS 1
/*static unsigned short saved_mask;*/ /*static unsigned short saved_mask;*/
static int do_tint=0; //static int do_tint=0;
#define DEBUG_Q40INT #define DEBUG_Q40INT
/*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */ /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */
...@@ -337,25 +312,20 @@ static int aliased_irq=0; /* how many times inside handler ?*/ ...@@ -337,25 +312,20 @@ static int aliased_irq=0; /* how many times inside handler ?*/
/* got level 2 interrupt, dispatch to ISA or keyboard/timer IRQs */ /* got level 2 interrupt, dispatch to ISA or keyboard/timer IRQs */
void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
{ {
unsigned mir; unsigned mir, mer;
unsigned mer;
int irq,i; int irq,i;
repeat: repeat:
mir=master_inb(IIRQ_REG); mir=master_inb(IIRQ_REG);
if (mir&IRQ_FRAME_MASK) if (mir&Q40_IRQ_FRAME_MASK) {
{ /* dont loose ticks */ irq_tab[Q40_IRQ_FRAME].count++;
do_tint++; irq_tab[Q40_IRQ_FRAME].handler(Q40_IRQ_FRAME,irq_tab[Q40_IRQ_FRAME].dev_id,fp);
master_outb(-1,FRAME_CLEAR_REG); master_outb(-1,FRAME_CLEAR_REG);
} }
if ((mir&IRQ_SER_MASK) || (mir&IRQ_EXT_MASK)) if ((mir&Q40_IRQ_SER_MASK) || (mir&Q40_IRQ_EXT_MASK)) {
{
/* some ISA dev caused the int */
mer=master_inb(EIRQ_REG); mer=master_inb(EIRQ_REG);
for (i=0; eirqs[i].mask; i++) for (i=0; eirqs[i].mask; i++) {
{ if (mer&(eirqs[i].mask)) {
if (mer&(eirqs[i].mask))
{
irq=eirqs[i].irq; irq=eirqs[i].irq;
/* /*
* There is a little mess wrt which IRQ really caused this irq request. The * There is a little mess wrt which IRQ really caused this irq request. The
...@@ -363,19 +333,16 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) ...@@ -363,19 +333,16 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
* are read - which is long after the request came in. In theory IRQs should * are read - which is long after the request came in. In theory IRQs should
* not just go away but they occassionally do * not just go away but they occassionally do
*/ */
if (irq>4 && irq<=15 && mext_disabled) if (irq>4 && irq<=15 && mext_disabled) {
{
/*aliased_irq++;*/ /*aliased_irq++;*/
goto iirq; goto iirq;
} }
if (irq_tab[irq].handler == q40_defhand ) if (irq_tab[irq].handler == q40_defhand ) {
{
printk("handler for IRQ %d not defined\n",irq); printk("handler for IRQ %d not defined\n",irq);
continue; /* ignore uninited INTs :-( */ continue; /* ignore uninited INTs :-( */
} }
if ( irq_tab[irq].state & IRQ_INPROGRESS ) if ( irq_tab[irq].state & IRQ_INPROGRESS ) {
{ /* some handlers do sti() for irq latency reasons, */
/* some handlers do local_irq_enable() for irq latency reasons, */
/* however reentering an active irq handler is not permitted */ /* however reentering an active irq handler is not permitted */
#ifdef IP_USE_DISABLE #ifdef IP_USE_DISABLE
/* in theory this is the better way to do it because it still */ /* in theory this is the better way to do it because it still */
...@@ -398,8 +365,7 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) ...@@ -398,8 +365,7 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
/* this function will be reentered immediately thus */ /* this function will be reentered immediately thus */
/* getting another chance to disable the IRQ */ /* getting another chance to disable the IRQ */
if ( disabled ) if ( disabled ) {
{
#ifdef IP_USE_DISABLE #ifdef IP_USE_DISABLE
if (irq>4){ if (irq>4){
disabled=0; disabled=0;
...@@ -409,7 +375,8 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) ...@@ -409,7 +375,8 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
/*printk("reenabling irq %d\n",irq); */ /*printk("reenabling irq %d\n",irq); */
#endif #endif
} }
goto repeat; /* return; */ // used to do 'goto repeat;' her, this delayed bh processing too long
return;
} }
} }
if (mer && ccleirq>0 && !aliased_irq) if (mer && ccleirq>0 && !aliased_irq)
...@@ -417,18 +384,7 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp) ...@@ -417,18 +384,7 @@ void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
} }
iirq: iirq:
mir=master_inb(IIRQ_REG); mir=master_inb(IIRQ_REG);
if (mir&IRQ_FRAME_MASK) if (mir&Q40_IRQ_KEYB_MASK) {
{
do_tint++;
master_outb(-1,FRAME_CLEAR_REG);
}
for(;do_tint>0;do_tint--)
{
irq_tab[Q40_IRQ_FRAME].count++;
irq_tab[Q40_IRQ_FRAME].handler(Q40_IRQ_FRAME,irq_tab[Q40_IRQ_FRAME].dev_id,fp);
}
if (mir&IRQ_KEYB_MASK) /* may handle it even if actually disabled*/
{
irq_tab[Q40_IRQ_KEYBOARD].count++; irq_tab[Q40_IRQ_KEYBOARD].count++;
irq_tab[Q40_IRQ_KEYBOARD].handler(Q40_IRQ_KEYBOARD,irq_tab[Q40_IRQ_KEYBOARD].dev_id,fp); irq_tab[Q40_IRQ_KEYBOARD].handler(Q40_IRQ_KEYBOARD,irq_tab[Q40_IRQ_KEYBOARD].dev_id,fp);
} }
...@@ -453,20 +409,11 @@ int show_q40_interrupts (struct seq_file *p, void *v) ...@@ -453,20 +409,11 @@ int show_q40_interrupts (struct seq_file *p, void *v)
static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp) static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp)
{ {
#if 0
printk ("Unknown q40 interrupt 0x%02x\n", irq); printk ("Unknown q40 interrupt 0x%02x\n", irq);
#endif
} }
static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs) static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs)
{ {
#if 0
if (ints_inited)
#endif
printk ("Uninitialised interrupt level %d\n", lev); printk ("Uninitialised interrupt level %d\n", lev);
#if 0
else
printk ("Interrupt before interrupt initialisation\n");
#endif
} }
void (*q40_sys_default_handler[SYS_IRQS]) (int, void *, struct pt_regs *) = { void (*q40_sys_default_handler[SYS_IRQS]) (int, void *, struct pt_regs *) = {
...@@ -495,8 +442,7 @@ void q40_disable_irq (unsigned int irq) ...@@ -495,8 +442,7 @@ void q40_disable_irq (unsigned int irq)
* Any driver should not attempt to sleep accross disable_irq !! * Any driver should not attempt to sleep accross disable_irq !!
*/ */
if ( irq>=5 && irq<=15 ) if ( irq>=5 && irq<=15 ) {
{
master_outb(0,EXT_ENABLE_REG); master_outb(0,EXT_ENABLE_REG);
mext_disabled++; mext_disabled++;
if (mext_disabled>1) printk("disable_irq nesting count %d\n",mext_disabled); if (mext_disabled>1) printk("disable_irq nesting count %d\n",mext_disabled);
...@@ -515,4 +461,5 @@ int q40_probe_irq_off (unsigned long irqs) ...@@ -515,4 +461,5 @@ int q40_probe_irq_off (unsigned long irqs)
/* /*
* Local variables: * Local variables:
* compile-command: "m68k-linux-gcc -D__KERNEL__ -I/home/rz/lx/linux-2.2.6/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -ffixed-a2 -m68040 -c -o q40ints.o q40ints.c" * compile-command: "m68k-linux-gcc -D__KERNEL__ -I/home/rz/lx/linux-2.2.6/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -ffixed-a2 -m68040 -c -o q40ints.o q40ints.c"
* End:
*/ */
include/asm-m68k/q40ints.h
View file @ 4c942d72
...@@ -11,19 +11,19 @@ ...@@ -11,19 +11,19 @@
/* masks for interrupt regiosters*/ /* masks for interrupt regiosters*/
/* internal, IIRQ_REG */ /* internal, IIRQ_REG */
#define IRQ_KEYB_MASK (2) #define Q40_IRQ_KEYB_MASK (2)
#define IRQ_SER_MASK (1<<2) #define Q40_IRQ_SER_MASK (1<<2)
#define IRQ_FRAME_MASK (1<<3) #define Q40_IRQ_FRAME_MASK (1<<3)
#define IRQ_EXT_MASK (1<<4) /* is a EIRQ */ #define Q40_IRQ_EXT_MASK (1<<4) /* is a EIRQ */
/* eirq, EIRQ_REG */ /* eirq, EIRQ_REG */
#define IRQ3_MASK (1) #define Q40_IRQ3_MASK (1)
#define IRQ4_MASK (1<<1) #define Q40_IRQ4_MASK (1<<1)
#define IRQ5_MASK (1<<2) #define Q40_IRQ5_MASK (1<<2)
#define IRQ6_MASK (1<<3) #define Q40_IRQ6_MASK (1<<3)
#define IRQ7_MASK (1<<4) #define Q40_IRQ7_MASK (1<<4)
#define IRQ10_MASK (1<<5) #define Q40_IRQ10_MASK (1<<5)
#define IRQ14_MASK (1<<6) #define Q40_IRQ14_MASK (1<<6)
#define IRQ15_MASK (1<<7) #define Q40_IRQ15_MASK (1<<7)
extern unsigned long q40_probe_irq_on (void); extern unsigned long q40_probe_irq_on (void);
extern int q40_probe_irq_off (unsigned long irqs); extern int q40_probe_irq_off (unsigned long irqs);
include/asm-m68k/rtc.h
View file @ 4c942d72
...@@ -17,10 +17,6 @@ ...@@ -17,10 +17,6 @@
/* a few implementation details for the emulation : */ /* a few implementation details for the emulation : */
extern unsigned gen_rtc_irq_flags; /* which sort(s) of interrupts caused int */
extern unsigned gen_rtc_irq_ctrl; /* are enabled */
extern short q40rtc_oldsecs;
#define RTC_PIE 0x40 /* periodic interrupt enable */ #define RTC_PIE 0x40 /* periodic interrupt enable */
#define RTC_AIE 0x20 /* alarm interrupt enable */ #define RTC_AIE 0x20 /* alarm interrupt enable */
#define RTC_UIE 0x10 /* update-finished interrupt enable */ #define RTC_UIE 0x10 /* update-finished interrupt enable */
......
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