Commit 4d3f120a authored by Omar Ramirez Luna's avatar Omar Ramirez Luna Committed by Greg Kroah-Hartman

staging: tidspbridge: delete unused mmu functions

This should get rid of warnings of the type:

warning: passing argument 1 of '' discards qualifiers from pointer target type
 note: expected 'void *' but argument is of type 'const void *'
Signed-off-by: default avatarOmar Ramirez Luna <omar.ramirez@copitl.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5ae4fd94
...@@ -47,31 +47,6 @@ enum hw_mmu_page_size_t { ...@@ -47,31 +47,6 @@ enum hw_mmu_page_size_t {
HW_MMU_SUPERSECTION HW_MMU_SUPERSECTION
}; };
/*
* FUNCTION : mmu_flush_entry
*
* INPUTS:
*
* Identifier : base_address
* Type : const u32
* Description : Base Address of instance of MMU module
*
* RETURNS:
*
* Type : hw_status
* Description : 0 -- No errors occurred
* RET_BAD_NULL_PARAM -- A Pointer
* Parameter was set to NULL
*
* PURPOSE: : Flush the TLB entry pointed by the
* lock counter register
* even if this entry is set protected
*
* METHOD: : Check the Input parameter and Flush a
* single entry in the TLB.
*/
static hw_status mmu_flush_entry(const void __iomem *base_address);
/* /*
* FUNCTION : mmu_set_cam_entry * FUNCTION : mmu_set_cam_entry
* *
...@@ -285,44 +260,6 @@ hw_status hw_mmu_twl_disable(void __iomem *base_address) ...@@ -285,44 +260,6 @@ hw_status hw_mmu_twl_disable(void __iomem *base_address)
return status; return status;
} }
hw_status hw_mmu_tlb_flush(const void __iomem *base_address, u32 virtual_addr,
u32 page_sz)
{
hw_status status = 0;
u32 virtual_addr_tag;
enum hw_mmu_page_size_t pg_size_bits;
switch (page_sz) {
case HW_PAGE_SIZE4KB:
pg_size_bits = HW_MMU_SMALL_PAGE;
break;
case HW_PAGE_SIZE64KB:
pg_size_bits = HW_MMU_LARGE_PAGE;
break;
case HW_PAGE_SIZE1MB:
pg_size_bits = HW_MMU_SECTION;
break;
case HW_PAGE_SIZE16MB:
pg_size_bits = HW_MMU_SUPERSECTION;
break;
default:
return -EINVAL;
}
/* Generate the 20-bit tag from virtual address */
virtual_addr_tag = ((virtual_addr & MMU_ADDR_MASK) >> 12);
mmu_set_cam_entry(base_address, pg_size_bits, 0, 0, virtual_addr_tag);
mmu_flush_entry(base_address);
return status;
}
hw_status hw_mmu_tlb_add(void __iomem *base_address, hw_status hw_mmu_tlb_add(void __iomem *base_address,
u32 physical_addr, u32 physical_addr,
u32 virtual_addr, u32 virtual_addr,
...@@ -503,18 +440,6 @@ hw_status hw_mmu_pte_clear(const u32 pg_tbl_va, u32 virtual_addr, u32 page_size) ...@@ -503,18 +440,6 @@ hw_status hw_mmu_pte_clear(const u32 pg_tbl_va, u32 virtual_addr, u32 page_size)
return status; return status;
} }
/* mmu_flush_entry */
static hw_status mmu_flush_entry(const void __iomem *base_address)
{
hw_status status = 0;
u32 flush_entry_data = 0x1;
/* write values to register */
MMUMMU_FLUSH_ENTRY_WRITE_REGISTER32(base_address, flush_entry_data);
return status;
}
/* mmu_set_cam_entry */ /* mmu_set_cam_entry */
static hw_status mmu_set_cam_entry(void __iomem *base_address, static hw_status mmu_set_cam_entry(void __iomem *base_address,
const u32 page_sz, const u32 page_sz,
......
...@@ -76,9 +76,6 @@ extern hw_status hw_mmu_twl_enable(void __iomem *base_address); ...@@ -76,9 +76,6 @@ extern hw_status hw_mmu_twl_enable(void __iomem *base_address);
extern hw_status hw_mmu_twl_disable(void __iomem *base_address); extern hw_status hw_mmu_twl_disable(void __iomem *base_address);
extern hw_status hw_mmu_tlb_flush(const void __iomem *base_address,
u32 virtual_addr, u32 page_sz);
extern hw_status hw_mmu_tlb_add(void __iomem *base_address, extern hw_status hw_mmu_tlb_add(void __iomem *base_address,
u32 physical_addr, u32 physical_addr,
u32 virtual_addr, u32 virtual_addr,
......
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