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Commit 4fe938c5 authored by Chris Metcalf's avatar Chris Metcalf
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arch/tile: Bomb C99 comments to C89 comments in tile's <arch/sim_def.h> 

Also, sync the file up the upstream version (an additional #define).
Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent dabe98c9
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arch/tile/include/arch/sim_def.h
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// Copyright 2010 Tilera Corporation. All Rights Reserved. /*
// * Copyright 2010 Tilera Corporation. All Rights Reserved.
// This program is free software; you can redistribute it and/or *
// modify it under the terms of the GNU General Public License * This program is free software; you can redistribute it and/or
// as published by the Free Software Foundation, version 2. * modify it under the terms of the GNU General Public License
// * as published by the Free Software Foundation, version 2.
// This program is distributed in the hope that it will be useful, but *
// WITHOUT ANY WARRANTY; without even the implied warranty of * This program is distributed in the hope that it will be useful, but
// MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * WITHOUT ANY WARRANTY; without even the implied warranty of
// NON INFRINGEMENT. See the GNU General Public License for * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
// more details. * NON INFRINGEMENT. See the GNU General Public License for
* more details.
//! @file */
//!
//! Some low-level simulator definitions. /**
//! * @file
*
* Some low-level simulator definitions.
*/
#ifndef __ARCH_SIM_DEF_H__ #ifndef __ARCH_SIM_DEF_H__
#define __ARCH_SIM_DEF_H__ #define __ARCH_SIM_DEF_H__
//! Internal: the low bits of the SIM_CONTROL_* SPR values specify /**
//! the operation to perform, and the remaining bits are * Internal: the low bits of the SIM_CONTROL_* SPR values specify
//! an operation-specific parameter (often unused). * the operation to perform, and the remaining bits are
//! * an operation-specific parameter (often unused).
*/
#define _SIM_CONTROL_OPERATOR_BITS 8 #define _SIM_CONTROL_OPERATOR_BITS 8
//== Values which can be written to SPR_SIM_CONTROL. /*
* Values which can be written to SPR_SIM_CONTROL.
*/
//! If written to SPR_SIM_CONTROL, stops profiling. /** If written to SPR_SIM_CONTROL, stops profiling. */
//!
#define SIM_CONTROL_PROFILER_DISABLE 0 #define SIM_CONTROL_PROFILER_DISABLE 0
//! If written to SPR_SIM_CONTROL, starts profiling. /** If written to SPR_SIM_CONTROL, starts profiling. */
//!
#define SIM_CONTROL_PROFILER_ENABLE 1 #define SIM_CONTROL_PROFILER_ENABLE 1
//! If written to SPR_SIM_CONTROL, clears profiling counters. /** If written to SPR_SIM_CONTROL, clears profiling counters. */
//!
#define SIM_CONTROL_PROFILER_CLEAR 2 #define SIM_CONTROL_PROFILER_CLEAR 2
//! If written to SPR_SIM_CONTROL, checkpoints the simulator. /** If written to SPR_SIM_CONTROL, checkpoints the simulator. */
//!
#define SIM_CONTROL_CHECKPOINT 3 #define SIM_CONTROL_CHECKPOINT 3
//! If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8), /**
//! sets the tracing mask to the given mask. See "sim_set_tracing()". * If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
//! * sets the tracing mask to the given mask. See "sim_set_tracing()".
*/
#define SIM_CONTROL_SET_TRACING 4 #define SIM_CONTROL_SET_TRACING 4
//! If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8), /**
//! dumps the requested items of machine state to the log. * If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
//! * dumps the requested items of machine state to the log.
*/
#define SIM_CONTROL_DUMP 5 #define SIM_CONTROL_DUMP 5
//! If written to SPR_SIM_CONTROL, clears chip-level profiling counters. /** If written to SPR_SIM_CONTROL, clears chip-level profiling counters. */
//!
#define SIM_CONTROL_PROFILER_CHIP_CLEAR 6 #define SIM_CONTROL_PROFILER_CHIP_CLEAR 6
//! If written to SPR_SIM_CONTROL, disables chip-level profiling. /** If written to SPR_SIM_CONTROL, disables chip-level profiling. */
//!
#define SIM_CONTROL_PROFILER_CHIP_DISABLE 7 #define SIM_CONTROL_PROFILER_CHIP_DISABLE 7
//! If written to SPR_SIM_CONTROL, enables chip-level profiling. /** If written to SPR_SIM_CONTROL, enables chip-level profiling. */
//!
#define SIM_CONTROL_PROFILER_CHIP_ENABLE 8 #define SIM_CONTROL_PROFILER_CHIP_ENABLE 8
//! If written to SPR_SIM_CONTROL, enables chip-level functional mode /** If written to SPR_SIM_CONTROL, enables chip-level functional mode */
//!
#define SIM_CONTROL_ENABLE_FUNCTIONAL 9 #define SIM_CONTROL_ENABLE_FUNCTIONAL 9
//! If written to SPR_SIM_CONTROL, disables chip-level functional mode. /** If written to SPR_SIM_CONTROL, disables chip-level functional mode. */
//!
#define SIM_CONTROL_DISABLE_FUNCTIONAL 10 #define SIM_CONTROL_DISABLE_FUNCTIONAL 10
//! If written to SPR_SIM_CONTROL, enables chip-level functional mode. /**
//! All tiles must perform this write for functional mode to be enabled. * If written to SPR_SIM_CONTROL, enables chip-level functional mode.
//! Ignored in naked boot mode unless --functional is specified. * All tiles must perform this write for functional mode to be enabled.
//! WARNING: Only the hypervisor startup code should use this! * Ignored in naked boot mode unless --functional is specified.
//! * WARNING: Only the hypervisor startup code should use this!
*/
#define SIM_CONTROL_ENABLE_FUNCTIONAL_BARRIER 11 #define SIM_CONTROL_ENABLE_FUNCTIONAL_BARRIER 11
//! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8), /**
//! writes a string directly to the simulator output. Written to once for * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
//! each character in the string, plus a final NUL. Instead of NUL, * writes a string directly to the simulator output. Written to once for
//! you can also use "SIM_PUTC_FLUSH_STRING" or "SIM_PUTC_FLUSH_BINARY". * each character in the string, plus a final NUL. Instead of NUL,
//! * you can also use "SIM_PUTC_FLUSH_STRING" or "SIM_PUTC_FLUSH_BINARY".
// ISSUE: Document the meaning of "newline", and the handling of NUL. */
// /* ISSUE: Document the meaning of "newline", and the handling of NUL. */
#define SIM_CONTROL_PUTC 12 #define SIM_CONTROL_PUTC 12
//! If written to SPR_SIM_CONTROL, clears the --grind-coherence state for /**
//! this core. This is intended to be used before a loop that will * If written to SPR_SIM_CONTROL, clears the --grind-coherence state for
//! invalidate the cache by loading new data and evicting all current data. * this core. This is intended to be used before a loop that will
//! Generally speaking, this API should only be used by system code. * invalidate the cache by loading new data and evicting all current data.
//! * Generally speaking, this API should only be used by system code.
*/
#define SIM_CONTROL_GRINDER_CLEAR 13 #define SIM_CONTROL_GRINDER_CLEAR 13
//! If written to SPR_SIM_CONTROL, shuts down the simulator. /** If written to SPR_SIM_CONTROL, shuts down the simulator. */
//!
#define SIM_CONTROL_SHUTDOWN 14 #define SIM_CONTROL_SHUTDOWN 14
//! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8), /**
//! indicates that a fork syscall just created the given process. * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
//! * indicates that a fork syscall just created the given process.
*/
#define SIM_CONTROL_OS_FORK 15 #define SIM_CONTROL_OS_FORK 15
//! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8), /**
//! indicates that an exit syscall was just executed by the given process. * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
//! * indicates that an exit syscall was just executed by the given process.
*/
#define SIM_CONTROL_OS_EXIT 16 #define SIM_CONTROL_OS_EXIT 16
//! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8), /**
//! indicates that the OS just switched to the given process. * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
//! * indicates that the OS just switched to the given process.
*/
#define SIM_CONTROL_OS_SWITCH 17 #define SIM_CONTROL_OS_SWITCH 17
//! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8), /**
//! indicates that an exec syscall was just executed. Written to once for * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
//! each character in the executable name, plus a final NUL. * indicates that an exec syscall was just executed. Written to once for
//! * each character in the executable name, plus a final NUL.
*/
#define SIM_CONTROL_OS_EXEC 18 #define SIM_CONTROL_OS_EXEC 18
//! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8), /**
//! indicates that an interpreter (PT_INTERP) was loaded. Written to once * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
//! for each character in "ADDR:PATH", plus a final NUL, where "ADDR" is a * indicates that an interpreter (PT_INTERP) was loaded. Written to once
//! hex load address starting with "0x", and "PATH" is the executable name. * for each character in "ADDR:PATH", plus a final NUL, where "ADDR" is a
//! * hex load address starting with "0x", and "PATH" is the executable name.
*/
#define SIM_CONTROL_OS_INTERP 19 #define SIM_CONTROL_OS_INTERP 19
//! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8), /**
//! indicates that a dll was loaded. Written to once for each character * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
//! in "ADDR:PATH", plus a final NUL, where "ADDR" is a hexadecimal load * indicates that a dll was loaded. Written to once for each character
//! address starting with "0x", and "PATH" is the executable name. * in "ADDR:PATH", plus a final NUL, where "ADDR" is a hexadecimal load
//! * address starting with "0x", and "PATH" is the executable name.
*/
#define SIM_CONTROL_DLOPEN 20 #define SIM_CONTROL_DLOPEN 20
//! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8), /**
//! indicates that a dll was unloaded. Written to once for each character * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
//! in "ADDR", plus a final NUL, where "ADDR" is a hexadecimal load * indicates that a dll was unloaded. Written to once for each character
//! address starting with "0x". * in "ADDR", plus a final NUL, where "ADDR" is a hexadecimal load
//! * address starting with "0x".
*/
#define SIM_CONTROL_DLCLOSE 21 #define SIM_CONTROL_DLCLOSE 21
//! If written to SPR_SIM_CONTROL, combined with a flag (shifted by 8), /**
//! indicates whether to allow data reads to remotely-cached * If written to SPR_SIM_CONTROL, combined with a flag (shifted by 8),
//! dirty cache lines to be cached locally without grinder warnings or * indicates whether to allow data reads to remotely-cached
//! assertions (used by Linux kernel fast memcpy). * dirty cache lines to be cached locally without grinder warnings or
//! * assertions (used by Linux kernel fast memcpy).
*/
#define SIM_CONTROL_ALLOW_MULTIPLE_CACHING 22 #define SIM_CONTROL_ALLOW_MULTIPLE_CACHING 22
//! If written to SPR_SIM_CONTROL, enables memory tracing. /** If written to SPR_SIM_CONTROL, enables memory tracing. */
//!
#define SIM_CONTROL_ENABLE_MEM_LOGGING 23 #define SIM_CONTROL_ENABLE_MEM_LOGGING 23
//! If written to SPR_SIM_CONTROL, disables memory tracing. /** If written to SPR_SIM_CONTROL, disables memory tracing. */
//!
#define SIM_CONTROL_DISABLE_MEM_LOGGING 24 #define SIM_CONTROL_DISABLE_MEM_LOGGING 24
//! If written to SPR_SIM_CONTROL, changes the shaping parameters of one of /**
//! the gbe or xgbe shims. Must specify the shim id, the type, the units, and * If written to SPR_SIM_CONTROL, changes the shaping parameters of one of
//! the rate, as defined in SIM_SHAPING_SPR_ARG. * the gbe or xgbe shims. Must specify the shim id, the type, the units, and
//! * the rate, as defined in SIM_SHAPING_SPR_ARG.
*/
#define SIM_CONTROL_SHAPING 25 #define SIM_CONTROL_SHAPING 25
//! If written to SPR_SIM_CONTROL, combined with character (shifted by 8), /**
//! requests that a simulator command be executed. Written to once for each * If written to SPR_SIM_CONTROL, combined with character (shifted by 8),
//! character in the command, plus a final NUL. * requests that a simulator command be executed. Written to once for each
//! * character in the command, plus a final NUL.
*/
#define SIM_CONTROL_COMMAND 26 #define SIM_CONTROL_COMMAND 26
//! If written to SPR_SIM_CONTROL, indicates that the simulated system /**
//! is panicking, to allow debugging via --debug-on-panic. * If written to SPR_SIM_CONTROL, indicates that the simulated system
//! * is panicking, to allow debugging via --debug-on-panic.
*/
#define SIM_CONTROL_PANIC 27 #define SIM_CONTROL_PANIC 27
//! If written to SPR_SIM_CONTROL, triggers a simulator syscall. /**
//! See "sim_syscall()" for more info. * If written to SPR_SIM_CONTROL, triggers a simulator syscall.
//! * See "sim_syscall()" for more info.
*/
#define SIM_CONTROL_SYSCALL 32 #define SIM_CONTROL_SYSCALL 32
//! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8), /**
//! provides the pid that subsequent SIM_CONTROL_OS_FORK writes should * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
//! use as the pid, rather than the default previous SIM_CONTROL_OS_SWITCH. * provides the pid that subsequent SIM_CONTROL_OS_FORK writes should
//! * use as the pid, rather than the default previous SIM_CONTROL_OS_SWITCH.
*/
#define SIM_CONTROL_OS_FORK_PARENT 33 #define SIM_CONTROL_OS_FORK_PARENT 33
//! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number /**
//! (shifted by 8), clears the pending magic data section. The cleared * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
//! pending magic data section and any subsequently appended magic bytes * (shifted by 8), clears the pending magic data section. The cleared
//! will only take effect when the classifier blast programmer is run. * pending magic data section and any subsequently appended magic bytes
* will only take effect when the classifier blast programmer is run.
*/
#define SIM_CONTROL_CLEAR_MPIPE_MAGIC_BYTES 34 #define SIM_CONTROL_CLEAR_MPIPE_MAGIC_BYTES 34
//! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number /**
//! (shifted by 8) and a byte of data (shifted by 16), appends that byte * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
//! to the shim's pending magic data section. The pending magic data * (shifted by 8) and a byte of data (shifted by 16), appends that byte
//! section takes effect when the classifier blast programmer is run. * to the shim's pending magic data section. The pending magic data
* section takes effect when the classifier blast programmer is run.
*/
#define SIM_CONTROL_APPEND_MPIPE_MAGIC_BYTE 35 #define SIM_CONTROL_APPEND_MPIPE_MAGIC_BYTE 35
//! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number /**
//! (shifted by 8), an enable=1/disable=0 bit (shifted by 16), and a * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
//! mask of links (shifted by 32), enable or disable the corresponding * (shifted by 8), an enable=1/disable=0 bit (shifted by 16), and a
//! mPIPE links. * mask of links (shifted by 32), enable or disable the corresponding
* mPIPE links.
*/
#define SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE 36 #define SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE 36
//== Syscall numbers for use with "sim_syscall()".
//! Syscall number for sim_add_watchpoint(). /*
//! * Syscall numbers for use with "sim_syscall()".
*/
/** Syscall number for sim_add_watchpoint(). */
#define SIM_SYSCALL_ADD_WATCHPOINT 2 #define SIM_SYSCALL_ADD_WATCHPOINT 2
//! Syscall number for sim_remove_watchpoint(). /** Syscall number for sim_remove_watchpoint(). */
//!
#define SIM_SYSCALL_REMOVE_WATCHPOINT 3 #define SIM_SYSCALL_REMOVE_WATCHPOINT 3
//! Syscall number for sim_query_watchpoint(). /** Syscall number for sim_query_watchpoint(). */
//!
#define SIM_SYSCALL_QUERY_WATCHPOINT 4 #define SIM_SYSCALL_QUERY_WATCHPOINT 4
//! Syscall number that asserts that the cache lines whose 64-bit PA /**
//! is passed as the second argument to sim_syscall(), and over a * Syscall number that asserts that the cache lines whose 64-bit PA
//! range passed as the third argument, are no longer in cache. * is passed as the second argument to sim_syscall(), and over a
//! The simulator raises an error if this is not the case. * range passed as the third argument, are no longer in cache.
//! * The simulator raises an error if this is not the case.
*/
#define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5 #define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5
//== Bit masks which can be shifted by 8, combined with /*
//== SIM_CONTROL_SET_TRACING, and written to SPR_SIM_CONTROL. * Bit masks which can be shifted by 8, combined with
* SIM_CONTROL_SET_TRACING, and written to SPR_SIM_CONTROL.
*/
//! @addtogroup arch_sim /**
//! @{ * @addtogroup arch_sim
* @{
*/
//! Enable --trace-cycle when passed to simulator_set_tracing(). /** Enable --trace-cycle when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_CYCLES 0x01 #define SIM_TRACE_CYCLES 0x01
//! Enable --trace-router when passed to simulator_set_tracing(). /** Enable --trace-router when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_ROUTER 0x02 #define SIM_TRACE_ROUTER 0x02
//! Enable --trace-register-writes when passed to simulator_set_tracing(). /** Enable --trace-register-writes when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_REGISTER_WRITES 0x04 #define SIM_TRACE_REGISTER_WRITES 0x04
//! Enable --trace-disasm when passed to simulator_set_tracing(). /** Enable --trace-disasm when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_DISASM 0x08 #define SIM_TRACE_DISASM 0x08
//! Enable --trace-stall-info when passed to simulator_set_tracing(). /** Enable --trace-stall-info when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_STALL_INFO 0x10 #define SIM_TRACE_STALL_INFO 0x10
//! Enable --trace-memory-controller when passed to simulator_set_tracing(). /** Enable --trace-memory-controller when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_MEMORY_CONTROLLER 0x20 #define SIM_TRACE_MEMORY_CONTROLLER 0x20
//! Enable --trace-l2 when passed to simulator_set_tracing(). /** Enable --trace-l2 when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_L2_CACHE 0x40 #define SIM_TRACE_L2_CACHE 0x40
//! Enable --trace-lines when passed to simulator_set_tracing(). /** Enable --trace-lines when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_LINES 0x80 #define SIM_TRACE_LINES 0x80
//! Turn off all tracing when passed to simulator_set_tracing(). /** Turn off all tracing when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_NONE 0 #define SIM_TRACE_NONE 0
//! Turn on all tracing when passed to simulator_set_tracing(). /** Turn on all tracing when passed to simulator_set_tracing(). */
//!
#define SIM_TRACE_ALL (-1) #define SIM_TRACE_ALL (-1)
//! @} /** @} */
//! Computes the value to write to SPR_SIM_CONTROL to set tracing flags. /** Computes the value to write to SPR_SIM_CONTROL to set tracing flags. */
//!
#define SIM_TRACE_SPR_ARG(mask) \ #define SIM_TRACE_SPR_ARG(mask) \
(SIM_CONTROL_SET_TRACING | ((mask) << _SIM_CONTROL_OPERATOR_BITS)) (SIM_CONTROL_SET_TRACING | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
//== Bit masks which can be shifted by 8, combined with /*
//== SIM_CONTROL_DUMP, and written to SPR_SIM_CONTROL. * Bit masks which can be shifted by 8, combined with
* SIM_CONTROL_DUMP, and written to SPR_SIM_CONTROL.
*/
//! @addtogroup arch_sim /**
//! @{ * @addtogroup arch_sim
* @{
*/
//! Dump the general-purpose registers. /** Dump the general-purpose registers. */
//!
#define SIM_DUMP_REGS 0x001 #define SIM_DUMP_REGS 0x001
//! Dump the SPRs. /** Dump the SPRs. */
//!
#define SIM_DUMP_SPRS 0x002 #define SIM_DUMP_SPRS 0x002
//! Dump the ITLB. /** Dump the ITLB. */
//!
#define SIM_DUMP_ITLB 0x004 #define SIM_DUMP_ITLB 0x004
//! Dump the DTLB. /** Dump the DTLB. */
//!
#define SIM_DUMP_DTLB 0x008 #define SIM_DUMP_DTLB 0x008
//! Dump the L1 I-cache. /** Dump the L1 I-cache. */
//!
#define SIM_DUMP_L1I 0x010 #define SIM_DUMP_L1I 0x010
//! Dump the L1 D-cache. /** Dump the L1 D-cache. */
//!
#define SIM_DUMP_L1D 0x020 #define SIM_DUMP_L1D 0x020
//! Dump the L2 cache. /** Dump the L2 cache. */
//!
#define SIM_DUMP_L2 0x040 #define SIM_DUMP_L2 0x040
//! Dump the switch registers. /** Dump the switch registers. */
//!
#define SIM_DUMP_SNREGS 0x080 #define SIM_DUMP_SNREGS 0x080
//! Dump the switch ITLB. /** Dump the switch ITLB. */
//!
#define SIM_DUMP_SNITLB 0x100 #define SIM_DUMP_SNITLB 0x100
//! Dump the switch L1 I-cache. /** Dump the switch L1 I-cache. */
//!
#define SIM_DUMP_SNL1I 0x200 #define SIM_DUMP_SNL1I 0x200
//! Dump the current backtrace. /** Dump the current backtrace. */
//!
#define SIM_DUMP_BACKTRACE 0x400 #define SIM_DUMP_BACKTRACE 0x400
//! Only dump valid lines in caches. /** Only dump valid lines in caches. */
//!
#define SIM_DUMP_VALID_LINES 0x800 #define SIM_DUMP_VALID_LINES 0x800
//! Dump everything that is dumpable. /** Dump everything that is dumpable. */
//!
#define SIM_DUMP_ALL (-1 & ~SIM_DUMP_VALID_LINES) #define SIM_DUMP_ALL (-1 & ~SIM_DUMP_VALID_LINES)
// @} /** @} */
//! Computes the value to write to SPR_SIM_CONTROL to dump machine state. /** Computes the value to write to SPR_SIM_CONTROL to dump machine state. */
//!
#define SIM_DUMP_SPR_ARG(mask) \ #define SIM_DUMP_SPR_ARG(mask) \
(SIM_CONTROL_DUMP | ((mask) << _SIM_CONTROL_OPERATOR_BITS)) (SIM_CONTROL_DUMP | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
//== Bit masks which can be shifted by 8, combined with /*
//== SIM_CONTROL_PROFILER_CHIP_xxx, and written to SPR_SIM_CONTROL. * Bit masks which can be shifted by 8, combined with
* SIM_CONTROL_PROFILER_CHIP_xxx, and written to SPR_SIM_CONTROL.
*/
//! @addtogroup arch_sim /**
//! @{ * @addtogroup arch_sim
* @{
*/
//! Use with with SIM_PROFILER_CHIP_xxx to control the memory controllers. /** Use with with SIM_PROFILER_CHIP_xxx to control the memory controllers. */
//!
#define SIM_CHIP_MEMCTL 0x001 #define SIM_CHIP_MEMCTL 0x001
//! Use with with SIM_PROFILER_CHIP_xxx to control the XAUI interface. /** Use with with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */
//!
#define SIM_CHIP_XAUI 0x002 #define SIM_CHIP_XAUI 0x002
//! Use with with SIM_PROFILER_CHIP_xxx to control the PCIe interface. /** Use with with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */
//!
#define SIM_CHIP_PCIE 0x004 #define SIM_CHIP_PCIE 0x004
//! Use with with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. /** Use with with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */
//!
#define SIM_CHIP_MPIPE 0x008 #define SIM_CHIP_MPIPE 0x008
//! Reference all chip devices. /** Use with with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */
//! #define SIM_CHIP_TRIO 0x010
/** Reference all chip devices. */
#define SIM_CHIP_ALL (-1) #define SIM_CHIP_ALL (-1)
//! @} /** @} */
//! Computes the value to write to SPR_SIM_CONTROL to clear chip statistics. /** Computes the value to write to SPR_SIM_CONTROL to clear chip statistics. */
//!
#define SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask) \ #define SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask) \
(SIM_CONTROL_PROFILER_CHIP_CLEAR | ((mask) << _SIM_CONTROL_OPERATOR_BITS)) (SIM_CONTROL_PROFILER_CHIP_CLEAR | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
//! Computes the value to write to SPR_SIM_CONTROL to disable chip statistics. /** Computes the value to write to SPR_SIM_CONTROL to disable chip statistics.*/
//!
#define SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask) \ #define SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask) \
(SIM_CONTROL_PROFILER_CHIP_DISABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS)) (SIM_CONTROL_PROFILER_CHIP_DISABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
//! Computes the value to write to SPR_SIM_CONTROL to enable chip statistics. /** Computes the value to write to SPR_SIM_CONTROL to enable chip statistics. */
//!
#define SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask) \ #define SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask) \
(SIM_CONTROL_PROFILER_CHIP_ENABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS)) (SIM_CONTROL_PROFILER_CHIP_ENABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
// Shim bitrate controls. /* Shim bitrate controls. */
//! The number of bits used to store the shim id. /** The number of bits used to store the shim id. */
//!
#define SIM_CONTROL_SHAPING_SHIM_ID_BITS 3 #define SIM_CONTROL_SHAPING_SHIM_ID_BITS 3
//! @addtogroup arch_sim /**
//! @{ * @addtogroup arch_sim
* @{
*/
//! Change the gbe 0 bitrate. /** Change the gbe 0 bitrate. */
//!
#define SIM_CONTROL_SHAPING_GBE_0 0x0 #define SIM_CONTROL_SHAPING_GBE_0 0x0
//! Change the gbe 1 bitrate. /** Change the gbe 1 bitrate. */
//!
#define SIM_CONTROL_SHAPING_GBE_1 0x1 #define SIM_CONTROL_SHAPING_GBE_1 0x1
//! Change the gbe 2 bitrate. /** Change the gbe 2 bitrate. */
//!
#define SIM_CONTROL_SHAPING_GBE_2 0x2 #define SIM_CONTROL_SHAPING_GBE_2 0x2
//! Change the gbe 3 bitrate. /** Change the gbe 3 bitrate. */
//!
#define SIM_CONTROL_SHAPING_GBE_3 0x3 #define SIM_CONTROL_SHAPING_GBE_3 0x3
//! Change the xgbe 0 bitrate. /** Change the xgbe 0 bitrate. */
//!
#define SIM_CONTROL_SHAPING_XGBE_0 0x4 #define SIM_CONTROL_SHAPING_XGBE_0 0x4
//! Change the xgbe 1 bitrate. /** Change the xgbe 1 bitrate. */
//!
#define SIM_CONTROL_SHAPING_XGBE_1 0x5 #define SIM_CONTROL_SHAPING_XGBE_1 0x5
//! The type of shaping to do. /** The type of shaping to do. */
//!
#define SIM_CONTROL_SHAPING_TYPE_BITS 2 #define SIM_CONTROL_SHAPING_TYPE_BITS 2
//! Control the multiplier. /** Control the multiplier. */
//!
#define SIM_CONTROL_SHAPING_MULTIPLIER 0 #define SIM_CONTROL_SHAPING_MULTIPLIER 0
//! Control the PPS. /** Control the PPS. */
//!
#define SIM_CONTROL_SHAPING_PPS 1 #define SIM_CONTROL_SHAPING_PPS 1
//! Control the BPS. /** Control the BPS. */
//!
#define SIM_CONTROL_SHAPING_BPS 2 #define SIM_CONTROL_SHAPING_BPS 2
//! The number of bits for the units for the shaping parameter. /** The number of bits for the units for the shaping parameter. */
//!
#define SIM_CONTROL_SHAPING_UNITS_BITS 2 #define SIM_CONTROL_SHAPING_UNITS_BITS 2
//! Provide a number in single units. /** Provide a number in single units. */
//!
#define SIM_CONTROL_SHAPING_UNITS_SINGLE 0 #define SIM_CONTROL_SHAPING_UNITS_SINGLE 0
//! Provide a number in kilo units. /** Provide a number in kilo units. */
//!
#define SIM_CONTROL_SHAPING_UNITS_KILO 1 #define SIM_CONTROL_SHAPING_UNITS_KILO 1
//! Provide a number in mega units. /** Provide a number in mega units. */
//!
#define SIM_CONTROL_SHAPING_UNITS_MEGA 2 #define SIM_CONTROL_SHAPING_UNITS_MEGA 2
//! Provide a number in giga units. /** Provide a number in giga units. */
//!
#define SIM_CONTROL_SHAPING_UNITS_GIGA 3 #define SIM_CONTROL_SHAPING_UNITS_GIGA 3
// @} /** @} */
//! How many bits are available for the rate. /** How many bits are available for the rate. */
//!
#define SIM_CONTROL_SHAPING_RATE_BITS \ #define SIM_CONTROL_SHAPING_RATE_BITS \
(32 - (_SIM_CONTROL_OPERATOR_BITS + \ (32 - (_SIM_CONTROL_OPERATOR_BITS + \
SIM_CONTROL_SHAPING_SHIM_ID_BITS + \ SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
SIM_CONTROL_SHAPING_TYPE_BITS + \ SIM_CONTROL_SHAPING_TYPE_BITS + \
SIM_CONTROL_SHAPING_UNITS_BITS)) SIM_CONTROL_SHAPING_UNITS_BITS))
//! Computes the value to write to SPR_SIM_CONTROL to change a bitrate. /** Computes the value to write to SPR_SIM_CONTROL to change a bitrate. */
//!
#define SIM_SHAPING_SPR_ARG(shim, type, units, rate) \ #define SIM_SHAPING_SPR_ARG(shim, type, units, rate) \
(SIM_CONTROL_SHAPING | \ (SIM_CONTROL_SHAPING | \
((shim) | \ ((shim) | \
...@@ -483,30 +467,36 @@ ...@@ -483,30 +467,36 @@
SIM_CONTROL_SHAPING_UNITS_BITS))) << _SIM_CONTROL_OPERATOR_BITS) SIM_CONTROL_SHAPING_UNITS_BITS))) << _SIM_CONTROL_OPERATOR_BITS)
//== Values returned when reading SPR_SIM_CONTROL. /*
// ISSUE: These names should share a longer common prefix. * Values returned when reading SPR_SIM_CONTROL.
* ISSUE: These names should share a longer common prefix.
*/
//! When reading SPR_SIM_CONTROL, the mask of simulator tracing bits /**
//! (SIM_TRACE_xxx values). * When reading SPR_SIM_CONTROL, the mask of simulator tracing bits
//! * (SIM_TRACE_xxx values).
*/
#define SIM_TRACE_FLAG_MASK 0xFFFF #define SIM_TRACE_FLAG_MASK 0xFFFF
//! When reading SPR_SIM_CONTROL, the mask for whether profiling is enabled. /** When reading SPR_SIM_CONTROL, the mask for whether profiling is enabled. */
//!
#define SIM_PROFILER_ENABLED_MASK 0x10000 #define SIM_PROFILER_ENABLED_MASK 0x10000
//== Special arguments for "SIM_CONTROL_PUTC". /*
* Special arguments for "SIM_CONTROL_PUTC".
*/
//! Flag value for forcing a PUTC string-flush, including /**
//! coordinate/cycle prefix and newline. * Flag value for forcing a PUTC string-flush, including
//! * coordinate/cycle prefix and newline.
*/
#define SIM_PUTC_FLUSH_STRING 0x100 #define SIM_PUTC_FLUSH_STRING 0x100
//! Flag value for forcing a PUTC binary-data-flush, which skips the /**
//! prefix and does not append a newline. * Flag value for forcing a PUTC binary-data-flush, which skips the
//! * prefix and does not append a newline.
*/
#define SIM_PUTC_FLUSH_BINARY 0x101 #define SIM_PUTC_FLUSH_BINARY 0x101
#endif //__ARCH_SIM_DEF_H__ #endif /* __ARCH_SIM_DEF_H__ */
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