Commit 529c690b authored by Eric Bernstein's avatar Eric Bernstein Committed by Alex Deucher

drm/amd/display: Update dcn10_init_hw for FPGA

Update dcn10_init_hw such that initialization of relevant
HW blocks for Maximus FPGA are also initialized (and not skipped).
Signed-off-by: default avatarEric Bernstein <eric.bernstein@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 28dc87e4
......@@ -692,9 +692,7 @@ static void dcn10_init_hw(struct dc *dc)
}
enable_power_gating_plane(dc->hwseq, true);
return;
}
/* end of FPGA. Below if real ASIC */
} else {
if (!dcb->funcs->is_accelerated_mode(dcb)) {
bios_golden_init(dc);
......@@ -713,6 +711,7 @@ static void dcn10_init_hw(struct dc *dc)
link->link_enc->funcs->hw_init(link->link_enc);
}
}
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct timing_generator *tg = dc->res_pool->timing_generators[i];
......@@ -779,6 +778,10 @@ static void dcn10_init_hw(struct dc *dc)
tg->funcs->tg_init(tg);
}
/* end of FPGA. Below if real ASIC */
if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
return;
for (i = 0; i < dc->res_pool->audio_count; i++) {
struct audio *audio = dc->res_pool->audios[i];
......
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