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Commit 53440260 authored by Jing Huang's avatar Jing Huang Committed by James Bottomley
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[SCSI] bfa: remove os wrapper functions and macros 

This patch replaces register access functions and macros with the the ones
provided by linux.
Signed-off-by: default avatarJing Huang <huangj@brocade.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@suse.de>
parent ba816ea8
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Showing with 226 additions and 258 deletions
drivers/scsi/bfa/bfa.h
View file @ 53440260
...@@ -59,8 +59,8 @@ void bfa_isr_bind(enum bfi_mclass mc, bfa_isr_func_t isr_func); ...@@ -59,8 +59,8 @@ void bfa_isr_bind(enum bfi_mclass mc, bfa_isr_func_t isr_func);
(__bfa)->iocfc.req_cq_pi[__reqq]++; \ (__bfa)->iocfc.req_cq_pi[__reqq]++; \
(__bfa)->iocfc.req_cq_pi[__reqq] &= \ (__bfa)->iocfc.req_cq_pi[__reqq] &= \
((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \ ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \
bfa_reg_write((__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq], \ writel((__bfa)->iocfc.req_cq_pi[__reqq], \
(__bfa)->iocfc.req_cq_pi[__reqq]); \ (__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]); \
mmiowb(); \ mmiowb(); \
} while (0) } while (0)
...@@ -202,16 +202,16 @@ struct bfa_meminfo_s { ...@@ -202,16 +202,16 @@ struct bfa_meminfo_s {
((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].dma_curp) ((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].dma_curp)
struct bfa_iocfc_regs_s { struct bfa_iocfc_regs_s {
bfa_os_addr_t intr_status; void __iomem *intr_status;
bfa_os_addr_t intr_mask; void __iomem *intr_mask;
bfa_os_addr_t cpe_q_pi[BFI_IOC_MAX_CQS]; void __iomem *cpe_q_pi[BFI_IOC_MAX_CQS];
bfa_os_addr_t cpe_q_ci[BFI_IOC_MAX_CQS]; void __iomem *cpe_q_ci[BFI_IOC_MAX_CQS];
bfa_os_addr_t cpe_q_depth[BFI_IOC_MAX_CQS]; void __iomem *cpe_q_depth[BFI_IOC_MAX_CQS];
bfa_os_addr_t cpe_q_ctrl[BFI_IOC_MAX_CQS]; void __iomem *cpe_q_ctrl[BFI_IOC_MAX_CQS];
bfa_os_addr_t rme_q_ci[BFI_IOC_MAX_CQS]; void __iomem *rme_q_ci[BFI_IOC_MAX_CQS];
bfa_os_addr_t rme_q_pi[BFI_IOC_MAX_CQS]; void __iomem *rme_q_pi[BFI_IOC_MAX_CQS];
bfa_os_addr_t rme_q_depth[BFI_IOC_MAX_CQS]; void __iomem *rme_q_depth[BFI_IOC_MAX_CQS];
bfa_os_addr_t rme_q_ctrl[BFI_IOC_MAX_CQS]; void __iomem *rme_q_ctrl[BFI_IOC_MAX_CQS];
}; };
/** /**
......
drivers/scsi/bfa/bfa_core.c
View file @ 53440260
...@@ -113,7 +113,7 @@ bfa_intx(struct bfa_s *bfa) ...@@ -113,7 +113,7 @@ bfa_intx(struct bfa_s *bfa)
u32 intr, qintr; u32 intr, qintr;
int queue; int queue;
intr = bfa_reg_read(bfa->iocfc.bfa_regs.intr_status); intr = readl(bfa->iocfc.bfa_regs.intr_status);
if (!intr) if (!intr)
return BFA_FALSE; return BFA_FALSE;
...@@ -121,7 +121,7 @@ bfa_intx(struct bfa_s *bfa) ...@@ -121,7 +121,7 @@ bfa_intx(struct bfa_s *bfa)
* RME completion queue interrupt * RME completion queue interrupt
*/ */
qintr = intr & __HFN_INT_RME_MASK; qintr = intr & __HFN_INT_RME_MASK;
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, qintr); writel(qintr, bfa->iocfc.bfa_regs.intr_status);
for (queue = 0; queue < BFI_IOC_MAX_CQS_ASIC; queue++) { for (queue = 0; queue < BFI_IOC_MAX_CQS_ASIC; queue++) {
if (intr & (__HFN_INT_RME_Q0 << queue)) if (intr & (__HFN_INT_RME_Q0 << queue))
...@@ -135,7 +135,7 @@ bfa_intx(struct bfa_s *bfa) ...@@ -135,7 +135,7 @@ bfa_intx(struct bfa_s *bfa)
* CPE completion queue interrupt * CPE completion queue interrupt
*/ */
qintr = intr & __HFN_INT_CPE_MASK; qintr = intr & __HFN_INT_CPE_MASK;
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, qintr); writel(qintr, bfa->iocfc.bfa_regs.intr_status);
for (queue = 0; queue < BFI_IOC_MAX_CQS_ASIC; queue++) { for (queue = 0; queue < BFI_IOC_MAX_CQS_ASIC; queue++) {
if (intr & (__HFN_INT_CPE_Q0 << queue)) if (intr & (__HFN_INT_CPE_Q0 << queue))
...@@ -153,13 +153,13 @@ bfa_intx(struct bfa_s *bfa) ...@@ -153,13 +153,13 @@ bfa_intx(struct bfa_s *bfa)
void void
bfa_intx_enable(struct bfa_s *bfa) bfa_intx_enable(struct bfa_s *bfa)
{ {
bfa_reg_write(bfa->iocfc.bfa_regs.intr_mask, bfa->iocfc.intr_mask); writel(bfa->iocfc.intr_mask, bfa->iocfc.bfa_regs.intr_mask);
} }
void void
bfa_intx_disable(struct bfa_s *bfa) bfa_intx_disable(struct bfa_s *bfa)
{ {
bfa_reg_write(bfa->iocfc.bfa_regs.intr_mask, -1L); writel(-1L, bfa->iocfc.bfa_regs.intr_mask);
} }
void void
...@@ -188,8 +188,8 @@ bfa_isr_enable(struct bfa_s *bfa) ...@@ -188,8 +188,8 @@ bfa_isr_enable(struct bfa_s *bfa)
__HFN_INT_RME_Q6 | __HFN_INT_RME_Q7 | __HFN_INT_RME_Q6 | __HFN_INT_RME_Q7 |
__HFN_INT_MBOX_LPU1); __HFN_INT_MBOX_LPU1);
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, intr_unmask); writel(intr_unmask, bfa->iocfc.bfa_regs.intr_status);
bfa_reg_write(bfa->iocfc.bfa_regs.intr_mask, ~intr_unmask); writel(~intr_unmask, bfa->iocfc.bfa_regs.intr_mask);
bfa->iocfc.intr_mask = ~intr_unmask; bfa->iocfc.intr_mask = ~intr_unmask;
bfa_isr_mode_set(bfa, bfa->msix.nvecs != 0); bfa_isr_mode_set(bfa, bfa->msix.nvecs != 0);
} }
...@@ -198,7 +198,7 @@ void ...@@ -198,7 +198,7 @@ void
bfa_isr_disable(struct bfa_s *bfa) bfa_isr_disable(struct bfa_s *bfa)
{ {
bfa_isr_mode_set(bfa, BFA_FALSE); bfa_isr_mode_set(bfa, BFA_FALSE);
bfa_reg_write(bfa->iocfc.bfa_regs.intr_mask, -1L); writel(-1L, bfa->iocfc.bfa_regs.intr_mask);
bfa_msix_uninstall(bfa); bfa_msix_uninstall(bfa);
} }
...@@ -263,7 +263,7 @@ bfa_msix_rspq(struct bfa_s *bfa, int qid) ...@@ -263,7 +263,7 @@ bfa_msix_rspq(struct bfa_s *bfa, int qid)
* update CI * update CI
*/ */
bfa_rspq_ci(bfa, qid) = pi; bfa_rspq_ci(bfa, qid) = pi;
bfa_reg_write(bfa->iocfc.bfa_regs.rme_q_ci[qid], pi); writel(pi, bfa->iocfc.bfa_regs.rme_q_ci[qid]);
mmiowb(); mmiowb();
/** /**
...@@ -279,7 +279,7 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec) ...@@ -279,7 +279,7 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec)
{ {
u32 intr, curr_value; u32 intr, curr_value;
intr = bfa_reg_read(bfa->iocfc.bfa_regs.intr_status); intr = readl(bfa->iocfc.bfa_regs.intr_status);
if (intr & (__HFN_INT_MBOX_LPU0 | __HFN_INT_MBOX_LPU1)) if (intr & (__HFN_INT_MBOX_LPU0 | __HFN_INT_MBOX_LPU1))
bfa_msix_lpu(bfa); bfa_msix_lpu(bfa);
...@@ -294,9 +294,9 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec) ...@@ -294,9 +294,9 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec)
* Register needs to be cleared as well so Interrupt * Register needs to be cleared as well so Interrupt
* Status Register will be cleared. * Status Register will be cleared.
*/ */
curr_value = bfa_reg_read(bfa->ioc.ioc_regs.ll_halt); curr_value = readl(bfa->ioc.ioc_regs.ll_halt);
curr_value &= ~__FW_INIT_HALT_P; curr_value &= ~__FW_INIT_HALT_P;
bfa_reg_write(bfa->ioc.ioc_regs.ll_halt, curr_value); writel(curr_value, bfa->ioc.ioc_regs.ll_halt);
} }
if (intr & __HFN_INT_ERR_PSS) { if (intr & __HFN_INT_ERR_PSS) {
...@@ -305,14 +305,14 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec) ...@@ -305,14 +305,14 @@ bfa_msix_lpu_err(struct bfa_s *bfa, int vec)
* interrups are shared so driver's interrupt handler is * interrups are shared so driver's interrupt handler is
* still called eventhough it is already masked out. * still called eventhough it is already masked out.
*/ */
curr_value = bfa_reg_read( curr_value = readl(
bfa->ioc.ioc_regs.pss_err_status_reg); bfa->ioc.ioc_regs.pss_err_status_reg);
curr_value &= __PSS_ERR_STATUS_SET; curr_value &= __PSS_ERR_STATUS_SET;
bfa_reg_write(bfa->ioc.ioc_regs.pss_err_status_reg, writel(curr_value,
curr_value); bfa->ioc.ioc_regs.pss_err_status_reg);
} }
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, intr); writel(intr, bfa->iocfc.bfa_regs.intr_status);
bfa_msix_errint(bfa, intr); bfa_msix_errint(bfa, intr);
} }
} }
......
drivers/scsi/bfa/bfa_hw_cb.c
View file @ 53440260
...@@ -22,7 +22,7 @@ void ...@@ -22,7 +22,7 @@ void
bfa_hwcb_reginit(struct bfa_s *bfa) bfa_hwcb_reginit(struct bfa_s *bfa)
{ {
struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs; struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs;
bfa_os_addr_t kva = bfa_ioc_bar0(&bfa->ioc); void __iomem *kva = bfa_ioc_bar0(&bfa->ioc);
int i, q, fn = bfa_ioc_pcifn(&bfa->ioc); int i, q, fn = bfa_ioc_pcifn(&bfa->ioc);
if (fn == 0) { if (fn == 0) {
...@@ -60,8 +60,8 @@ bfa_hwcb_reqq_ack(struct bfa_s *bfa, int reqq) ...@@ -60,8 +60,8 @@ bfa_hwcb_reqq_ack(struct bfa_s *bfa, int reqq)
static void static void
bfa_hwcb_reqq_ack_msix(struct bfa_s *bfa, int reqq) bfa_hwcb_reqq_ack_msix(struct bfa_s *bfa, int reqq)
{ {
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, writel(__HFN_INT_CPE_Q0 << CPE_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), reqq),
__HFN_INT_CPE_Q0 << CPE_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), reqq)); bfa->iocfc.bfa_regs.intr_status);
} }
void void
...@@ -72,8 +72,8 @@ bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq) ...@@ -72,8 +72,8 @@ bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq)
static void static void
bfa_hwcb_rspq_ack_msix(struct bfa_s *bfa, int rspq) bfa_hwcb_rspq_ack_msix(struct bfa_s *bfa, int rspq)
{ {
bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, writel(__HFN_INT_RME_Q0 << RME_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), rspq),
__HFN_INT_RME_Q0 << RME_Q_NUM(bfa_ioc_pcifn(&bfa->ioc), rspq)); bfa->iocfc.bfa_regs.intr_status);
} }
void void
......
drivers/scsi/bfa/bfa_hw_ct.c
View file @ 53440260
...@@ -31,12 +31,12 @@ static void ...@@ -31,12 +31,12 @@ static void
bfa_hwct_msix_lpu_err_set(struct bfa_s *bfa, bfa_boolean_t msix, int vec) bfa_hwct_msix_lpu_err_set(struct bfa_s *bfa, bfa_boolean_t msix, int vec)
{ {
int fn = bfa_ioc_pcifn(&bfa->ioc); int fn = bfa_ioc_pcifn(&bfa->ioc);
bfa_os_addr_t kva = bfa_ioc_bar0(&bfa->ioc); void __iomem *kva = bfa_ioc_bar0(&bfa->ioc);
if (msix) if (msix)
bfa_reg_write(kva + __ct_msix_err_vec_reg[fn], vec); writel(vec, kva + __ct_msix_err_vec_reg[fn]);
else else
bfa_reg_write(kva + __ct_msix_err_vec_reg[fn], 0); writel(0, kva + __ct_msix_err_vec_reg[fn]);
} }
/** /**
...@@ -51,7 +51,7 @@ void ...@@ -51,7 +51,7 @@ void
bfa_hwct_reginit(struct bfa_s *bfa) bfa_hwct_reginit(struct bfa_s *bfa)
{ {
struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs; struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs;
bfa_os_addr_t kva = bfa_ioc_bar0(&bfa->ioc); void __iomem *kva = bfa_ioc_bar0(&bfa->ioc);
int i, q, fn = bfa_ioc_pcifn(&bfa->ioc); int i, q, fn = bfa_ioc_pcifn(&bfa->ioc);
if (fn == 0) { if (fn == 0) {
...@@ -88,8 +88,8 @@ bfa_hwct_reqq_ack(struct bfa_s *bfa, int reqq) ...@@ -88,8 +88,8 @@ bfa_hwct_reqq_ack(struct bfa_s *bfa, int reqq)
{ {
u32 r32; u32 r32;
r32 = bfa_reg_read(bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]); r32 = readl(bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
bfa_reg_write(bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq], r32); writel(r32, bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
} }
void void
...@@ -97,8 +97,8 @@ bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq) ...@@ -97,8 +97,8 @@ bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq)
{ {
u32 r32; u32 r32;
r32 = bfa_reg_read(bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]); r32 = readl(bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
bfa_reg_write(bfa->iocfc.bfa_regs.rme_q_ctrl[rspq], r32); writel(r32, bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
} }
void void
......
drivers/scsi/bfa/bfa_ioc.c
View file @ 53440260
This diff is collapsed.
drivers/scsi/bfa/bfa_ioc.h
View file @ 53440260
...@@ -62,9 +62,9 @@ struct bfa_sge_s { ...@@ -62,9 +62,9 @@ struct bfa_sge_s {
}; };
#define bfa_sge_word_swap(__sge) do { \ #define bfa_sge_word_swap(__sge) do { \
((u32 *)(__sge))[0] = bfa_os_swap32(((u32 *)(__sge))[0]); \ ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
((u32 *)(__sge))[1] = bfa_os_swap32(((u32 *)(__sge))[1]); \ ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
((u32 *)(__sge))[2] = bfa_os_swap32(((u32 *)(__sge))[2]); \ ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
} while (0) } while (0)
#define bfa_swap_words(_x) ( \ #define bfa_swap_words(_x) ( \
...@@ -87,7 +87,7 @@ struct bfa_pcidev_s { ...@@ -87,7 +87,7 @@ struct bfa_pcidev_s {
int pci_slot; int pci_slot;
u8 pci_func; u8 pci_func;
u16 device_id; u16 device_id;
bfa_os_addr_t pci_bar_kva; void __iomem *pci_bar_kva;
}; };
/** /**
...@@ -130,34 +130,32 @@ __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa) ...@@ -130,34 +130,32 @@ __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
} }
struct bfa_ioc_regs_s { struct bfa_ioc_regs_s {
bfa_os_addr_t hfn_mbox_cmd; void __iomem *hfn_mbox_cmd;
bfa_os_addr_t hfn_mbox; void __iomem *hfn_mbox;
bfa_os_addr_t lpu_mbox_cmd; void __iomem *lpu_mbox_cmd;
bfa_os_addr_t lpu_mbox; void __iomem *lpu_mbox;
bfa_os_addr_t pss_ctl_reg; void __iomem *pss_ctl_reg;
bfa_os_addr_t pss_err_status_reg; void __iomem *pss_err_status_reg;
bfa_os_addr_t app_pll_fast_ctl_reg; void __iomem *app_pll_fast_ctl_reg;
bfa_os_addr_t app_pll_slow_ctl_reg; void __iomem *app_pll_slow_ctl_reg;
bfa_os_addr_t ioc_sem_reg; void __iomem *ioc_sem_reg;
bfa_os_addr_t ioc_usage_sem_reg; void __iomem *ioc_usage_sem_reg;
bfa_os_addr_t ioc_init_sem_reg; void __iomem *ioc_init_sem_reg;
bfa_os_addr_t ioc_usage_reg; void __iomem *ioc_usage_reg;
bfa_os_addr_t host_page_num_fn; void __iomem *host_page_num_fn;
bfa_os_addr_t heartbeat; void __iomem *heartbeat;
bfa_os_addr_t ioc_fwstate; void __iomem *ioc_fwstate;
bfa_os_addr_t ll_halt; void __iomem *ll_halt;
bfa_os_addr_t err_set; void __iomem *err_set;
bfa_os_addr_t shirq_isr_next; void __iomem *shirq_isr_next;
bfa_os_addr_t shirq_msk_next; void __iomem *shirq_msk_next;
bfa_os_addr_t smem_page_start; void __iomem *smem_page_start;
u32 smem_pg0; u32 smem_pg0;
}; };
#define bfa_reg_read(_raddr) bfa_os_reg_read(_raddr) #define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
#define bfa_reg_write(_raddr, _val) bfa_os_reg_write(_raddr, _val)
#define bfa_mem_read(_raddr, _off) bfa_os_mem_read(_raddr, _off)
#define bfa_mem_write(_raddr, _off, _val) \ #define bfa_mem_write(_raddr, _off, _val) \
bfa_os_mem_write(_raddr, _off, _val) writel(swab32((_val)), ((_raddr) + (_off)))
/** /**
* IOC Mailbox structures * IOC Mailbox structures
*/ */
...@@ -249,7 +247,7 @@ struct bfa_ioc_s { ...@@ -249,7 +247,7 @@ struct bfa_ioc_s {
}; };
struct bfa_ioc_hwif_s { struct bfa_ioc_hwif_s {
bfa_status_t (*ioc_pll_init) (bfa_os_addr_t rb, bfa_boolean_t fcmode); bfa_status_t (*ioc_pll_init) (void __iomem *rb, bfa_boolean_t fcmode);
bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc); bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc); void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
void (*ioc_reg_init) (struct bfa_ioc_s *ioc); void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
...@@ -308,9 +306,9 @@ void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc, ...@@ -308,9 +306,9 @@ void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
(__ioc)->fcmode)) (__ioc)->fcmode))
bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc); bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
bfa_status_t bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode); bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
bfa_boolean_t bfa_ioc_ct_pll_init_complete(bfa_os_addr_t rb); bfa_boolean_t bfa_ioc_ct_pll_init_complete(void __iomem *rb);
bfa_status_t bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode); bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
#define bfa_ioc_isr_mode_set(__ioc, __msix) \ #define bfa_ioc_isr_mode_set(__ioc, __msix) \
((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)) ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix))
...@@ -370,8 +368,8 @@ void bfa_ioc_set_fcmode(struct bfa_ioc_s *ioc); ...@@ -370,8 +368,8 @@ void bfa_ioc_set_fcmode(struct bfa_ioc_s *ioc);
bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc); bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc);
void bfa_ioc_hbfail_register(struct bfa_ioc_s *ioc, void bfa_ioc_hbfail_register(struct bfa_ioc_s *ioc,
struct bfa_ioc_hbfail_notify_s *notify); struct bfa_ioc_hbfail_notify_s *notify);
bfa_boolean_t bfa_ioc_sem_get(bfa_os_addr_t sem_reg); bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
void bfa_ioc_sem_release(bfa_os_addr_t sem_reg); void bfa_ioc_sem_release(void __iomem *sem_reg);
void bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc); void bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc);
void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
struct bfi_ioc_image_hdr_s *fwhdr); struct bfi_ioc_image_hdr_s *fwhdr);
......
drivers/scsi/bfa/bfa_ioc_cb.c
View file @ 53440260
...@@ -72,8 +72,8 @@ bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc) ...@@ -72,8 +72,8 @@ bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc)
static void static void
bfa_ioc_cb_notify_hbfail(struct bfa_ioc_s *ioc) bfa_ioc_cb_notify_hbfail(struct bfa_ioc_s *ioc)
{ {
bfa_reg_write(ioc->ioc_regs.err_set, __PSS_ERR_STATUS_SET); writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set);
bfa_reg_read(ioc->ioc_regs.err_set); readl(ioc->ioc_regs.err_set);
} }
/** /**
...@@ -96,7 +96,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd[] = { ...@@ -96,7 +96,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd[] = {
static void static void
bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc) bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc)
{ {
bfa_os_addr_t rb; void __iomem *rb;
int pcifn = bfa_ioc_pcifn(ioc); int pcifn = bfa_ioc_pcifn(ioc);
rb = bfa_ioc_bar0(ioc); rb = bfa_ioc_bar0(ioc);
...@@ -180,14 +180,14 @@ bfa_ioc_cb_ownership_reset(struct bfa_ioc_s *ioc) ...@@ -180,14 +180,14 @@ bfa_ioc_cb_ownership_reset(struct bfa_ioc_s *ioc)
* before we clear it. If it is not locked, writing 1 * before we clear it. If it is not locked, writing 1
* will lock it instead of clearing it. * will lock it instead of clearing it.
*/ */
bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); readl(ioc->ioc_regs.ioc_sem_reg);
bfa_ioc_hw_sem_release(ioc); bfa_ioc_hw_sem_release(ioc);
} }
bfa_status_t bfa_status_t
bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode)
{ {
u32 pll_sclk, pll_fclk; u32 pll_sclk, pll_fclk;
...@@ -199,38 +199,32 @@ bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) ...@@ -199,38 +199,32 @@ bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode)
__APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) | __APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) |
__APP_PLL_400_JITLMT0_1(3U) | __APP_PLL_400_JITLMT0_1(3U) |
__APP_PLL_400_CNTLMT0_1(3U); __APP_PLL_400_CNTLMT0_1(3U);
bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
bfa_reg_write(rb + APP_PLL_212_CTL_REG, writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG);
__APP_PLL_212_LOGIC_SOFT_RESET); writel(__APP_PLL_212_BYPASS | __APP_PLL_212_LOGIC_SOFT_RESET,
bfa_reg_write(rb + APP_PLL_212_CTL_REG, rb + APP_PLL_212_CTL_REG);
__APP_PLL_212_BYPASS | writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG);
__APP_PLL_212_LOGIC_SOFT_RESET); writel(__APP_PLL_400_BYPASS | __APP_PLL_400_LOGIC_SOFT_RESET,
bfa_reg_write(rb + APP_PLL_400_CTL_REG, rb + APP_PLL_400_CTL_REG);
__APP_PLL_400_LOGIC_SOFT_RESET);
bfa_reg_write(rb + APP_PLL_400_CTL_REG,
__APP_PLL_400_BYPASS |
__APP_PLL_400_LOGIC_SOFT_RESET);
udelay(2); udelay(2);
bfa_reg_write(rb + APP_PLL_212_CTL_REG, writel(__APP_PLL_212_LOGIC_SOFT_RESET, rb + APP_PLL_212_CTL_REG);
__APP_PLL_212_LOGIC_SOFT_RESET); writel(__APP_PLL_400_LOGIC_SOFT_RESET, rb + APP_PLL_400_CTL_REG);
bfa_reg_write(rb + APP_PLL_400_CTL_REG, writel(pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET,
__APP_PLL_400_LOGIC_SOFT_RESET); rb + APP_PLL_212_CTL_REG);
bfa_reg_write(rb + APP_PLL_212_CTL_REG, writel(pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET,
pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET); rb + APP_PLL_400_CTL_REG);
bfa_reg_write(rb + APP_PLL_400_CTL_REG,
pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET);
udelay(2000); udelay(2000);
bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
bfa_reg_write((rb + APP_PLL_212_CTL_REG), pll_sclk); writel(pll_sclk, (rb + APP_PLL_212_CTL_REG));
bfa_reg_write((rb + APP_PLL_400_CTL_REG), pll_fclk); writel(pll_fclk, (rb + APP_PLL_400_CTL_REG));
return BFA_STATUS_OK; return BFA_STATUS_OK;
} }
drivers/scsi/bfa/bfa_ioc_ct.c
View file @ 53440260
...@@ -76,19 +76,19 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc) ...@@ -76,19 +76,19 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc)
return BFA_TRUE; return BFA_TRUE;
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
usecnt = bfa_reg_read(ioc->ioc_regs.ioc_usage_reg); usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
/** /**
* If usage count is 0, always return TRUE. * If usage count is 0, always return TRUE.
*/ */
if (usecnt == 0) { if (usecnt == 0) {
bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, 1); writel(1, ioc->ioc_regs.ioc_usage_reg);
bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg);
bfa_trc(ioc, usecnt); bfa_trc(ioc, usecnt);
return BFA_TRUE; return BFA_TRUE;
} }
ioc_fwstate = bfa_reg_read(ioc->ioc_regs.ioc_fwstate); ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
bfa_trc(ioc, ioc_fwstate); bfa_trc(ioc, ioc_fwstate);
/** /**
...@@ -110,7 +110,7 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc) ...@@ -110,7 +110,7 @@ bfa_ioc_ct_firmware_lock(struct bfa_ioc_s *ioc)
* Same firmware version. Increment the reference count. * Same firmware version. Increment the reference count.
*/ */
usecnt++; usecnt++;
bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, usecnt); writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg);
bfa_trc(ioc, usecnt); bfa_trc(ioc, usecnt);
return BFA_TRUE; return BFA_TRUE;
...@@ -138,11 +138,11 @@ bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc) ...@@ -138,11 +138,11 @@ bfa_ioc_ct_firmware_unlock(struct bfa_ioc_s *ioc)
* decrement usage count * decrement usage count
*/ */
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
usecnt = bfa_reg_read(ioc->ioc_regs.ioc_usage_reg); usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
bfa_assert(usecnt > 0); bfa_assert(usecnt > 0);
usecnt--; usecnt--;
bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, usecnt); writel(usecnt, ioc->ioc_regs.ioc_usage_reg);
bfa_trc(ioc, usecnt); bfa_trc(ioc, usecnt);
bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg);
...@@ -155,12 +155,12 @@ static void ...@@ -155,12 +155,12 @@ static void
bfa_ioc_ct_notify_hbfail(struct bfa_ioc_s *ioc) bfa_ioc_ct_notify_hbfail(struct bfa_ioc_s *ioc)
{ {
if (ioc->cna) { if (ioc->cna) {
bfa_reg_write(ioc->ioc_regs.ll_halt, __FW_INIT_HALT_P); writel(__FW_INIT_HALT_P, ioc->ioc_regs.ll_halt);
/* Wait for halt to take effect */ /* Wait for halt to take effect */
bfa_reg_read(ioc->ioc_regs.ll_halt); readl(ioc->ioc_regs.ll_halt);
} else { } else {
bfa_reg_write(ioc->ioc_regs.err_set, __PSS_ERR_STATUS_SET); writel(__PSS_ERR_STATUS_SET, ioc->ioc_regs.err_set);
bfa_reg_read(ioc->ioc_regs.err_set); readl(ioc->ioc_regs.err_set);
} }
} }
...@@ -197,7 +197,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd_p1[] = { ...@@ -197,7 +197,7 @@ static struct { u32 hfn, lpu; } iocreg_mbcmd_p1[] = {
static void static void
bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc) bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc)
{ {
bfa_os_addr_t rb; void __iomem *rb;
int pcifn = bfa_ioc_pcifn(ioc); int pcifn = bfa_ioc_pcifn(ioc);
rb = bfa_ioc_bar0(ioc); rb = bfa_ioc_bar0(ioc);
...@@ -256,13 +256,13 @@ bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc) ...@@ -256,13 +256,13 @@ bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc)
static void static void
bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc) bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc)
{ {
bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; void __iomem *rb = ioc->pcidev.pci_bar_kva;
u32 r32; u32 r32;
/** /**
* For catapult, base port id on personality register and IOC type * For catapult, base port id on personality register and IOC type
*/ */
r32 = bfa_reg_read(rb + FNC_PERS_REG); r32 = readl(rb + FNC_PERS_REG);
r32 >>= FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc)); r32 >>= FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc));
ioc->port_id = (r32 & __F0_PORT_MAP_MK) >> __F0_PORT_MAP_SH; ioc->port_id = (r32 & __F0_PORT_MAP_MK) >> __F0_PORT_MAP_SH;
...@@ -276,10 +276,10 @@ bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc) ...@@ -276,10 +276,10 @@ bfa_ioc_ct_map_port(struct bfa_ioc_s *ioc)
static void static void
bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix) bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix)
{ {
bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; void __iomem *rb = ioc->pcidev.pci_bar_kva;
u32 r32, mode; u32 r32, mode;
r32 = bfa_reg_read(rb + FNC_PERS_REG); r32 = readl(rb + FNC_PERS_REG);
bfa_trc(ioc, r32); bfa_trc(ioc, r32);
mode = (r32 >> FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))) & mode = (r32 >> FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))) &
...@@ -300,7 +300,7 @@ bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix) ...@@ -300,7 +300,7 @@ bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix)
r32 |= (mode << FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc))); r32 |= (mode << FNC_PERS_FN_SHIFT(bfa_ioc_pcifn(ioc)));
bfa_trc(ioc, r32); bfa_trc(ioc, r32);
bfa_reg_write(rb + FNC_PERS_REG, r32); writel(r32, rb + FNC_PERS_REG);
} }
/** /**
...@@ -312,7 +312,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) ...@@ -312,7 +312,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc)
if (ioc->cna) { if (ioc->cna) {
bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_get(ioc->ioc_regs.ioc_usage_sem_reg);
bfa_reg_write(ioc->ioc_regs.ioc_usage_reg, 0); writel(0, ioc->ioc_regs.ioc_usage_reg);
bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg);
} }
...@@ -321,7 +321,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) ...@@ -321,7 +321,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc)
* before we clear it. If it is not locked, writing 1 * before we clear it. If it is not locked, writing 1
* will lock it instead of clearing it. * will lock it instead of clearing it.
*/ */
bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); readl(ioc->ioc_regs.ioc_sem_reg);
bfa_ioc_hw_sem_release(ioc); bfa_ioc_hw_sem_release(ioc);
} }
...@@ -331,17 +331,17 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc) ...@@ -331,17 +331,17 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc_s *ioc)
* Check the firmware state to know if pll_init has been completed already * Check the firmware state to know if pll_init has been completed already
*/ */
bfa_boolean_t bfa_boolean_t
bfa_ioc_ct_pll_init_complete(bfa_os_addr_t rb) bfa_ioc_ct_pll_init_complete(void __iomem *rb)
{ {
if ((bfa_reg_read(rb + BFA_IOC0_STATE_REG) == BFI_IOC_OP) || if ((readl(rb + BFA_IOC0_STATE_REG) == BFI_IOC_OP) ||
(bfa_reg_read(rb + BFA_IOC1_STATE_REG) == BFI_IOC_OP)) (readl(rb + BFA_IOC1_STATE_REG) == BFI_IOC_OP))
return BFA_TRUE; return BFA_TRUE;
return BFA_FALSE; return BFA_FALSE;
} }
bfa_status_t bfa_status_t
bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode)
{ {
u32 pll_sclk, pll_fclk, r32; u32 pll_sclk, pll_fclk, r32;
...@@ -354,56 +354,51 @@ bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) ...@@ -354,56 +354,51 @@ bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode)
__APP_PLL_425_JITLMT0_1(3U) | __APP_PLL_425_JITLMT0_1(3U) |
__APP_PLL_425_CNTLMT0_1(1U); __APP_PLL_425_CNTLMT0_1(1U);
if (fcmode) { if (fcmode) {
bfa_reg_write((rb + OP_MODE), 0); writel(0, (rb + OP_MODE));
bfa_reg_write((rb + ETH_MAC_SER_REG), writel(__APP_EMS_CMLCKSEL | __APP_EMS_REFCKBUFEN2 |
__APP_EMS_CMLCKSEL | __APP_EMS_CHANNEL_SEL, (rb + ETH_MAC_SER_REG));
__APP_EMS_REFCKBUFEN2 |
__APP_EMS_CHANNEL_SEL);
} else { } else {
bfa_reg_write((rb + OP_MODE), __GLOBAL_FCOE_MODE); writel(__GLOBAL_FCOE_MODE, (rb + OP_MODE));
bfa_reg_write((rb + ETH_MAC_SER_REG), writel(__APP_EMS_REFCKBUFEN1, (rb + ETH_MAC_SER_REG));
__APP_EMS_REFCKBUFEN1);
} }
bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); writel(BFI_IOC_UNINIT, (rb + BFA_IOC0_STATE_REG));
bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); writel(BFI_IOC_UNINIT, (rb + BFA_IOC1_STATE_REG));
bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_MSK));
bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_MSK));
bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET,
__APP_PLL_312_LOGIC_SOFT_RESET); rb + APP_PLL_312_CTL_REG);
bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk | writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET,
__APP_PLL_425_LOGIC_SOFT_RESET); rb + APP_PLL_425_CTL_REG);
bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | writel(pll_sclk | __APP_PLL_312_LOGIC_SOFT_RESET | __APP_PLL_312_ENABLE,
__APP_PLL_312_LOGIC_SOFT_RESET | __APP_PLL_312_ENABLE); rb + APP_PLL_312_CTL_REG);
bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk | writel(pll_fclk | __APP_PLL_425_LOGIC_SOFT_RESET | __APP_PLL_425_ENABLE,
__APP_PLL_425_LOGIC_SOFT_RESET | __APP_PLL_425_ENABLE); rb + APP_PLL_425_CTL_REG);
bfa_reg_read(rb + HOSTFN0_INT_MSK); readl(rb + HOSTFN0_INT_MSK);
udelay(2000); udelay(2000);
bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN0_INT_STATUS));
bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); writel(0xffffffffU, (rb + HOSTFN1_INT_STATUS));
bfa_reg_write(rb + APP_PLL_312_CTL_REG, pll_sclk | writel(pll_sclk | __APP_PLL_312_ENABLE, rb + APP_PLL_312_CTL_REG);
__APP_PLL_312_ENABLE); writel(pll_fclk | __APP_PLL_425_ENABLE, rb + APP_PLL_425_CTL_REG);
bfa_reg_write(rb + APP_PLL_425_CTL_REG, pll_fclk |
__APP_PLL_425_ENABLE);
if (!fcmode) { if (!fcmode) {
bfa_reg_write((rb + PMM_1T_RESET_REG_P0), __PMM_1T_RESET_P); writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P0));
bfa_reg_write((rb + PMM_1T_RESET_REG_P1), __PMM_1T_RESET_P); writel(__PMM_1T_RESET_P, (rb + PMM_1T_RESET_REG_P1));
} }
r32 = bfa_reg_read((rb + PSS_CTL_REG)); r32 = readl((rb + PSS_CTL_REG));
r32 &= ~__PSS_LMEM_RESET; r32 &= ~__PSS_LMEM_RESET;
bfa_reg_write((rb + PSS_CTL_REG), r32); writel(r32, (rb + PSS_CTL_REG));
udelay(1000); udelay(1000);
if (!fcmode) { if (!fcmode) {
bfa_reg_write((rb + PMM_1T_RESET_REG_P0), 0); writel(0, (rb + PMM_1T_RESET_REG_P0));
bfa_reg_write((rb + PMM_1T_RESET_REG_P1), 0); writel(0, (rb + PMM_1T_RESET_REG_P1));
} }
bfa_reg_write((rb + MBIST_CTL_REG), __EDRAM_BISTR_START); writel(__EDRAM_BISTR_START, (rb + MBIST_CTL_REG));
udelay(1000); udelay(1000);
r32 = bfa_reg_read((rb + MBIST_STAT_REG)); r32 = readl((rb + MBIST_STAT_REG));
bfa_reg_write((rb + MBIST_CTL_REG), 0); writel(0, (rb + MBIST_CTL_REG));
return BFA_STATUS_OK; return BFA_STATUS_OK;
} }
drivers/scsi/bfa/bfa_os_inc.h
View file @ 53440260
...@@ -65,12 +65,6 @@ do { \ ...@@ -65,12 +65,6 @@ do { \
((_x) & 0x00ff00) | \ ((_x) & 0x00ff00) | \
(((_x) & 0xff0000) >> 16)) (((_x) & 0xff0000) >> 16))
#define bfa_os_swap32(_x) \
((((_x) & 0xff) << 24) | \
(((_x) & 0x0000ff00) << 8) | \
(((_x) & 0x00ff0000) >> 8) | \
(((_x) & 0xff000000) >> 24))
#define bfa_os_swap_sgaddr(_x) ((u64)( \ #define bfa_os_swap_sgaddr(_x) ((u64)( \
(((u64)(_x) & (u64)0x00000000000000ffull) << 32) | \ (((u64)(_x) & (u64)0x00000000000000ffull) << 32) | \
(((u64)(_x) & (u64)0x000000000000ff00ull) << 32) | \ (((u64)(_x) & (u64)0x000000000000ff00ull) << 32) | \
...@@ -91,14 +85,6 @@ do { \ ...@@ -91,14 +85,6 @@ do { \
#define bfa_os_ntoh3b(_x) bfa_os_hton3b(_x) #define bfa_os_ntoh3b(_x) bfa_os_hton3b(_x)
#define bfa_os_u32(__pa64) ((__pa64) >> 32) #define bfa_os_u32(__pa64) ((__pa64) >> 32)
#define bfa_os_addr_t void __iomem *
#define bfa_os_reg_read(_raddr) readl(_raddr)
#define bfa_os_reg_write(_raddr, _val) writel((_val), (_raddr))
#define bfa_os_mem_read(_raddr, _off) \
bfa_os_swap32(readl(((_raddr) + (_off))))
#define bfa_os_mem_write(_raddr, _off, _val) \
writel(bfa_os_swap32((_val)), ((_raddr) + (_off)))
#define BFA_TRC_TS(_trcm) \ #define BFA_TRC_TS(_trcm) \
({ \ ({ \
......
drivers/scsi/bfa/bfad_debugfs.c
View file @ 53440260
...@@ -318,7 +318,7 @@ bfad_debugfs_write_regrd(struct file *file, const char __user *buf, ...@@ -318,7 +318,7 @@ bfad_debugfs_write_regrd(struct file *file, const char __user *buf,
regbuf = (u32 *)bfad->regdata; regbuf = (u32 *)bfad->regdata;
spin_lock_irqsave(&bfad->bfad_lock, flags); spin_lock_irqsave(&bfad->bfad_lock, flags);
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
*regbuf = bfa_reg_read(reg_addr); *regbuf = readl(reg_addr);
regbuf++; regbuf++;
reg_addr += sizeof(u32); reg_addr += sizeof(u32);
} }
...@@ -361,7 +361,7 @@ bfad_debugfs_write_regwr(struct file *file, const char __user *buf, ...@@ -361,7 +361,7 @@ bfad_debugfs_write_regwr(struct file *file, const char __user *buf,
reg_addr = (u32 *) ((u8 *) bfa_ioc_bar0(ioc) + addr); reg_addr = (u32 *) ((u8 *) bfa_ioc_bar0(ioc) + addr);
spin_lock_irqsave(&bfad->bfad_lock, flags); spin_lock_irqsave(&bfad->bfad_lock, flags);
bfa_reg_write(reg_addr, val); writel(val, reg_addr);
spin_unlock_irqrestore(&bfad->bfad_lock, flags); spin_unlock_irqrestore(&bfad->bfad_lock, flags);
return nbytes; return nbytes;
......
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