Commit 543ba9d6 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Split g4x_compute_pipe_wm() into two

Split g4x_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.
Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-2-ville.syrjala@linux.intel.com
parent bde544e1
...@@ -1337,34 +1337,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state, ...@@ -1337,34 +1337,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
return true; return true;
} }
static int g4x_compute_pipe_wm(struct intel_atomic_state *state, static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc)
{ {
struct intel_crtc_state *crtc_state = struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
intel_atomic_get_new_crtc_state(state, crtc);
struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal; struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR); u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
const struct g4x_pipe_wm *raw; const struct g4x_pipe_wm *raw;
const struct intel_plane_state *old_plane_state;
const struct intel_plane_state *new_plane_state;
struct intel_plane *plane;
enum plane_id plane_id; enum plane_id plane_id;
int i, level; int level;
unsigned int dirty = 0;
for_each_oldnew_intel_plane_in_state(state, plane,
old_plane_state,
new_plane_state, i) {
if (new_plane_state->hw.crtc != &crtc->base &&
old_plane_state->hw.crtc != &crtc->base)
continue;
if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
dirty |= BIT(plane->id);
}
if (!dirty)
return 0;
level = G4X_WM_LEVEL_NORMAL; level = G4X_WM_LEVEL_NORMAL;
if (!g4x_raw_crtc_wm_is_valid(crtc_state, level)) if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
...@@ -1417,6 +1397,34 @@ static int g4x_compute_pipe_wm(struct intel_atomic_state *state, ...@@ -1417,6 +1397,34 @@ static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
return 0; return 0;
} }
static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_plane_state *old_plane_state;
const struct intel_plane_state *new_plane_state;
struct intel_plane *plane;
unsigned int dirty = 0;
int i;
for_each_oldnew_intel_plane_in_state(state, plane,
old_plane_state,
new_plane_state, i) {
if (new_plane_state->hw.crtc != &crtc->base &&
old_plane_state->hw.crtc != &crtc->base)
continue;
if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
dirty |= BIT(plane->id);
}
if (!dirty)
return 0;
return _g4x_compute_pipe_wm(crtc_state);
}
static int g4x_compute_intermediate_wm(struct intel_atomic_state *state, static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc) struct intel_crtc *crtc)
{ {
......
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