Commit 54e88e06 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie

drm/radeon/kms: clean up radeon_asic struct (v2)

v2: fix typo.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 9e6f3d02
...@@ -1133,12 +1133,23 @@ struct radeon_asic { ...@@ -1133,12 +1133,23 @@ struct radeon_asic {
void (*vga_set_state)(struct radeon_device *rdev, bool state); void (*vga_set_state)(struct radeon_device *rdev, bool state);
bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp); bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*asic_reset)(struct radeon_device *rdev); int (*asic_reset)(struct radeon_device *rdev);
/* ioctl hw specific callback. Some hw might want to perform special
* operation on specific ioctl. For instance on wait idle some hw
* might want to perform and HDP flush through MMIO as it seems that
* some R6XX/R7XX hw doesn't take HDP flush into account if programmed
* through ring.
*/
void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
/* check if 3D engine is idle */
bool (*gui_idle)(struct radeon_device *rdev);
/* wait for mc_idle */
int (*mc_wait_for_idle)(struct radeon_device *rdev);
/* gart */
struct { struct {
void (*tlb_flush)(struct radeon_device *rdev); void (*tlb_flush)(struct radeon_device *rdev);
int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr); int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr);
} gart; } gart;
/* ring specific callbacks */
struct { struct {
void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib); int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
...@@ -1150,12 +1161,12 @@ struct radeon_asic { ...@@ -1150,12 +1161,12 @@ struct radeon_asic {
int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp); int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp); int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
} ring[RADEON_NUM_RINGS]; } ring[RADEON_NUM_RINGS];
/* irqs */
struct { struct {
int (*set)(struct radeon_device *rdev); int (*set)(struct radeon_device *rdev);
int (*process)(struct radeon_device *rdev); int (*process)(struct radeon_device *rdev);
} irq; } irq;
/* displays */
struct { struct {
/* display watermarks */ /* display watermarks */
void (*bandwidth_update)(struct radeon_device *rdev); void (*bandwidth_update)(struct radeon_device *rdev);
...@@ -1164,7 +1175,7 @@ struct radeon_asic { ...@@ -1164,7 +1175,7 @@ struct radeon_asic {
/* wait for vblank */ /* wait for vblank */
void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
} display; } display;
/* copy functions for bo handling */
struct { struct {
int (*blit)(struct radeon_device *rdev, int (*blit)(struct radeon_device *rdev,
uint64_t src_offset, uint64_t src_offset,
...@@ -1187,30 +1198,20 @@ struct radeon_asic { ...@@ -1187,30 +1198,20 @@ struct radeon_asic {
/* ring used for bo copies */ /* ring used for bo copies */
u32 copy_ring_index; u32 copy_ring_index;
} copy; } copy;
/* surfaces */
struct { struct {
int (*set_reg)(struct radeon_device *rdev, int reg, int (*set_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch, uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size); uint32_t offset, uint32_t obj_size);
void (*clear_reg)(struct radeon_device *rdev, int reg); void (*clear_reg)(struct radeon_device *rdev, int reg);
} surface; } surface;
/* hotplug detect */
struct { struct {
void (*init)(struct radeon_device *rdev); void (*init)(struct radeon_device *rdev);
void (*fini)(struct radeon_device *rdev); void (*fini)(struct radeon_device *rdev);
bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
} hpd; } hpd;
/* ioctl hw specific callback. Some hw might want to perform special
* operation on specific ioctl. For instance on wait idle some hw
* might want to perform and HDP flush through MMIO as it seems that
* some R6XX/R7XX hw doesn't take HDP flush into account if programmed
* through ring.
*/
void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
/* check if 3D engine is idle */
bool (*gui_idle)(struct radeon_device *rdev);
/* power management */ /* power management */
struct { struct {
void (*misc)(struct radeon_device *rdev); void (*misc)(struct radeon_device *rdev);
...@@ -1232,9 +1233,6 @@ struct radeon_asic { ...@@ -1232,9 +1233,6 @@ struct radeon_asic {
u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
void (*post_page_flip)(struct radeon_device *rdev, int crtc); void (*post_page_flip)(struct radeon_device *rdev, int crtc);
} pflip; } pflip;
/* wait for mc_idle */
int (*mc_wait_for_idle)(struct radeon_device *rdev);
}; };
/* /*
......
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