Commit 55954f85 authored by Tony Prisk's avatar Tony Prisk

dts: vt8500: Update serial nodes and disable by default in SoC files

Missing aliases for uarts on vt8500, wm8505, wm8650 added.
Nodes incorrectly labelled uart@.., changed to serial@... on all SoCs.
Set each uarts default status = "disabled" as they generally don't exist.

For each board file, we only need to enable uart0 as no other uarts are
physically present on any of these boards.
Signed-off-by: default avatarTony Prisk <linux@prisktech.co.nz>
parent 4606c480
...@@ -30,3 +30,7 @@ timing0: 800x480 { ...@@ -30,3 +30,7 @@ timing0: 800x480 {
}; };
}; };
}; };
&uart0 {
status = "okay";
};
...@@ -21,6 +21,13 @@ cpu { ...@@ -21,6 +21,13 @@ cpu {
}; };
}; };
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -121,32 +128,36 @@ ge_rops@d8050400 { ...@@ -121,32 +128,36 @@ ge_rops@d8050400 {
reg = <0xd8050400 0x100>; reg = <0xd8050400 0x100>;
}; };
uart@d8200000 { uart0: serial@d8200000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>; reg = <0xd8200000 0x1040>;
interrupts = <32>; interrupts = <32>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
status = "disabled";
}; };
uart@d82b0000 { uart1: serial@d82b0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>; reg = <0xd82b0000 0x1040>;
interrupts = <33>; interrupts = <33>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
status = "disabled";
}; };
uart@d8210000 { uart2: serial@d8210000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>; reg = <0xd8210000 0x1040>;
interrupts = <47>; interrupts = <47>;
clocks = <&clkuart2>; clocks = <&clkuart2>;
status = "disabled";
}; };
uart@d82c0000 { uart3: serial@d82c0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>; reg = <0xd82c0000 0x1040>;
interrupts = <50>; interrupts = <50>;
clocks = <&clkuart3>; clocks = <&clkuart3>;
status = "disabled";
}; };
rtc@d8100000 { rtc@d8100000 {
......
...@@ -30,3 +30,7 @@ timing0: 800x480 { ...@@ -30,3 +30,7 @@ timing0: 800x480 {
}; };
}; };
}; };
&uart0 {
status = "okay";
};
...@@ -21,6 +21,15 @@ cpu { ...@@ -21,6 +21,15 @@ cpu {
}; };
}; };
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -167,46 +176,52 @@ ge_rops@d8050400 { ...@@ -167,46 +176,52 @@ ge_rops@d8050400 {
reg = <0xd8050400 0x100>; reg = <0xd8050400 0x100>;
}; };
uart@d8200000 { uart0: serial@d8200000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>; reg = <0xd8200000 0x1040>;
interrupts = <32>; interrupts = <32>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
status = "disabled";
}; };
uart@d82b0000 { uart1: serial@d82b0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>; reg = <0xd82b0000 0x1040>;
interrupts = <33>; interrupts = <33>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
status = "disabled";
}; };
uart@d8210000 { uart2: serial@d8210000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>; reg = <0xd8210000 0x1040>;
interrupts = <47>; interrupts = <47>;
clocks = <&clkuart2>; clocks = <&clkuart2>;
status = "disabled";
}; };
uart@d82c0000 { uart3: serial@d82c0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>; reg = <0xd82c0000 0x1040>;
interrupts = <50>; interrupts = <50>;
clocks = <&clkuart3>; clocks = <&clkuart3>;
status = "disabled";
}; };
uart@d8370000 { uart4: serial@d8370000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>; reg = <0xd8370000 0x1040>;
interrupts = <31>; interrupts = <31>;
clocks = <&clkuart4>; clocks = <&clkuart4>;
status = "disabled";
}; };
uart@d8380000 { uart5: serial@d8380000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>; reg = <0xd8380000 0x1040>;
interrupts = <30>; interrupts = <30>;
clocks = <&clkuart5>; clocks = <&clkuart5>;
status = "disabled";
}; };
rtc@d8100000 { rtc@d8100000 {
......
...@@ -32,3 +32,6 @@ timing0: 800x480 { ...@@ -32,3 +32,6 @@ timing0: 800x480 {
}; };
}; };
&uart0 {
status = "okay";
};
...@@ -21,6 +21,11 @@ cpu { ...@@ -21,6 +21,11 @@ cpu {
}; };
}; };
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -150,18 +155,20 @@ ge_rops@d8050400 { ...@@ -150,18 +155,20 @@ ge_rops@d8050400 {
reg = <0xd8050400 0x100>; reg = <0xd8050400 0x100>;
}; };
uart@d8200000 { uart0: serial@d8200000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>; reg = <0xd8200000 0x1040>;
interrupts = <32>; interrupts = <32>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
status = "disabled";
}; };
uart@d82b0000 { uart1: serial@d82b0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>; reg = <0xd82b0000 0x1040>;
interrupts = <33>; interrupts = <33>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
status = "disabled";
}; };
rtc@d8100000 { rtc@d8100000 {
......
...@@ -24,3 +24,7 @@ i2c: i2c { ...@@ -24,3 +24,7 @@ i2c: i2c {
wm,pull = <2>; /* pull-up */ wm,pull = <2>; /* pull-up */
}; };
}; };
&uart0 {
status = "okay";
};
...@@ -258,46 +258,52 @@ uhci@d8008d00 { ...@@ -258,46 +258,52 @@ uhci@d8008d00 {
interrupts = <26>; interrupts = <26>;
}; };
uart0: uart@d8200000 { uart0: serial@d8200000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>; reg = <0xd8200000 0x1040>;
interrupts = <32>; interrupts = <32>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
status = "disabled";
}; };
uart1: uart@d82b0000 { uart1: serial@d82b0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>; reg = <0xd82b0000 0x1040>;
interrupts = <33>; interrupts = <33>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
status = "disabled";
}; };
uart2: uart@d8210000 { uart2: serial@d8210000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>; reg = <0xd8210000 0x1040>;
interrupts = <47>; interrupts = <47>;
clocks = <&clkuart2>; clocks = <&clkuart2>;
status = "disabled";
}; };
uart3: uart@d82c0000 { uart3: serial@d82c0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>; reg = <0xd82c0000 0x1040>;
interrupts = <50>; interrupts = <50>;
clocks = <&clkuart3>; clocks = <&clkuart3>;
status = "disabled";
}; };
uart4: uart@d8370000 { uart4: serial@d8370000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>; reg = <0xd8370000 0x1040>;
interrupts = <30>; interrupts = <30>;
clocks = <&clkuart4>; clocks = <&clkuart4>;
status = "disabled";
}; };
uart5: uart@d8380000 { uart5: serial@d8380000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>; reg = <0xd8380000 0x1040>;
interrupts = <43>; interrupts = <43>;
clocks = <&clkuart5>; clocks = <&clkuart5>;
status = "disabled";
}; };
rtc@d8100000 { rtc@d8100000 {
......
...@@ -41,3 +41,7 @@ timing0: 800x480 { ...@@ -41,3 +41,7 @@ timing0: 800x480 {
}; };
}; };
}; };
&uart0 {
status = "okay";
};
...@@ -189,32 +189,36 @@ uhci@d8008d00 { ...@@ -189,32 +189,36 @@ uhci@d8008d00 {
interrupts = <26>; interrupts = <26>;
}; };
uart0: uart@d8200000 { uart0: serial@d8200000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>; reg = <0xd8200000 0x1040>;
interrupts = <32>; interrupts = <32>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
status = "disabled";
}; };
uart1: uart@d82b0000 { uart1: serial@d82b0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>; reg = <0xd82b0000 0x1040>;
interrupts = <33>; interrupts = <33>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
status = "disabled";
}; };
uart2: uart@d8210000 { uart2: serial@d8210000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>; reg = <0xd8210000 0x1040>;
interrupts = <47>; interrupts = <47>;
clocks = <&clkuart2>; clocks = <&clkuart2>;
status = "disabled";
}; };
uart3: uart@d82c0000 { uart3: serial@d82c0000 {
compatible = "via,vt8500-uart"; compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>; reg = <0xd82c0000 0x1040>;
interrupts = <50>; interrupts = <50>;
clocks = <&clkuart3>; clocks = <&clkuart3>;
status = "disabled";
}; };
rtc@d8100000 { rtc@d8100000 {
......
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