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Commit 562dc4c9 authored by 周琰杰 (Zhou Yanjie)'s avatar 周琰杰 (Zhou Yanjie) Committed by Thomas Bogendoerfer
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MIPS: Ingenic: Refresh device tree for Ingenic SoCs and boards. 

1.Add SSI nodes for X1000 SoC and X1830 SoC from Ingenic.
2.Refresh SSI related nodes in CU1000-Neo and CU1830-Neo.
3.The X1830 SoC used by the CU1830-Neo and the X1000 SoC
  used by the CU1000-Neo are both single-core processors,
  therefore the "OST_CLK_PERCPU_TIMER" ABI should not be
  used in the OST nodes of the CU1830-Neo and CU1000-Neo,
  it is just a coincidence that there is no problem now.
  So replace the misused "OST_CLK_PERCPU_TIMER" ABI with
  the correct "OST_CLK_EVENT_TIMER" ABI.
Signed-off-by: default avatar周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent b2a5df71
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Showing with 138 additions and 74 deletions
arch/mips/boot/dts/ingenic/cu1000-neo.dts
View file @ 562dc4c9
......@@ -31,42 +31,6 @@ led-0 {
};
};
ssi: spi-gpio {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
num-chipselects = <1>;
mosi-gpios = <&gpd 2 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpd 3 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpd 0 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpd 1 GPIO_ACTIVE_HIGH>;
status = "okay";
spi-max-frequency = <50000000>;
sc16is752: expander@0 {
compatible = "nxp,sc16is752";
reg = <0>; /* CE0 */
spi-max-frequency = <4000000>;
clocks = <&exclk_sc16is752>;
interrupt-parent = <&gpc>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
exclk_sc16is752: sc16is752 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
};
};
wlan_pwrseq: msc1-pwrseq {
compatible = "mmc-pwrseq-simple";
......@@ -90,7 +54,7 @@ &cgu {
&ost {
/* 1500 kHz for the system timer and clocksource */
assigned-clocks = <&ost OST_CLK_PERCPU_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clocks = <&ost OST_CLK_EVENT_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clock-rates = <1500000>, <1500000>;
};
......@@ -101,6 +65,39 @@ &uart2 {
pinctrl-0 = <&pins_uart2>;
};
&ssi {
status = "okay";
num-cs = <2>;
cs-gpios = <0>, <&gpc 20 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pins_ssi>;
sc16is752: expander@0 {
compatible = "nxp,sc16is752";
reg = <0>; /* CE0 */
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
spi-max-frequency = <4000000>;
clocks = <&exclk_sc16is752>;
interrupt-parent = <&gpc>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
exclk_sc16is752: sc16is752 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
};
};
&i2c0 {
status = "okay";
......@@ -192,6 +189,12 @@ pins_uart2: uart2 {
bias-pull-up;
};
pins_ssi: ssi {
function = "ssi";
groups = "ssi-dt-d", "ssi-dr-d", "ssi-clk-d", "ssi-ce0-d";
bias-disable;
};
pins_i2c0: i2c0 {
function = "i2c0";
groups = "i2c0-data";
......
arch/mips/boot/dts/ingenic/cu1830-neo.dts
View file @ 562dc4c9
......@@ -31,42 +31,6 @@ led-0 {
};
};
ssi0: spi-gpio {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
num-chipselects = <1>;
mosi-gpios = <&gpc 12 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpc 11 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpc 16 GPIO_ACTIVE_HIGH>;
status = "okay";
spi-max-frequency = <50000000>;
sc16is752: expander@0 {
compatible = "nxp,sc16is752";
reg = <0>; /* CE0 */
spi-max-frequency = <4000000>;
clocks = <&exclk_sc16is752>;
interrupt-parent = <&gpb>;
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
exclk_sc16is752: sc16is752 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
};
};
wlan_pwrseq: msc1-pwrseq {
compatible = "mmc-pwrseq-simple";
......@@ -90,7 +54,7 @@ &cgu {
&ost {
/* 1500 kHz for the system timer and clocksource */
assigned-clocks = <&ost OST_CLK_PERCPU_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clocks = <&ost OST_CLK_EVENT_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clock-rates = <1500000>, <1500000>;
};
......@@ -101,6 +65,38 @@ &uart1 {
pinctrl-0 = <&pins_uart1>;
};
&ssi0 {
status = "okay";
num-cs = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pins_ssi0>;
sc16is752: expander@0 {
compatible = "nxp,sc16is752";
reg = <0>; /* CE0 */
spi-rx-bus-width = <1>;
spi-tx-bus-width = <1>;
spi-max-frequency = <4000000>;
clocks = <&exclk_sc16is752>;
interrupt-parent = <&gpb>;
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
exclk_sc16is752: sc16is752 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
};
};
&i2c0 {
status = "okay";
......@@ -196,6 +192,12 @@ pins_uart1: uart1 {
bias-pull-up;
};
pins_ssi0: ssi0 {
function = "ssi0";
groups = "ssi0-dt", "ssi0-dr", "ssi0-clk", "ssi0-ce0", "ssi0-ce1";
bias-disable;
};
pins_i2c0: i2c0 {
function = "i2c0";
groups = "i2c0-data";
......
arch/mips/boot/dts/ingenic/x1000.dtsi
View file @ 562dc4c9
......@@ -258,6 +258,25 @@ uart2: serial@10032000 {
status = "disabled";
};
ssi: spi@10043000 {
compatible = "ingenic,x1000-spi";
reg = <0x10043000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&intc>;
interrupts = <8>;
clocks = <&cgu X1000_CLK_SSI>;
clock-names = "spi";
dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
<&pdma X1000_DMA_SSI0_TX 0xffffffff>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c0: i2c-controller@10050000 {
compatible = "ingenic,x1000-i2c";
reg = <0x10050000 0x1000>;
......@@ -303,6 +322,7 @@ i2c2: i2c-controller@10052000 {
pdma: dma-controller@13420000 {
compatible = "ingenic,x1000-dma";
reg = <0x13420000 0x400>, <0x13421000 0x40>;
#dma-cells = <2>;
interrupt-parent = <&intc>;
......
arch/mips/boot/dts/ingenic/x1830.dtsi
View file @ 562dc4c9
......@@ -240,6 +240,44 @@ uart1: serial@10031000 {
status = "disabled";
};
ssi0: spi@10043000 {
compatible = "ingenic,x1830-spi", "ingenic,x1000-spi";
reg = <0x10043000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&intc>;
interrupts = <9>;
clocks = <&cgu X1830_CLK_SSI0>;
clock-names = "spi";
dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
<&pdma X1830_DMA_SSI0_TX 0xffffffff>;
dma-names = "rx", "tx";
status = "disabled";
};
ssi1: spi@10044000 {
compatible = "ingenic,x1830-spi", "ingenic,x1000-spi";
reg = <0x10044000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&intc>;
interrupts = <8>;
clocks = <&cgu X1830_CLK_SSI1>;
clock-names = "spi";
dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
<&pdma X1830_DMA_SSI1_TX 0xffffffff>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c0: i2c-controller@10050000 {
compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
reg = <0x10050000 0x1000>;
......@@ -294,6 +332,7 @@ dtrng: trng@10072000 {
pdma: dma-controller@13420000 {
compatible = "ingenic,x1830-dma";
reg = <0x13420000 0x400>, <0x13421000 0x40>;
#dma-cells = <2>;
interrupt-parent = <&intc>;
......
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