Commit 5709a680 authored by Garrett Giordano's avatar Garrett Giordano Committed by Nishanth Menon

arm64: dts: ti: phycore-am64: Add R5F DMA Region and Mailboxes

Communication between the R5F subsystem and Linux takes place using DMA
memory regions and mailboxes. Here we add DT nodes for the memory
regions and mailboxes to facilitate communication between the R5
clusters and Linux as remoteproc will fail to start if no memory
regions or mailboxes are provided.

Fixes: c48ac0ef ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642")
Signed-off-by: default avatarGarrett Giordano <ggiordano@phytec.com>
Reviewed-by: default avatarWadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20231204212304.1736306-1-ggiordano@phytec.comSigned-off-by: default avatarNishanth Menon <nm@ti.com>
parent b0044823
...@@ -29,7 +29,7 @@ memory@80000000 { ...@@ -29,7 +29,7 @@ memory@80000000 {
reg = <0x00000000 0x80000000 0x00000000 0x80000000>; reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
}; };
reserved-memory { reserved_memory: reserved-memory {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
...@@ -39,6 +39,54 @@ secure_ddr: optee@9e800000 { ...@@ -39,6 +39,54 @@ secure_ddr: optee@9e800000 {
alignment = <0x1000>; alignment = <0x1000>;
no-map; no-map;
}; };
main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1100000 0x00 0xf00000>;
no-map;
};
main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2000000 0x00 0x100000>;
no-map;
};
main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2100000 0x00 0xf00000>;
no-map;
};
main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3000000 0x00 0x100000>;
no-map;
};
main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
}; };
leds { leds {
...@@ -166,6 +214,34 @@ &cpsw_port2 { ...@@ -166,6 +214,34 @@ &cpsw_port2 {
status = "disabled"; status = "disabled";
}; };
&mailbox0_cluster2 {
status = "okay";
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
ti,mbox-rx = <2 0 2>;
ti,mbox-tx = <3 0 2>;
};
};
&mailbox0_cluster4 {
status = "okay";
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
ti,mbox-rx = <2 0 2>;
ti,mbox-tx = <3 0 2>;
};
};
&main_i2c0 { &main_i2c0 {
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -191,6 +267,30 @@ i2c_som_rtc: rtc@52 { ...@@ -191,6 +267,30 @@ i2c_som_rtc: rtc@52 {
}; };
}; };
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
};
&ospi0 { &ospi0 {
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
......
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