Commit 578e7264 authored by Maor Gottlieb's avatar Maor Gottlieb Committed by Doug Ledford

IB/mlx5: Fix atomic cap in indirect UMR

Remove from the driver the limitation imposed by firmware check
to not allow change of atomic permissions for indirect UMRs.
In order to avoid failures on old firmware, we only ask for change
of atomic permissions if atomic operations are supported.

Fixes: 968e78dd ('IB/mlx5: Enhance UMR support to allow partial page table update')
Signed-off-by: default avatarEli Cohen <eli@mellanox.com>
Signed-off-by: default avatarMaor Gottlieb <maorg@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 2d221588
...@@ -3071,7 +3071,7 @@ static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) ...@@ -3071,7 +3071,7 @@ static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
umr->flags = MLX5_UMR_INLINE; umr->flags = MLX5_UMR_INLINE;
} }
static __be64 get_umr_reg_mr_mask(void) static __be64 get_umr_reg_mr_mask(int atomic)
{ {
u64 result; u64 result;
...@@ -3084,9 +3084,11 @@ static __be64 get_umr_reg_mr_mask(void) ...@@ -3084,9 +3084,11 @@ static __be64 get_umr_reg_mr_mask(void)
MLX5_MKEY_MASK_KEY | MLX5_MKEY_MASK_KEY |
MLX5_MKEY_MASK_RR | MLX5_MKEY_MASK_RR |
MLX5_MKEY_MASK_RW | MLX5_MKEY_MASK_RW |
MLX5_MKEY_MASK_A |
MLX5_MKEY_MASK_FREE; MLX5_MKEY_MASK_FREE;
if (atomic)
result |= MLX5_MKEY_MASK_A;
return cpu_to_be64(result); return cpu_to_be64(result);
} }
...@@ -3147,7 +3149,7 @@ static __be64 get_umr_update_pd_mask(void) ...@@ -3147,7 +3149,7 @@ static __be64 get_umr_update_pd_mask(void)
} }
static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
struct ib_send_wr *wr) struct ib_send_wr *wr, int atomic)
{ {
struct mlx5_umr_wr *umrwr = umr_wr(wr); struct mlx5_umr_wr *umrwr = umr_wr(wr);
...@@ -3172,7 +3174,7 @@ static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, ...@@ -3172,7 +3174,7 @@ static void set_reg_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD) if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD)
umr->mkey_mask |= get_umr_update_pd_mask(); umr->mkey_mask |= get_umr_update_pd_mask();
if (!umr->mkey_mask) if (!umr->mkey_mask)
umr->mkey_mask = get_umr_reg_mr_mask(); umr->mkey_mask = get_umr_reg_mr_mask(atomic);
} else { } else {
umr->mkey_mask = get_umr_unreg_mr_mask(); umr->mkey_mask = get_umr_unreg_mr_mask();
} }
...@@ -4025,7 +4027,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, ...@@ -4025,7 +4027,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
} }
qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; qp->sq.wr_data[idx] = MLX5_IB_WR_UMR;
ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey);
set_reg_umr_segment(seg, wr); set_reg_umr_segment(seg, wr, !!(MLX5_CAP_GEN(mdev, atomic)));
seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
if (unlikely((seg == qend))) if (unlikely((seg == qend)))
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment