Commit 57b1dfbd authored by Matthew Wilcox's avatar Matthew Wilcox Committed by Linus Torvalds

[PATCH] PA-RISC updates

Some misc updates:
 - adapt our config.in changes to arch/parisc/Kconfig
 - general Makefile updaes for the new build system
 - remove asm-parisc/gsc.h in favour of asm-parisc/io.h
 - Alan-approved fix for the loff_t problem
 - Define POLLREMOVE like other architectures.
 - irq handling updates from Grant Grundler
parent 9dbad95a
This diff is collapsed.
......@@ -80,7 +80,6 @@ core-y += arch/parisc/kernel/pdc_cons.o \
arch/parisc/kernel/init_task.o
libs-y += arch/parisc/lib/ \
`$(CC) -print-libgcc-file-name`
drivers-$(CONFIG_MATH_EMULATION) += arch/parisc/math-emu/
palo: vmlinux
@if [ $$(palo -f /dev/null >/dev/null 2>&1 ; echo $$?) != 2 ]; then \
......
#
# Makefile for the linux kernel.
# Makefile for arch/parisc/kernel
#
ifdef CONFIG_PARISC64
......@@ -27,5 +27,3 @@ obj-$(CONFIG_PARISC64) += binfmt_elf32.o sys_parisc32.o \
ioctl32.o signal32.o
# only supported for PCX-W/U in 64-bit mode at the moment
obj-$(CONFIG_PARISC64) += perf.o perf_asm.o
include $(TOPDIR)/Rules.make
......@@ -35,6 +35,7 @@ int main(void)
DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
DEFINE(TASK_MM, offsetof(struct task_struct, mm));
DEFINE(TASK_PERSONALITY, offsetof(struct task_struct, personality));
DEFINE(TASK_PID, offsetof(struct task_struct, pid));
BLANK();
DEFINE(TASK_REGS, offsetof(struct task_struct, thread.regs));
DEFINE(TASK_PT_PSW, offsetof(struct task_struct, thread.regs.gr[ 0]));
......
......@@ -23,7 +23,6 @@
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/pdc.h>
#include <asm/gsc.h>
/* See comments in include/asm-parisc/pci.h */
struct pci_dma_ops *hppa_dma_ops;
......
......@@ -502,7 +502,6 @@ fault_vector_11:
.import handle_real_interruption,code
.import do_cpu_irq_mask,code
.import parisc_stopkernel,code
.import cpu_irq_region,data
/*
* r26 = function to be called
......@@ -528,23 +527,28 @@ __kernel_thread:
ldd 24(%r26), %r2
STREG %r2, PT_GR27(%r1) /* Store childs %dp */
ldd 16(%r26), %r26
STREG %r22, PT_GR22(%r1) /* Store childs %dp */
copy %r0, %r22 /* user_tid */
#endif
STREG %r26, PT_GR26(%r1) /* Store function & argument for child */
STREG %r25, PT_GR25(%r1)
ldo CLONE_VM(%r0), %r26 /* Force CLONE_VM since only init_mm */
or %r26, %r24, %r26 /* will have kernel mappings. */
copy %r0, %r25
copy %r0, %r25 /* stack_start */
stw %r0, -52(%r30) /* user_tid */
#ifdef __LP64__
ldo -16(%r30),%r29 /* Reference param save area */
#endif
bl do_fork, %r2
copy %r1, %r24
copy %r1, %r24 /* pt_regs */
/* Parent Returns here */
LDREG -PT_SZ_ALGN-RP_OFFSET(%r30), %r2
bv %r0(%r2)
ldo -PT_SZ_ALGN(%r30), %r30
bv %r0(%r2)
ldw TASK_PID(%r28), %r28
/*
* Child Returns here
......@@ -566,6 +570,7 @@ ret_from_kernel_thread:
LDREG TASK_PT_GR25(%r1), %r26
#ifdef __LP64__
LDREG TASK_PT_GR27(%r1), %r27
LDREG TASK_PT_GR22(%r1), %r22
#endif
LDREG TASK_PT_GR26(%r1), %r1
ble 0(%sr7, %r1)
......@@ -796,9 +801,9 @@ intr_do_resched:
ldo -16(%r30),%r29 /* Reference param save area */
#endif
ldil L%intr_return, %r2
ldil L%intr_check_sig, %r2
b schedule
ldo R%intr_return(%r2), %r2 /* return to intr_return, not here */
ldo R%intr_check_sig(%r2), %r2
.import do_signal,code
......@@ -813,11 +818,12 @@ intr_do_signal:
copy %r0, %r24 /* unsigned long in_syscall */
copy %r16, %r25 /* struct pt_regs *regs */
ssm PSW_SM_I, %r0
#ifdef __LP64__
ldo -16(%r30),%r29 /* Reference param save area */
#endif
#warning TAUSQ FIXME, this is wrong
#warning TAUSQ FIXME - review 2.5 signal return path changes
bl do_signal,%r2
copy %r0, %r26 /* sigset_t *oldset = NULL */
......@@ -860,26 +866,19 @@ intr_extint:
loadgp
copy %r29, %r25 /* arg1 is pt_regs */
copy %r29, %r26 /* arg0 is pt_regs */
copy %r29, %r16 /* save pt_regs */
ldil L%intr_return, %r2
#ifdef __LP64__
ldo -16(%r30),%r29 /* Reference param save area */
#else
nop
#endif
/*
* We need to either load the CPU's ID or IRQ region.
* Until we have "per CPU" IRQ regions, this is easy.
*/
ldil L%cpu_irq_region, %r26
ldil L%intr_return, %r2
ldo R%cpu_irq_region(%r26), %r26
b do_cpu_irq_mask
ldo R%intr_return(%r2), %r2 /* return to intr_return, not here */
/* Generic interruptions (illegal insn, unaligned, page fault, etc) */
.export intr_save, code /* for os_hpmc */
......@@ -953,11 +952,11 @@ skip_save_ior:
ldo -16(%r30),%r29 /* Reference param save area */
#endif
ldil L%intr_return, %r2
ldil L%intr_restore, %r2
copy %r25, %r16 /* save pt_regs */
b handle_interruption
ldo R%intr_return(%r2), %r2 /* return to intr_return */
ldo R%intr_restore(%r2), %r2
/*
......
......@@ -403,7 +403,7 @@ static struct hp_hardware hp_hardware_list[] __initdata = {
{HPHW_BA, 0x01B, 0x00078, 0x0, "Anole 100 VME BA"},
{HPHW_BA, 0x024, 0x00078, 0x0, "Fast Pace VME BA"},
{HPHW_BA, 0x034, 0x00078, 0x0, "Anole T VME BA"},
{HPHW_BA, 0x04A, 0x00078, 0x0, "Anole L2 132 BME BA"},
{HPHW_BA, 0x04A, 0x00078, 0x0, "Anole L2 132 VME BA"},
{HPHW_BA, 0x04C, 0x00078, 0x0, "Anole L2 165 VME BA"},
{HPHW_BA, 0x011, 0x00081, 0x0, "WB-96 Core BA"},
{HPHW_BA, 0x012, 0x00081, 0x0, "Orville UX Core BA"},
......@@ -805,8 +805,8 @@ static struct hp_hardware hp_hardware_list[] __initdata = {
{HPHW_FIO, 0x04E, 0x0007B, 0x0, "Kiji L2 132 Core Audio"},
{HPHW_FIO, 0x050, 0x0007B, 0x0, "Merlin Jr 132 Core Audio"},
{HPHW_FIO, 0x051, 0x0007B, 0x0, "Firehawk Audio"},
{HPHW_FIO, 0x056, 0x0007B, 0x0, "Raven+ w SE FWSCSU Core Audio"},
{HPHW_FIO, 0x057, 0x0007B, 0x0, "Raven+ w Diff FWSCSU Core Audio"},
{HPHW_FIO, 0x056, 0x0007B, 0x0, "Raven+ w SE FWSCSI Core Audio"},
{HPHW_FIO, 0x057, 0x0007B, 0x0, "Raven+ w Diff FWSCSI Core Audio"},
{HPHW_FIO, 0x058, 0x0007B, 0x0, "FireHawk 200 Audio"},
{HPHW_FIO, 0x05C, 0x0007B, 0x0, "SummitHawk 230 Core Audio"},
{HPHW_FIO, 0x800, 0x0007B, 0x0, "Hitachi Tiny 64 Audio"},
......
......@@ -57,7 +57,7 @@ extern void ipi_interrupt(int, void *, struct pt_regs *);
/* Bits in EIEM correlate with cpu_irq_action[].
** Numbered *Big Endian*! (ie bit 0 is MSB)
*/
static unsigned long cpu_eiem = 0;
static volatile unsigned long cpu_eiem = 0;
static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; /* protect IRQ regions */
......@@ -104,24 +104,35 @@ static inline void unmask_cpu_irq(void *unused, int irq)
set_eiem(cpu_eiem);
}
static struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
/*
* XXX cpu_irq_actions[] will become 2 dimensional for per CPU EIR support.
* correspond changes needed in:
* processor_probe() initialize additional action arrays
* request_irq() handle CPU IRQ region specially
* do_cpu_irq_mask() index into the matching irq_action array.
*/
struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
[IRQ_OFFSET(TIMER_IRQ)] { handler: timer_interrupt, name: "timer", },
#ifdef CONFIG_SMP
[IRQ_OFFSET(IPI_IRQ)] { handler: ipi_interrupt, name: "IPI", },
#endif
};
struct irq_region cpu_irq_region = {
struct irq_region_ops cpu_irq_ops = {
disable_cpu_irq, enable_cpu_irq, unmask_cpu_irq, unmask_cpu_irq
};
struct irq_region cpu0_irq_region = {
ops: { disable_cpu_irq, enable_cpu_irq, unmask_cpu_irq, unmask_cpu_irq },
data: { dev: &cpu_data[0],
name: "PA-CPU-00",
name: "PARISC-CPU",
irqbase: IRQ_FROM_REGION(CPU_IRQ_REGION), },
action: cpu_irq_actions,
};
struct irq_region *irq_region[NR_IRQ_REGS] = {
[ 0 ] NULL, /* reserved for EISA, else causes data page fault (aka code 15) */
[ CPU_IRQ_REGION ] &cpu_irq_region,
[ CPU_IRQ_REGION ] &cpu0_irq_region,
};
......@@ -192,10 +203,10 @@ int show_interrupts(struct seq_file *p, void *v)
unsigned int regnr = 0;
seq_puts(p, " ");
#if 0 /* def CONFIG_SMP */
for (; regnr < smp_num_cpus; regnr++)
#ifdef CONFIG_SMP
for (regnr = 0; regnr < NR_CPUS; regnr++)
#endif
seq_printf(p, " CPU%d ", regnr);
seq_printf(p, " CPU%02d ", regnr);
#ifdef PARISC_IRQ_CR16_COUNTS
seq_printf(p, "[min/avg/max] (CPU cycle counts)");
......@@ -216,24 +227,16 @@ int show_interrupts(struct seq_file *p, void *v)
for (i = 0; i <= MAX_CPU_IRQ; i++) {
struct irqaction *action = &region->action[i];
unsigned int irq_no = IRQ_FROM_REGION(regnr) + i;
#if 0 /* def CONFIG_SMP */
/* We currently direct all Interrupts at the Monarch.
* The right way to handle SMP IRQ stats is to have one IRQ region/CPU.
*/
unsigned int j;
#endif
int j=0;
if (!action->handler)
continue;
seq_printf(p, "%3d: ", irq_no);
#if 1 /* ndef CONFIG_SMP */
seq_printf(p, "%10u ", kstat_irqs(irq_no));
#else
for (j = 0; j < smp_num_cpus; j++)
seq_printf(p, "%10u ",
kstat.irqs[cpu_logical_map(j)][irq_no]);
#ifdef CONFIG_SMP
for (; j < NR_CPUS; j++)
#endif
seq_printf(p, "%10u ", kstat.irqs[j][regnr][irq_no]);
seq_printf(p, " %14s",
region->data.name ? region->data.name : "N/A");
#ifndef PARISC_IRQ_CR16_COUNTS
......@@ -243,12 +246,12 @@ int show_interrupts(struct seq_file *p, void *v)
seq_printf(p, ", %s", action->name);
#else
for ( ;action; action = action->next) {
unsigned int i, avg, min, max;
unsigned int k, avg, min, max;
min = max = action->cr16_hist[0];
for (avg = i = 0; i < PARISC_CR16_HIST_SIZE; i++) {
int hist = action->cr16_hist[i];
for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
int hist = action->cr16_hist[k];
if (hist) {
avg += hist;
......@@ -259,7 +262,7 @@ int show_interrupts(struct seq_file *p, void *v)
if (hist < min) min = hist;
}
avg /= i;
avg /= k;
seq_printf(p, " %s[%d/%d/%d]", action->name,
min,avg,max);
}
......@@ -292,7 +295,7 @@ txn_alloc_irq(void)
/* never return irq 0 cause that's the interval timer */
for (irq = 1; irq <= MAX_CPU_IRQ; irq++) {
if (cpu_irq_region.action[irq].handler == NULL) {
if (cpu_irq_actions[irq].handler == NULL) {
return (IRQ_FROM_REGION(CPU_IRQ_REGION) + irq);
}
}
......@@ -314,14 +317,18 @@ txn_claim_irq(int irq)
unsigned long
txn_alloc_addr(int virt_irq)
{
struct cpuinfo_parisc *dev = (struct cpuinfo_parisc *) (irq_region[IRQ_REGION(virt_irq)]->data.dev);
static int next_cpu = -1;
if (!dev) {
printk(KERN_ERR "txn_alloc_addr(0x%x): CPU IRQ region? dev %p\n",
virt_irq,dev);
return 0;
}
return (dev->txn_addr);
next_cpu++; /* assign to "next" CPU we want this bugger on */
/* validate entry */
while ((next_cpu < NR_CPUS) && !cpu_data[next_cpu].txn_addr)
next_cpu++;
if (next_cpu >= NR_CPUS)
next_cpu = 0; /* nothing else, assign monarch */
return cpu_data[next_cpu].txn_addr;
}
......@@ -365,7 +372,7 @@ void do_irq(struct irqaction *action, int irq, struct pt_regs * regs)
int cpu = smp_processor_id();
irq_enter();
++kstat.irqs[IRQ_REGION(irq)][IRQ_OFFSET(irq)];
++kstat.irqs[cpu][IRQ_REGION(irq)][IRQ_OFFSET(irq)];
DBG_IRQ(irq, ("do_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq)));
......@@ -407,7 +414,7 @@ void do_irq(struct irqaction *action, int irq, struct pt_regs * regs)
/* ONLY called from entry.S:intr_extint() */
void do_cpu_irq_mask(struct irq_region *region, struct pt_regs *regs)
void do_cpu_irq_mask(struct pt_regs *regs)
{
unsigned long eirr_val;
unsigned int i=3; /* limit time in interrupt context */
......@@ -431,7 +438,7 @@ void do_cpu_irq_mask(struct irq_region *region, struct pt_regs *regs)
*/
while ((eirr_val = (mfctl(23) & cpu_eiem)) && --i) {
unsigned long bit = (1UL<<MAX_CPU_IRQ);
unsigned int irq = 0;
unsigned int irq;
mtctl(eirr_val, 23); /* reset bits we are going to process */
......@@ -440,17 +447,16 @@ void do_cpu_irq_mask(struct irq_region *region, struct pt_regs *regs)
printk(KERN_DEBUG "do_cpu_irq_mask %x\n", eirr_val);
#endif
for (; eirr_val && bit; bit>>=1, irq++)
/* Work our way from MSb to LSb...same order we alloc EIRs */
for (irq = 0; eirr_val && bit; bit>>=1, irq++)
{
unsigned int irq_num;
if (!(bit&eirr_val))
if (!(bit & eirr_val & cpu_eiem))
continue;
/* clear bit in mask - can exit loop sooner */
eirr_val &= ~bit;
irq_num = region->data.irqbase + irq;
do_irq(&region->action[irq], irq_num, regs);
do_irq(&cpu_irq_actions[irq], TIMER_IRQ+irq, regs);
}
}
set_eiem(cpu_eiem);
......@@ -675,6 +681,14 @@ void free_irq(unsigned int irq, void *dev_id)
}
#ifdef CONFIG_SMP
void synchronize_irq(unsigned int irqnum)
{
while (in_irq()) ;
}
#endif
/*
* IRQ autodetection code..
*
......
......@@ -7,7 +7,7 @@
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/kernel.h>
#include <asm/gsc.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <asm/machdep.h>
......
......@@ -79,13 +79,9 @@ extern int $global$;
EXPORT_SYMBOL_NOVERS($global$);
#endif
#include <asm/gsc.h>
EXPORT_SYMBOL(register_parisc_driver);
EXPORT_SYMBOL(unregister_parisc_driver);
EXPORT_SYMBOL(pdc_iodc_read);
#ifdef CONFIG_GSC
EXPORT_SYMBOL(gsc_alloc_irq);
#endif
#include <asm/io.h>
EXPORT_SYMBOL(__ioremap);
......
......@@ -49,11 +49,11 @@
#include <linux/miscdevice.h>
#include <linux/spinlock.h>
#include <asm/gsc.h>
#include <asm/uaccess.h>
#include <asm/perf.h>
#include <asm/processor.h>
#include <asm/runway.h>
#include <asm/io.h> /* for __raw_read() */
#include "perf_images.h"
......
......@@ -35,7 +35,6 @@
#include <asm/pgalloc.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/gsc.h>
#include <asm/processor.h>
#include <asm/pdc_chassis.h>
......
......@@ -167,12 +167,24 @@ static int __init processor_probe(struct parisc_device *dev)
** p->state = STATE_RENDEZVOUS;
*/
#if 0
/* CPU 0 IRQ table is statically allocated/initialized */
if (cpuid) {
struct irqaction actions[];
/*
** itimer and ipi IRQ handlers are statically initialized in
** arch/parisc/kernel/irq.c. ie Don't need to register them.
*/
p->region = irq_region[IRQ_FROM_REGION(CPU_IRQ_REGION)];
actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
if (!actions) {
/* not getting it's own table, share with monarch */
actions = cpu_irq_actions[0];
}
cpu_irq_actions[cpuid] = actions;
}
#endif
return 0;
}
......
......@@ -15,6 +15,7 @@
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/personality.h>
#include <linux/security.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
......@@ -101,6 +102,11 @@ long sys_ptrace(long request, pid_t pid, long addr, long data)
/* are we already being traced? */
if (current->ptrace & PT_PTRACED)
goto out;
ret = security_ops->ptrace(current->parent, current);
if (ret)
goto out;
/* set the ptrace bit in the process flags. */
current->ptrace |= PT_PTRACED;
ret = 0;
......
......@@ -143,10 +143,8 @@ void __init setup_arch(char **cmdline_p)
dma_ops_init();
#endif
#ifdef CONFIG_VT
# if defined(CONFIG_STI_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con; /* we use take_over_console() later ! */
# endif
#endif
}
......
......@@ -147,6 +147,40 @@ long sys_shmat_wrapper(int shmid, char *shmaddr, int shmflag)
}
/* Fucking broken ABI */
extern asmlinkage long sys_truncate64(const char *, loff_t);
extern asmlinkage long sys_ftruncate64(unsigned int, loff_t);
extern asmlinkage ssize_t sys_pread64(unsigned int fd, char *buf,
size_t count, loff_t pos);
extern asmlinkage ssize_t sys_pwrite64(unsigned int fd, const char *buf,
size_t count, loff_t pos);
asmlinkage long parisc_truncate64(const char * path,
unsigned int high, unsigned int low)
{
return sys_truncate(path, (loff_t)high << 32 | low);
}
asmlinkage long parisc_ftruncate64(unsigned int fd,
unsigned int high, unsigned int low)
{
return sys_ftruncate(fd, (loff_t)high << 32 | low);
}
asmlinkage ssize_t parisc_pread64(unsigned int fd, char *buf, size_t count,
unsigned int high, unsigned int low)
{
return sys_pread64(fd, buf, count, (loff_t)high << 32 | low);
}
asmlinkage ssize_t parisc_pwrite64(unsigned int fd, const char *buf,
size_t count, unsigned int high, unsigned int low)
{
return sys_pwrite64(fd, buf, count, (loff_t)high << 32 | low);
}
/*
* FIXME, please remove this crap as soon as possible
*
......
......@@ -2743,20 +2743,8 @@ asmlinkage long sys32_msgrcv(int msqid,
/* LFS */
extern asmlinkage long sys_truncate(const char *, loff_t);
extern asmlinkage long sys_ftruncate(unsigned int, loff_t);
extern asmlinkage long sys_fcntl(unsigned int, unsigned int, unsigned long);
asmlinkage long sys32_truncate64(const char * path, unsigned int high, unsigned int low)
{
return sys_truncate(path, (loff_t)high << 32 | low);
}
asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned int high, unsigned int low)
{
return sys_ftruncate(fd, (loff_t)high << 32 | low);
}
asmlinkage long sys32_fcntl64(unsigned int fd, unsigned int cmd, unsigned long arg)
{
switch (cmd) {
......
......@@ -331,10 +331,12 @@ tracesys_sigexit:
#define ENTRY_SAME(_name_) .dword sys_##_name_
#define ENTRY_DIFF(_name_) .dword sys32_##_name_
#define ENTRY_UHOH(_name_) .dword sys32_##unimplemented
#define ENTRY_OURS(_name_) .dword parisc_##_name_
#else
#define ENTRY_SAME(_name_) .word sys_##_name_
#define ENTRY_DIFF(_name_) .word sys_##_name_
#define ENTRY_UHOH(_name_) .word sys_##_name_
#define ENTRY_OURS(_name_) .word parisc_##_name_
#endif
.align 8
......@@ -476,8 +478,8 @@ sys_call_table:
ENTRY_DIFF(getitimer) /* 105 */
ENTRY_SAME(capget)
ENTRY_SAME(capset)
ENTRY_SAME(pread64)
ENTRY_SAME(pwrite64)
ENTRY_OURS(pread64)
ENTRY_OURS(pwrite64)
ENTRY_SAME(getcwd) /* 110 */
ENTRY_SAME(vhangup)
ENTRY_SAME(fstat64)
......@@ -596,8 +598,8 @@ sys_call_table:
ENTRY_SAME(ni_syscall) /* streams1 */
ENTRY_SAME(ni_syscall) /* streams2 */
ENTRY_SAME(lstat64)
ENTRY_DIFF(truncate64)
ENTRY_DIFF(ftruncate64) /* 200 */
ENTRY_OURS(truncate64)
ENTRY_OURS(ftruncate64) /* 200 */
ENTRY_SAME(getdents64)
ENTRY_DIFF(fcntl64)
#ifdef CONFIG_XFS_FS
......
#
# Makefile for parisc-specific library files..
# Makefile for parisc-specific library files
#
L_TARGET = lib.a
obj-y := lusercopy.o bitops.o checksum.o io.o memset.o
include $(TOPDIR)/Rules.make
#
# Makefile for the linux/parisc floating point code
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definition is now in the main makefile...
obj-y := frnd.o driver.o decode_exc.o fpudispatch.o denormal.o \
dfmpy.o sfmpy.o sfsqrt.o dfsqrt.o dfadd.o fmpyfadd.o \
......@@ -16,6 +11,4 @@ obj-y := frnd.o driver.o decode_exc.o fpudispatch.o denormal.o \
# Math emulation code beyond the FRND is required for 712/80i and
# other very old or stripped-down PA-RISC CPUs -- not currently supported
obj-$CONFIG_MATH_EMULATION += unimplemented-math-emulation.o
include $(TOPDIR)/Rules.make
obj-$(CONFIG_MATH_EMULATION) += unimplemented-math-emulation.o
#
# Makefile for the linux parisc-specific parts of the memory manager.
# Makefile for arch/parisc/mm
#
obj-y := init.o fault.o extable.o ioremap.o
include $(TOPDIR)/Rules.make
......@@ -93,7 +93,6 @@
#include <asm/irq.h>
#include <asm/pdc.h>
#include <asm/gsc.h>
#include <asm/cache.h>
static char version[] __devinitdata =
......
/* $Id: dma.h,v 1.1 2002/07/20 15:52:25 rhirst Exp $
/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
* linux/include/asm/dma.h: Defines for using and allocating dma channels.
* Written by Hennus Bergman, 1992.
* High DMA channel support & info by Hannu Savolainen
......@@ -177,11 +177,7 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
}
/* These are in kernel/dma.c: */
extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
extern void free_dma(unsigned int dmanr); /* release it again */
extern int get_dma_list(char *buf); /* proc/dma support */
#define free_dma(dmanr)
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
......
#ifndef ASM_PARISC_GSC_H
#define ASM_PARISC_GSC_H
#ifdef __KERNEL__
#include <linux/types.h>
#include <asm/io.h> /* temporary for __raw_{read,write} */
/* Please, call ioremap and use {read,write}[bwl] instead. These functions
* are not very fast.
*/
#define gsc_readb(x) __raw_readb((unsigned long)x)
#define gsc_readw(x) __raw_readw((unsigned long)x)
#define gsc_readl(x) __raw_readl((unsigned long)x)
#define gsc_writeb(x, y) __raw_writeb(x, (unsigned long)y)
#define gsc_writew(x, y) __raw_writew(x, (unsigned long)y)
#define gsc_writel(x, y) __raw_writel(x, (unsigned long)y)
struct gsc_irq {
unsigned long txn_addr; /* IRQ "target" */
int txn_data; /* HW "IRQ" */
int irq; /* virtual IRQ */
};
/* PA I/O Architected devices support at least 5 bits in the EIM register. */
#define GSC_EIM_WIDTH 5
extern int gsc_alloc_irq(struct gsc_irq *dev); /* dev needs an irq */
extern int gsc_claim_irq(struct gsc_irq *dev, int irq); /* dev needs this irq */
#endif /* __KERNEL__ */
#endif /* LINUX_GSC_H */
......@@ -182,6 +182,18 @@ extern void memset_io(unsigned long dest, char fill, int count);
#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a), EISA_BASE | (b), (c))
#define isa_memcpy_toio(a,b,c) memcpy_toio(EISA_BASE | (a), (b), (c))
/*
* These functions support PA-RISC drivers which don't yet call ioremap().
* They will disappear once the last of these drivers is gone.
*/
#define gsc_readb(x) __raw_readb((unsigned long)x)
#define gsc_readw(x) __raw_readw((unsigned long)x)
#define gsc_readl(x) __raw_readl((unsigned long)x)
#define gsc_writeb(x, y) __raw_writeb(x, (unsigned long)y)
#define gsc_writew(x, y) __raw_writew(x, (unsigned long)y)
#define gsc_writel(x, y) __raw_writel(x, (unsigned long)y)
/*
* XXX - We don't have csum_partial_copy_fromio() yet, so we cheat here and
* just copy it. The net code will then do the checksum later. Presently
......
......@@ -15,6 +15,7 @@
#define POLLWRNORM 0x0100
#define POLLWRBAND 0x0200
#define POLLMSG 0x0400
#define POLLREMOVE 0x1000
struct pollfd {
int fd;
......
......@@ -73,10 +73,8 @@ struct system_cpuinfo_parisc {
** Per CPU data structure - ie varies per CPU.
*/
struct cpuinfo_parisc {
struct irq_region *region;
unsigned long it_value; /* Interval Timer value at last timer Intr */
unsigned long it_delta; /* Interval Timer delta (tic_10ms / HZ * 100) */
unsigned long it_value; /* Interval Timer at last timer Intr */
unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
unsigned long irq_count; /* number of IRQ's since boot */
unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
......
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