Commit 5a72df3a authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Make all clock checks non-fuzzy

Now that we backfeed the actual DPLL frequency into the
compute crtc state all our clocks should come out exact.
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-11-ville.syrjala@linux.intel.com
parent 27d06077
...@@ -5674,16 +5674,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, ...@@ -5674,16 +5674,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
} \ } \
} while (0) } while (0)
#define PIPE_CONF_CHECK_CLOCK_FUZZY(name) do { \
if (!intel_fuzzy_clock_check(current_config->name, pipe_config->name)) { \
pipe_config_mismatch(fastset, crtc, __stringify(name), \
"(expected %i, found %i)", \
current_config->name, \
pipe_config->name); \
ret = false; \
} \
} while (0)
#define PIPE_CONF_CHECK_INFOFRAME(name) do { \ #define PIPE_CONF_CHECK_INFOFRAME(name) do { \
if (!intel_compare_infoframe(&current_config->infoframes.name, \ if (!intel_compare_infoframe(&current_config->infoframes.name, \
&pipe_config->infoframes.name)) { \ &pipe_config->infoframes.name)) { \
...@@ -5802,7 +5792,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, ...@@ -5802,7 +5792,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_RECT(pch_pfit.dst); PIPE_CONF_CHECK_RECT(pch_pfit.dst);
PIPE_CONF_CHECK_I(scaler_state.scaler_id); PIPE_CONF_CHECK_I(scaler_state.scaler_id);
PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate); PIPE_CONF_CHECK_I(pixel_rate);
PIPE_CONF_CHECK_X(gamma_mode); PIPE_CONF_CHECK_X(gamma_mode);
if (IS_CHERRYVIEW(dev_priv)) if (IS_CHERRYVIEW(dev_priv))
...@@ -5872,9 +5862,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, ...@@ -5872,9 +5862,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
PIPE_CONF_CHECK_I(pipe_bpp); PIPE_CONF_CHECK_I(pipe_bpp);
PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock); PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);
PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock); PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock);
PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); PIPE_CONF_CHECK_I(port_clock);
PIPE_CONF_CHECK_I(min_voltage_level); PIPE_CONF_CHECK_I(min_voltage_level);
...@@ -5916,7 +5906,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, ...@@ -5916,7 +5906,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
#undef PIPE_CONF_CHECK_BOOL_INCOMPLETE #undef PIPE_CONF_CHECK_BOOL_INCOMPLETE
#undef PIPE_CONF_CHECK_P #undef PIPE_CONF_CHECK_P
#undef PIPE_CONF_CHECK_FLAGS #undef PIPE_CONF_CHECK_FLAGS
#undef PIPE_CONF_CHECK_CLOCK_FUZZY
#undef PIPE_CONF_CHECK_COLOR_LUT #undef PIPE_CONF_CHECK_COLOR_LUT
#undef PIPE_CONF_CHECK_TIMINGS #undef PIPE_CONF_CHECK_TIMINGS
#undef PIPE_CONF_CHECK_RECT #undef PIPE_CONF_CHECK_RECT
......
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