Commit 5ba092ed authored by Andy Shevchenko's avatar Andy Shevchenko

pinctrl: cannonlake: Use generic flag for special GPIO base treatment

Since we have a generic flag for special GPIO base treatment,
use it in the driver.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
parent e5a4ab6a
...@@ -30,8 +30,6 @@ ...@@ -30,8 +30,6 @@
.gpio_base = (g), \ .gpio_base = (g), \
} }
#define CNL_NO_GPIO -1
#define CNL_COMMUNITY(b, s, e, o, g) \ #define CNL_COMMUNITY(b, s, e, o, g) \
{ \ { \
.barno = (b), \ .barno = (b), \
...@@ -380,9 +378,9 @@ static const struct intel_padgroup cnlh_community1_gpps[] = { ...@@ -380,9 +378,9 @@ static const struct intel_padgroup cnlh_community1_gpps[] = {
CNL_GPP(0, 51, 74, 64), /* GPP_C */ CNL_GPP(0, 51, 74, 64), /* GPP_C */
CNL_GPP(1, 75, 98, 96), /* GPP_D */ CNL_GPP(1, 75, 98, 96), /* GPP_D */
CNL_GPP(2, 99, 106, 128), /* GPP_G */ CNL_GPP(2, 99, 106, 128), /* GPP_G */
CNL_GPP(3, 107, 114, CNL_NO_GPIO), /* AZA */ CNL_GPP(3, 107, 114, INTEL_GPIO_BASE_NOMAP), /* AZA */
CNL_GPP(4, 115, 146, 160), /* vGPIO_0 */ CNL_GPP(4, 115, 146, 160), /* vGPIO_0 */
CNL_GPP(5, 147, 154, CNL_NO_GPIO), /* vGPIO_1 */ CNL_GPP(5, 147, 154, INTEL_GPIO_BASE_NOMAP), /* vGPIO_1 */
}; };
static const struct intel_padgroup cnlh_community3_gpps[] = { static const struct intel_padgroup cnlh_community3_gpps[] = {
...@@ -390,12 +388,12 @@ static const struct intel_padgroup cnlh_community3_gpps[] = { ...@@ -390,12 +388,12 @@ static const struct intel_padgroup cnlh_community3_gpps[] = {
CNL_GPP(1, 179, 202, 224), /* GPP_H */ CNL_GPP(1, 179, 202, 224), /* GPP_H */
CNL_GPP(2, 203, 215, 256), /* GPP_E */ CNL_GPP(2, 203, 215, 256), /* GPP_E */
CNL_GPP(3, 216, 239, 288), /* GPP_F */ CNL_GPP(3, 216, 239, 288), /* GPP_F */
CNL_GPP(4, 240, 248, CNL_NO_GPIO), /* SPI */ CNL_GPP(4, 240, 248, INTEL_GPIO_BASE_NOMAP), /* SPI */
}; };
static const struct intel_padgroup cnlh_community4_gpps[] = { static const struct intel_padgroup cnlh_community4_gpps[] = {
CNL_GPP(0, 249, 259, CNL_NO_GPIO), /* CPU */ CNL_GPP(0, 249, 259, INTEL_GPIO_BASE_NOMAP), /* CPU */
CNL_GPP(1, 260, 268, CNL_NO_GPIO), /* JTAG */ CNL_GPP(1, 260, 268, INTEL_GPIO_BASE_NOMAP), /* JTAG */
CNL_GPP(2, 269, 286, 320), /* GPP_I */ CNL_GPP(2, 269, 286, 320), /* GPP_I */
CNL_GPP(3, 287, 298, 352), /* GPP_J */ CNL_GPP(3, 287, 298, 352), /* GPP_J */
}; };
...@@ -793,7 +791,7 @@ static const struct intel_padgroup cnllp_community0_gpps[] = { ...@@ -793,7 +791,7 @@ static const struct intel_padgroup cnllp_community0_gpps[] = {
CNL_GPP(0, 0, 24, 0), /* GPP_A */ CNL_GPP(0, 0, 24, 0), /* GPP_A */
CNL_GPP(1, 25, 50, 32), /* GPP_B */ CNL_GPP(1, 25, 50, 32), /* GPP_B */
CNL_GPP(2, 51, 58, 64), /* GPP_G */ CNL_GPP(2, 51, 58, 64), /* GPP_G */
CNL_GPP(3, 59, 67, CNL_NO_GPIO), /* SPI */ CNL_GPP(3, 59, 67, INTEL_GPIO_BASE_NOMAP), /* SPI */
}; };
static const struct intel_padgroup cnllp_community1_gpps[] = { static const struct intel_padgroup cnllp_community1_gpps[] = {
...@@ -807,8 +805,8 @@ static const struct intel_padgroup cnllp_community1_gpps[] = { ...@@ -807,8 +805,8 @@ static const struct intel_padgroup cnllp_community1_gpps[] = {
static const struct intel_padgroup cnllp_community4_gpps[] = { static const struct intel_padgroup cnllp_community4_gpps[] = {
CNL_GPP(0, 181, 204, 256), /* GPP_C */ CNL_GPP(0, 181, 204, 256), /* GPP_C */
CNL_GPP(1, 205, 228, 288), /* GPP_E */ CNL_GPP(1, 205, 228, 288), /* GPP_E */
CNL_GPP(2, 229, 237, CNL_NO_GPIO), /* JTAG */ CNL_GPP(2, 229, 237, INTEL_GPIO_BASE_NOMAP), /* JTAG */
CNL_GPP(3, 238, 243, CNL_NO_GPIO), /* HVCMOS */ CNL_GPP(3, 238, 243, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */
}; };
static const struct intel_community cnllp_communities[] = { static const struct intel_community cnllp_communities[] = {
......
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