Commit 5ce4d219 authored by Alexander Viro's avatar Alexander Viro Committed by Linus Torvalds

[PATCH] sparc64 missing volatile in io.h prototypes

	A bunch of places passes volatile pointers to readb() et.al.;
sparc64 has their arguments declared as void __iomem *.  Prototypes
changed to match other platforms.
Signed-off-by: default avatarAl Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 91f725b8
...@@ -114,7 +114,7 @@ extern void insl(void __iomem *addr, void *dst, unsigned long count); ...@@ -114,7 +114,7 @@ extern void insl(void __iomem *addr, void *dst, unsigned long count);
#define iowrite32_rep(a,s,c) outsl(a,s,c) #define iowrite32_rep(a,s,c) outsl(a,s,c)
/* Memory functions, same as I/O accesses on Ultra. */ /* Memory functions, same as I/O accesses on Ultra. */
static inline u8 _readb(void __iomem *addr) static inline u8 _readb(volatile void __iomem *addr)
{ u8 ret; { u8 ret;
__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
...@@ -123,7 +123,7 @@ static inline u8 _readb(void __iomem *addr) ...@@ -123,7 +123,7 @@ static inline u8 _readb(void __iomem *addr)
return ret; return ret;
} }
static inline u16 _readw(void __iomem *addr) static inline u16 _readw(volatile void __iomem *addr)
{ u16 ret; { u16 ret;
__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
...@@ -133,7 +133,7 @@ static inline u16 _readw(void __iomem *addr) ...@@ -133,7 +133,7 @@ static inline u16 _readw(void __iomem *addr)
return ret; return ret;
} }
static inline u32 _readl(void __iomem *addr) static inline u32 _readl(volatile void __iomem *addr)
{ u32 ret; { u32 ret;
__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
...@@ -143,7 +143,7 @@ static inline u32 _readl(void __iomem *addr) ...@@ -143,7 +143,7 @@ static inline u32 _readl(void __iomem *addr)
return ret; return ret;
} }
static inline u64 _readq(void __iomem *addr) static inline u64 _readq(volatile void __iomem *addr)
{ u64 ret; { u64 ret;
__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
...@@ -153,28 +153,28 @@ static inline u64 _readq(void __iomem *addr) ...@@ -153,28 +153,28 @@ static inline u64 _readq(void __iomem *addr)
return ret; return ret;
} }
static inline void _writeb(u8 b, void __iomem *addr) static inline void _writeb(u8 b, volatile void __iomem *addr)
{ {
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
: /* no outputs */ : /* no outputs */
: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
} }
static inline void _writew(u16 w, void __iomem *addr) static inline void _writew(u16 w, volatile void __iomem *addr)
{ {
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
: /* no outputs */ : /* no outputs */
: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
} }
static inline void _writel(u32 l, void __iomem *addr) static inline void _writel(u32 l, volatile void __iomem *addr)
{ {
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
: /* no outputs */ : /* no outputs */
: "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)); : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
} }
static inline void _writeq(u64 q, void __iomem *addr) static inline void _writeq(u64 q, volatile void __iomem *addr)
{ {
__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
: /* no outputs */ : /* no outputs */
......
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