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Kirill Smelkov
linux
Commits
5ce8015d
Commit
5ce8015d
authored
Apr 30, 2002
by
John Kim
Committed by
Linus Torvalds
Apr 30, 2002
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[PATCH] four compile fixes for 2.5.12
Pretty boring stuff. Four compile fixes for 2.5.12.
parent
105b0945
Changes
4
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4 changed files
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4 deletions
+4
-4
drivers/char/rocket_int.h
drivers/char/rocket_int.h
+1
-1
drivers/char/serial_tx3912.h
drivers/char/serial_tx3912.h
+1
-1
fs/udf/ecma_167.h
fs/udf/ecma_167.h
+1
-1
include/asm-arm/arch-pxa/pxa-regs.h
include/asm-arm/arch-pxa/pxa-regs.h
+1
-1
No files found.
drivers/char/rocket_int.h
View file @
5ce8015d
...
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@@ -185,7 +185,7 @@ Channel Register Offsets - Indexed - Internal - Fixed
/* Old clock prescale definition and baud rates associated with it */
#define CLOCK_PRESC 0x19
*/
/* mod 9 (divide by 10) prescale */
#define CLOCK_PRESC 0x19
/* mod 9 (divide by 10) prescale */
#define BRD50 4607
#define BRD75 3071
#define BRD110 2094
...
...
drivers/char/serial_tx3912.h
View file @
5ce8015d
...
...
@@ -24,7 +24,7 @@
#define UART_TXOVERRUN_INT 3
/* transmit overrun error (25, 15) */
#define UART_EMPTY_INT 2
/* both trans/recv regs empty (24, 14) */
#define UART_DMAFULL_INT 1
/* DMA at end of buffer (23, 13) */
#define UART_DMAHALF_INT 0
/* DMA halfway through buffer
*/
(22, 12) */
#define UART_DMAHALF_INT 0
/* DMA halfway through buffer
(22, 12) */
#define UARTA_SHIFT 22
#define UARTB_SHIFT 12
...
...
fs/udf/ecma_167.h
View file @
5ce8015d
...
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@@ -606,7 +606,7 @@ struct fileEntry
#define FE_RECORD_FMT_CRLF 0x0A
#define FE_RECORD_FMT_LFCR 0x0B
#define
Record Display Attributes (ECMA 167r3 4/14.9.8) */
/*
Record Display Attributes (ECMA 167r3 4/14.9.8) */
#define FE_RECORD_DISPLAY_ATTR_UNDEF 0x00
#define FE_RECORD_DISPLAY_ATTR_1 0x01
#define FE_RECORD_DISPLAY_ATTR_2 0x02
...
...
include/asm-arm/arch-pxa/pxa-regs.h
View file @
5ce8015d
...
...
@@ -361,7 +361,7 @@ typedef void (*ExcpHndlr) (void) ;
#define LSR_OE (1 << 1)
/* Overrun Error */
#define LSR_DR (1 << 0)
/* Data Ready */
#define MCR_LOOP (1 << 4)
*/
#define MCR_LOOP (1 << 4)
#define MCR_OUT2 (1 << 3)
/* force MSR_DCD in loopback mode */
#define MCR_OUT1 (1 << 2)
/* force MSR_RI in loopback mode */
#define MCR_RTS (1 << 1)
/* Request to Send */
...
...
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