Commit 61a76496 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul

dma: move dw_dmac driver to an own directory

The dw_dmac driver is going to be split into multiple files. To make this more
convenient move it to an own directory.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 0b95961e
...@@ -6990,8 +6990,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER ...@@ -6990,8 +6990,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER
M: Viresh Kumar <viresh.linux@gmail.com> M: Viresh Kumar <viresh.linux@gmail.com>
S: Maintained S: Maintained
F: include/linux/dw_dmac.h F: include/linux/dw_dmac.h
F: drivers/dma/dw_dmac_regs.h F: drivers/dma/dw/
F: drivers/dma/dw_dmac.c
SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
M: Seungwon Jeon <tgih.jun@samsung.com> M: Seungwon Jeon <tgih.jun@samsung.com>
......
...@@ -79,25 +79,7 @@ config INTEL_IOP_ADMA ...@@ -79,25 +79,7 @@ config INTEL_IOP_ADMA
help help
Enable support for the Intel(R) IOP Series RAID engines. Enable support for the Intel(R) IOP Series RAID engines.
config DW_DMAC source "drivers/dma/dw/Kconfig"
tristate "Synopsys DesignWare AHB DMA support"
depends on GENERIC_HARDIRQS
select DMA_ENGINE
default y if CPU_AT32AP7000
help
Support the Synopsys DesignWare AHB DMA controller. This
can be integrated in chips such as the Atmel AT32ap7000.
config DW_DMAC_BIG_ENDIAN_IO
bool "Use big endian I/O register access"
default y if AVR32
depends on DW_DMAC
help
Say yes here to use big endian I/O access when reading and writing
to the DMA controller registers. This is needed on some platforms,
like the Atmel AVR32 architecture.
If unsure, use the default setting.
config AT_HDMAC config AT_HDMAC
tristate "Atmel AHB DMA support" tristate "Atmel AHB DMA support"
......
...@@ -15,7 +15,7 @@ obj-$(CONFIG_FSL_DMA) += fsldma.o ...@@ -15,7 +15,7 @@ obj-$(CONFIG_FSL_DMA) += fsldma.o
obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
obj-$(CONFIG_MV_XOR) += mv_xor.o obj-$(CONFIG_MV_XOR) += mv_xor.o
obj-$(CONFIG_DW_DMAC) += dw_dmac.o obj-$(CONFIG_DW_DMAC) += dw/
obj-$(CONFIG_AT_HDMAC) += at_hdmac.o obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
obj-$(CONFIG_MX3_IPU) += ipu/ obj-$(CONFIG_MX3_IPU) += ipu/
obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
......
#
# DMA engine configuration for dw
#
config DW_DMAC
tristate "Synopsys DesignWare AHB DMA support"
depends on GENERIC_HARDIRQS
select DMA_ENGINE
default y if CPU_AT32AP7000
help
Support the Synopsys DesignWare AHB DMA controller. This
can be integrated in chips such as the Atmel AT32ap7000.
config DW_DMAC_BIG_ENDIAN_IO
bool "Use big endian I/O register access"
default y if AVR32
depends on DW_DMAC
help
Say yes here to use big endian I/O access when reading and writing
to the DMA controller registers. This is needed on some platforms,
like the Atmel AVR32 architecture.
If unsure, use the default setting.
obj-$(CONFIG_DW_DMAC) += dw_dmac.o
...@@ -28,8 +28,8 @@ ...@@ -28,8 +28,8 @@
#include <linux/acpi.h> #include <linux/acpi.h>
#include <linux/acpi_dma.h> #include <linux/acpi_dma.h>
#include "../dmaengine.h"
#include "dw_dmac_regs.h" #include "dw_dmac_regs.h"
#include "dmaengine.h"
/* /*
* This supports the Synopsys "DesignWare AHB Central DMA Controller", * This supports the Synopsys "DesignWare AHB Central DMA Controller",
......
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