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Commit 635f0258 authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] clps7500: remove support 

The CLPS7500 platform has not built since 2.6.22-git7 and there
seems to be no interest in fixing it.  So, remove the platform
support.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ed313489
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Showing with 6 additions and 1196 deletions
arch/arm/Kconfig
View file @ 635f0258
...@@ -243,15 +243,6 @@ config ARCH_AT91 ...@@ -243,15 +243,6 @@ config ARCH_AT91
This enables support for systems based on the Atmel AT91RM9200, This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors. AT91SAM9 and AT91CAP9 processors.
config ARCH_CLPS7500
bool "Cirrus CL-PS7500FE"
select TIMER_ACORN
select ISA
select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
help
Support for the Cirrus Logic PS7500FE system-on-a-chip.
config ARCH_CLPS711X config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based" bool "Cirrus Logic CLPS711x/EP721x-based"
help help
......
arch/arm/Makefile
View file @ 635f0258
...@@ -96,7 +96,6 @@ textofs-y := 0x00008000 ...@@ -96,7 +96,6 @@ textofs-y := 0x00008000
machine-$(CONFIG_ARCH_RPC) := rpc machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_EBSA110) := ebsa110 machine-$(CONFIG_ARCH_EBSA110) := ebsa110
machine-$(CONFIG_ARCH_CLPS7500) := clps7500
machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_FOOTBRIDGE) := footbridge
machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SA1100) := sa1100
......
arch/arm/boot/compressed/Makefile
View file @ 635f0258
...@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y) ...@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
OBJS += head-l7200.o OBJS += head-l7200.o
endif endif
ifeq ($(CONFIG_ARCH_CLPS7500),y)
HEAD = head-clps7500.o
endif
ifeq ($(CONFIG_ARCH_P720T),y) ifeq ($(CONFIG_ARCH_P720T),y)
# Borrow this code from SA1100 # Borrow this code from SA1100
OBJS += head-sa1100.o OBJS += head-sa1100.o
......
arch/arm/boot/compressed/head-clps7500.S deleted 100644 → 0
View file @ ed313489
/*
* linux/arch/arm/boot/compressed/head-clps7500.S
*
* Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
*/
/* There are three different ways the kernel can be
booted on a 7500 system: from Angel (loaded in RAM), from
16-bit ROM or from 32-bit Flash. Luckily, a single kernel
image does for them all. */
/* This branch is taken if the CPU memory width matches the
actual device in use. The default at power on is 16 bits
so we must be prepared for a mismatch. */
.section ".start", "ax"
2:
b 1f
.word 0xffff
.word 0xb632 @ mov r11, #0x03200000
.word 0xe3a0
.word 0x0000 @ mov r0, #0
.word 0xe3a0
.word 0x0080 @ strb r0, [r11, #0x80]
.word 0xe5cb
.word 0xf000 @ mov pc, #0
.word 0xe3a0
1:
adr r1, 2b
teq r1, #0
bne .Langel
/* This is a direct-from-ROM boot. Copy the kernel into
RAM and run it there. */
mov r0, #0x30
mcr p15, 0, r0, c1, c0, 0
mov r0, #0x13
msr cpsr_cxsf, r0
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0x5500
str r0, [r12]
mov r0, #0x10000000
orr r0, r0, #0x8000
mov r4, r0
ldr r2, =_end
2:
ldr r3, [r1], #4
str r3, [r0], #4
teq r0, r2
bne 2b
mov r0, #0xff00
str r0, [r12]
1:
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0xfe00
str r0, [r12]
adr lr, 1f
mov r0, #0
mov r1, #14 /* MACH_TYPE_CLPS7500 */
mov pc, lr
.Langel:
#ifdef CONFIG_ANGELBOOT
/* Call Angel to switch into SVC mode. */
mov r0, #0x17
swi 0x123456
#endif
/* Ensure all interrupts are off and MMU disabled */
mrs r0, cpsr
orr r0, r0, #0xc0
msr cpsr_cxsf, r0
adr lr, 1b
orr lr, lr, #0x10000000
mov r0, #0x30 @ MMU off
mcr p15, 0, r0, c1, c0, 0
mov r0, r0
mov pc, lr
.ltorg
1:
/* And the rest */
#include "head.S"
arch/arm/include/asm/hardware/iomd.h
View file @ 635f0258
...@@ -32,19 +32,11 @@ ...@@ -32,19 +32,11 @@
#define IOMD_KARTRX (0x004) #define IOMD_KARTRX (0x004)
#define IOMD_KCTRL (0x008) #define IOMD_KCTRL (0x008)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IOLINES (0x00C)
#endif
#define IOMD_IRQSTATA (0x010) #define IOMD_IRQSTATA (0x010)
#define IOMD_IRQREQA (0x014) #define IOMD_IRQREQA (0x014)
#define IOMD_IRQCLRA (0x014) #define IOMD_IRQCLRA (0x014)
#define IOMD_IRQMASKA (0x018) #define IOMD_IRQMASKA (0x018)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_SUSMODE (0x01C)
#endif
#define IOMD_IRQSTATB (0x020) #define IOMD_IRQSTATB (0x020)
#define IOMD_IRQREQB (0x024) #define IOMD_IRQREQB (0x024)
#define IOMD_IRQMASKB (0x028) #define IOMD_IRQMASKB (0x028)
...@@ -53,10 +45,6 @@ ...@@ -53,10 +45,6 @@
#define IOMD_FIQREQ (0x034) #define IOMD_FIQREQ (0x034)
#define IOMD_FIQMASK (0x038) #define IOMD_FIQMASK (0x038)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_CLKCTL (0x03C)
#endif
#define IOMD_T0CNTL (0x040) #define IOMD_T0CNTL (0x040)
#define IOMD_T0LTCHL (0x040) #define IOMD_T0LTCHL (0x040)
#define IOMD_T0CNTH (0x044) #define IOMD_T0CNTH (0x044)
...@@ -71,18 +59,6 @@ ...@@ -71,18 +59,6 @@
#define IOMD_T1GO (0x058) #define IOMD_T1GO (0x058)
#define IOMD_T1LATCH (0x05c) #define IOMD_T1LATCH (0x05c)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IRQSTATC (0x060)
#define IOMD_IRQREQC (0x064)
#define IOMD_IRQMASKC (0x068)
#define IOMD_VIDMUX (0x06c)
#define IOMD_IRQSTATD (0x070)
#define IOMD_IRQREQD (0x074)
#define IOMD_IRQMASKD (0x078)
#endif
#define IOMD_ROMCR0 (0x080) #define IOMD_ROMCR0 (0x080)
#define IOMD_ROMCR1 (0x084) #define IOMD_ROMCR1 (0x084)
#ifdef CONFIG_ARCH_RPC #ifdef CONFIG_ARCH_RPC
...@@ -100,11 +76,6 @@ ...@@ -100,11 +76,6 @@
#define IOMD_MOUSEY (0x0A4) #define IOMD_MOUSEY (0x0A4)
#endif #endif
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_MSEDAT (0x0A8)
#define IOMD_MSECTL (0x0Ac)
#endif
#ifdef CONFIG_ARCH_RPC #ifdef CONFIG_ARCH_RPC
#define IOMD_DMATCR (0x0C0) #define IOMD_DMATCR (0x0C0)
#endif #endif
...@@ -113,18 +84,6 @@ ...@@ -113,18 +84,6 @@
#ifdef CONFIG_ARCH_RPC #ifdef CONFIG_ARCH_RPC
#define IOMD_DMAEXT (0x0CC) #define IOMD_DMAEXT (0x0CC)
#endif #endif
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_ASTCR (0x0CC)
#define IOMD_DRAMCR (0x0D0)
#define IOMD_SELFREF (0x0D4)
#define IOMD_ATODICR (0x0E0)
#define IOMD_ATODSR (0x0E4)
#define IOMD_ATODCC (0x0E8)
#define IOMD_ATODCNT1 (0x0EC)
#define IOMD_ATODCNT2 (0x0F0)
#define IOMD_ATODCNT3 (0x0F4)
#define IOMD_ATODCNT4 (0x0F8)
#endif
#ifdef CONFIG_ARCH_RPC #ifdef CONFIG_ARCH_RPC
#define DMA_EXT_IO0 1 #define DMA_EXT_IO0 1
......
arch/arm/lib/Makefile
View file @ 635f0258
...@@ -38,7 +38,6 @@ else ...@@ -38,7 +38,6 @@ else
endif endif
lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
lib-$(CONFIG_ARCH_CLPS7500) += io-acorn.o
lib-$(CONFIG_ARCH_L7200) += io-acorn.o lib-$(CONFIG_ARCH_L7200) += io-acorn.o
lib-$(CONFIG_ARCH_SHARK) += io-shark.o lib-$(CONFIG_ARCH_SHARK) += io-shark.o
......
arch/arm/mach-clps7500/Makefile deleted 100644 → 0
View file @ ed313489
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y := core.o
obj-m :=
obj-n :=
obj- :=
arch/arm/mach-clps7500/core.c deleted 100644 → 0
View file @ ed313489
/*
* linux/arch/arm/mach-clps7500/core.c
*
* Copyright (C) 1998 Russell King
* Copyright (C) 1999 Nexus Electronics Ltd
*
* Extra MM routines for CL7500 architecture
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/serial_8250.h>
#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
unsigned int vram_size;
static void cl7500_ack_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val & ~mask, IOMD_IRQMASKA);
iomd_writeb(mask, IOMD_IRQCLRA);
}
static void cl7500_mask_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val & ~mask, IOMD_IRQMASKA);
}
static void cl7500_unmask_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val | mask, IOMD_IRQMASKA);
}
static struct irq_chip clps7500_a_chip = {
.ack = cl7500_ack_irq_a,
.mask = cl7500_mask_irq_a,
.unmask = cl7500_unmask_irq_a,
};
static void cl7500_mask_irq_b(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKB);
iomd_writeb(val & ~mask, IOMD_IRQMASKB);
}
static void cl7500_unmask_irq_b(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKB);
iomd_writeb(val | mask, IOMD_IRQMASKB);
}
static struct irq_chip clps7500_b_chip = {
.ack = cl7500_mask_irq_b,
.mask = cl7500_mask_irq_b,
.unmask = cl7500_unmask_irq_b,
};
static void cl7500_mask_irq_c(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKC);
iomd_writeb(val & ~mask, IOMD_IRQMASKC);
}
static void cl7500_unmask_irq_c(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKC);
iomd_writeb(val | mask, IOMD_IRQMASKC);
}
static struct irq_chip clps7500_c_chip = {
.ack = cl7500_mask_irq_c,
.mask = cl7500_mask_irq_c,
.unmask = cl7500_unmask_irq_c,
};
static void cl7500_mask_irq_d(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKD);
iomd_writeb(val & ~mask, IOMD_IRQMASKD);
}
static void cl7500_unmask_irq_d(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKD);
iomd_writeb(val | mask, IOMD_IRQMASKD);
}
static struct irq_chip clps7500_d_chip = {
.ack = cl7500_mask_irq_d,
.mask = cl7500_mask_irq_d,
.unmask = cl7500_unmask_irq_d,
};
static void cl7500_mask_irq_dma(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_DMAMASK);
iomd_writeb(val & ~mask, IOMD_DMAMASK);
}
static void cl7500_unmask_irq_dma(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_DMAMASK);
iomd_writeb(val | mask, IOMD_DMAMASK);
}
static struct irq_chip clps7500_dma_chip = {
.ack = cl7500_mask_irq_dma,
.mask = cl7500_mask_irq_dma,
.unmask = cl7500_unmask_irq_dma,
};
static void cl7500_mask_irq_fiq(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_FIQMASK);
iomd_writeb(val & ~mask, IOMD_FIQMASK);
}
static void cl7500_unmask_irq_fiq(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_FIQMASK);
iomd_writeb(val | mask, IOMD_FIQMASK);
}
static struct irq_chip clps7500_fiq_chip = {
.ack = cl7500_mask_irq_fiq,
.mask = cl7500_mask_irq_fiq,
.unmask = cl7500_unmask_irq_fiq,
};
static void cl7500_no_action(unsigned int irq)
{
}
static struct irq_chip clps7500_no_chip = {
.ack = cl7500_no_action,
.mask = cl7500_no_action,
.unmask = cl7500_no_action,
};
static struct irqaction irq_isa = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "isa",
};
static void __init clps7500_init_irq(void)
{
unsigned int irq, flags;
iomd_writeb(0, IOMD_IRQMASKA);
iomd_writeb(0, IOMD_IRQMASKB);
iomd_writeb(0, IOMD_FIQMASK);
iomd_writeb(0, IOMD_DMAMASK);
for (irq = 0; irq < NR_IRQS; irq++) {
flags = IRQF_VALID;
if (irq <= 6 || (irq >= 9 && irq <= 15) ||
(irq >= 48 && irq <= 55))
flags |= IRQF_PROBE;
switch (irq) {
case 0 ... 7:
set_irq_chip(irq, &clps7500_a_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 8 ... 15:
set_irq_chip(irq, &clps7500_b_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 16 ... 22:
set_irq_chip(irq, &clps7500_dma_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 24 ... 31:
set_irq_chip(irq, &clps7500_c_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 40 ... 47:
set_irq_chip(irq, &clps7500_d_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 48 ... 55:
set_irq_chip(irq, &clps7500_no_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 64 ... 72:
set_irq_chip(irq, &clps7500_fiq_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
}
}
setup_irq(IRQ_ISA, &irq_isa);
}
static struct map_desc cl7500_io_desc[] __initdata = {
{ /* IO space */
.virtual = (unsigned long)IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE,
.type = MT_DEVICE
}, { /* ISA space */
.virtual = ISA_BASE,
.pfn = __phys_to_pfn(ISA_START),
.length = ISA_SIZE,
.type = MT_DEVICE
}, { /* Flash */
.virtual = CLPS7500_FLASH_BASE,
.pfn = __phys_to_pfn(CLPS7500_FLASH_START),
.length = CLPS7500_FLASH_SIZE,
.type = MT_DEVICE
}, { /* LED */
.virtual = LED_BASE,
.pfn = __phys_to_pfn(LED_START),
.length = LED_SIZE,
.type = MT_DEVICE
}
};
static void __init clps7500_map_io(void)
{
iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
}
extern void ioctime_init(void);
extern unsigned long ioc_timer_gettimeoffset(void);
static irqreturn_t
clps7500_timer_interrupt(int irq, void *dev_id)
{
timer_tick();
/* Why not using do_leds interface?? */
{
/* Twinkle the lights. */
static int count, state = 0xff00;
if (count-- == 0) {
state ^= 0x100;
count = 25;
*((volatile unsigned int *)LED_ADDRESS) = state;
}
}
return IRQ_HANDLED;
}
static struct irqaction clps7500_timer_irq = {
.name = "CLPS7500 Timer Tick",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = clps7500_timer_interrupt,
};
/*
* Set up timer interrupt.
*/
static void __init clps7500_timer_init(void)
{
ioctime_init();
setup_irq(IRQ_TIMER, &clps7500_timer_irq);
}
static struct sys_timer clps7500_timer = {
.init = clps7500_timer_init,
.offset = ioc_timer_gettimeoffset,
};
static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = 0x03010fe0,
.irq = 10,
.uartclk = 1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
},
{
.mapbase = 0x03010be0,
.irq = 0,
.uartclk = 1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
},
{
.iobase = ISASLOT_IO + 0x2e8,
.irq = 41,
.uartclk = 1843200,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{
.iobase = ISASLOT_IO + 0x3e8,
.irq = 40,
.uartclk = 1843200,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = serial_platform_data,
},
};
static void __init clps7500_init(void)
{
platform_device_register(&serial_device);
}
MACHINE_START(CLPS7500, "CL-PS7500")
/* Maintainer: Philip Blundell */
.phys_io = 0x03000000,
.io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
.map_io = clps7500_map_io,
.init_irq = clps7500_init_irq,
.init_machine = clps7500_init,
.timer = &clps7500_timer,
MACHINE_END
arch/arm/mach-clps7500/include/mach/acornfb.h deleted 100644 → 0
View file @ ed313489
#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
static inline void
acornfb_vidc20_find_rates(struct vidc_timing *vidc,
struct fb_var_screeninfo *var)
{
u_int bandwidth;
vidc->control |= VIDC20_CTRL_PIX_CK;
/* Calculate bandwidth */
bandwidth = var->pixclock * 8 / var->bits_per_pixel;
/* Encode bandwidth as VIDC20 setting */
if (bandwidth > 16667*2)
vidc->control |= VIDC20_CTRL_FIFO_16;
else if (bandwidth > 13333*2)
vidc->control |= VIDC20_CTRL_FIFO_20;
else if (bandwidth > 11111*2)
vidc->control |= VIDC20_CTRL_FIFO_24;
else
vidc->control |= VIDC20_CTRL_FIFO_28;
vidc->pll_ctl = 0x2020;
}
#ifdef CONFIG_CHRONTEL_7003
#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK
#else
#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK
#endif
#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
arch/arm/mach-clps7500/include/mach/debug-macro.S deleted 100644 → 0
View file @ ed313489
/* arch/arm/mach-clps7500/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro addruart,rx
mov \rx, #0xe0000000
orr \rx, \rx, #0x00010000
orr \rx, \rx, #0x00000be0
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
arch/arm/mach-clps7500/include/mach/dma.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/dma.h
*
* Copyright (C) 1999 Nexus Electronics Ltd.
*/
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
/*
* This is the maximum DMA address that can be DMAd to.
* There should not be more than (0xd0000000 - 0xc0000000)
* bytes of RAM.
*/
#define MAX_DMA_ADDRESS 0xd0000000
#define DMA_S0 0
#endif /* _ASM_ARCH_DMA_H */
arch/arm/mach-clps7500/include/mach/entry-macro.S deleted 100644 → 0
View file @ ed313489
#include <mach/hardware.h>
#include <asm/hardware/entry-macro-iomd.S>
.equ ioc_base_high, IOC_BASE & 0xff000000
.equ ioc_base_low, IOC_BASE & 0x00ff0000
.macro get_irqnr_preamble, base, tmp
mov \base, #ioc_base_high @ point at IOC
.if ioc_base_low
orr \base, \base, #ioc_base_low
.endif
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-clps7500/include/mach/hardware.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/hardware.h
*
* Copyright (C) 1996-1999 Russell King.
* Copyright (C) 1999 Nexus Electronics Ltd.
*
* This file contains the hardware definitions of the
* CL7500 evaluation board.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <mach/memory.h>
#include <asm/hardware/iomd.h>
#ifdef __ASSEMBLY__
#define IOMEM(x) x
#else
#define IOMEM(x) ((void __iomem *)(x))
#endif
/*
* What hardware must be present
*/
#define HAS_IOMD
#define HAS_VIDC20
/* Hardware addresses of major areas.
* *_START is the physical address
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define IO_START 0x03000000 /* I/O */
#define IO_SIZE 0x01000000
#define IO_BASE IOMEM(0xe0000000)
#define ISA_START 0x0c000000 /* ISA */
#define ISA_SIZE 0x00010000
#define ISA_BASE 0xe1000000
#define CLPS7500_FLASH_START 0x01000000 /* XXX */
#define CLPS7500_FLASH_SIZE 0x01000000
#define CLPS7500_FLASH_BASE 0xe2000000
#define LED_START 0x0302B000
#define LED_SIZE 0x00001000
#define LED_BASE 0xe3000000
#define LED_ADDRESS (LED_BASE + 0xa00)
/* Let's define SCREEN_START for CL7500, even though it's a lie. */
#define SCREEN_START 0x02000000 /* VRAM */
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
#define VIDC_BASE (void __iomem *)0xe0400000
#define IOMD_BASE IOMEM(0xe0200000)
#define IOC_BASE IOMEM(0xe0200000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define PCIO_BASE IOMEM(0xe0010000)
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
/* in/out bias for the ISA slot region */
#define ISASLOT_IO 0x80400000
#endif
arch/arm/mach-clps7500/include/mach/io.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/io.h
* from arch/arm/mach-rpc/include/mach/io.h
*
* Copyright (C) 1997 Russell King
*
* Modifications:
* 06-Dec-1997 RMK Created.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* GCC is totally crap at loading/storing data. We try to persuade it
* to do the right thing by using these whereever possible instead of
* the above.
*/
#define __arch_base_getb(b,o) \
({ \
unsigned int v, r = (b); \
__asm__ __volatile__( \
"ldrb %0, [%1, %2]" \
: "=r" (v) \
: "r" (r), "Ir" (o)); \
v; \
})
#define __arch_base_getl(b,o) \
({ \
unsigned int v, r = (b); \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (v) \
: "r" (r), "Ir" (o)); \
v; \
})
#define __arch_base_putb(v,b,o) \
({ \
unsigned int r = (b); \
__asm__ __volatile__( \
"strb %0, [%1, %2]" \
: \
: "r" (v), "r" (r), "Ir" (o)); \
})
#define __arch_base_putl(v,b,o) \
({ \
unsigned int r = (b); \
__asm__ __volatile__( \
"str %0, [%1, %2]" \
: \
: "r" (v), "r" (r), "Ir" (o)); \
})
/*
* We use two different types of addressing - PC style addresses, and ARM
* addresses. PC style accesses the PC hardware with the normal PC IO
* addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
* and are translated to the start of IO. Note that all addresses are
* shifted left!
*/
#define __PORT_PCIO(x) (!((x) & 0x80000000))
/*
* Dynamic IO functions - let the compiler
* optimize the expressions
*/
static inline void __outb (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"strb %1, [%0, %2, lsl #2] @ outb"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
static inline void __outw (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2] @ outw"
: "=&r" (temp)
: "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
static inline void __outl (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2] @ outl"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
static inline unsigned sz __in##fnsuffix (unsigned int port) \
{ \
unsigned long temp, value; \
__asm__ __volatile__( \
"tst %2, #0x80000000\n\t" \
"mov %0, %4\n\t" \
"addeq %0, %0, %3\n\t" \
"ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
: "=&r" (temp), "=r" (value) \
: "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
: "cc"); \
return (unsigned sz)value; \
}
static inline unsigned int __ioaddr (unsigned int port) \
{ \
if (__PORT_PCIO(port)) \
return (unsigned int)(PCIO_BASE + (port << 2)); \
else \
return (unsigned int)(IO_BASE + (port << 2)); \
}
#define DECLARE_IO(sz,fnsuffix,instr) \
DECLARE_DYN_IN(sz,fnsuffix,instr)
DECLARE_IO(char,b,"b")
DECLARE_IO(short,w,"")
DECLARE_IO(int,l,"")
#undef DECLARE_IO
#undef DECLARE_DYN_IN
/*
* Constant address IO functions
*
* These have to be macros for the 'J' constraint to work -
* +/-4096 immediate operand.
*/
#define __outbc(value,port) \
({ \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"strb %0, [%1, %2] @ outbc" \
: : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"strb %0, [%1, %2] @ outbc" \
: : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inbc(port) \
({ \
unsigned char result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldrb %0, [%1, %2] @ inbc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldrb %0, [%1, %2] @ inbc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __outwc(value,port) \
({ \
unsigned long v = value; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outwc" \
: : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outwc" \
: : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inwc(port) \
({ \
unsigned short result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inwc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inwc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result & 0xffff; \
})
#define __outlc(value,port) \
({ \
unsigned long v = value; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outlc" \
: : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outlc" \
: : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inlc(port) \
({ \
unsigned long result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inlc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inlc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __ioaddrc(port) \
(__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
/* the following macro is deprecated */
#define ioaddr(port) __ioaddr((port))
#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif
arch/arm/mach-clps7500/include/mach/irq.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/irq.h
*
* Copyright (C) 1996 Russell King
* Copyright (C) 1999, 2001 Nexus Electronics Ltd.
*
* Changelog:
* 10-10-1996 RMK Brought up to date with arch-sa110eval
* 22-08-1998 RMK Restructured IRQ routines
* 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
*/
#include <linux/io.h>
#include <asm/hardware/iomd.h>
static inline int fixup_irq(unsigned int irq)
{
if (irq == IRQ_ISA) {
int isabits = *((volatile unsigned int *)0xe002b700);
if (isabits == 0) {
printk("Spurious ISA IRQ!\n");
return irq;
}
irq = IRQ_ISA_BASE;
while (!(isabits & 1)) {
irq++;
isabits >>= 1;
}
}
return irq;
}
arch/arm/mach-clps7500/include/mach/irqs.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/irqs.h
*
* Copyright (C) 1999 Nexus Electronics Ltd
*/
#define IRQ_INT2 0
#define IRQ_INT1 2
#define IRQ_VSYNCPULSE 3
#define IRQ_POWERON 4
#define IRQ_TIMER0 5
#define IRQ_TIMER1 6
#define IRQ_FORCE 7
#define IRQ_INT8 8
#define IRQ_ISA 9
#define IRQ_INT6 10
#define IRQ_INT5 11
#define IRQ_INT4 12
#define IRQ_INT3 13
#define IRQ_KEYBOARDTX 14
#define IRQ_KEYBOARDRX 15
#define IRQ_DMA0 16
#define IRQ_DMA1 17
#define IRQ_DMA2 18
#define IRQ_DMA3 19
#define IRQ_DMAS0 20
#define IRQ_DMAS1 21
#define IRQ_IOP0 24
#define IRQ_IOP1 25
#define IRQ_IOP2 26
#define IRQ_IOP3 27
#define IRQ_IOP4 28
#define IRQ_IOP5 29
#define IRQ_IOP6 30
#define IRQ_IOP7 31
#define IRQ_MOUSERX 40
#define IRQ_MOUSETX 41
#define IRQ_ADC 42
#define IRQ_EVENT1 43
#define IRQ_EVENT2 44
#define IRQ_ISA_BASE 48
#define IRQ_ISA_3 48
#define IRQ_ISA_4 49
#define IRQ_ISA_5 50
#define IRQ_ISA_7 51
#define IRQ_ISA_9 52
#define IRQ_ISA_10 53
#define IRQ_ISA_11 54
#define IRQ_ISA_14 55
#define FIQ_INT9 0
#define FIQ_INT5 1
#define FIQ_INT6 4
#define FIQ_INT8 6
#define FIQ_FORCE 7
/*
* This is the offset of the FIQ "IRQ" numbers
*/
#define FIQ_START 64
#define IRQ_TIMER IRQ_TIMER0
arch/arm/mach-clps7500/include/mach/memory.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/memory.h
*
* Copyright (c) 1996,1997,1998 Russell King.
*
* Changelog:
* 20-Oct-1996 RMK Created
* 31-Dec-1997 RMK Fixed definitions to reduce warnings
* 11-Jan-1998 RMK Uninlined to reduce hits on cache
* 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
* 21-Mar-1999 RMK Renamed to memory.h
* RMK Added TASK_SIZE and PAGE_OFFSET
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x10000000)
/*
* These are exactly the same on the RiscPC as the
* physical memory view.
*/
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area - ROM
*/
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
/*
* Sparsemem support. Each section is a maximum of 64MB. The sections
* are offset by 128MB and can cover 128MB, so that gives us a maximum
* of 29 physmem bits.
*/
#define MAX_PHYSMEM_BITS 29
#define SECTION_SIZE_BITS 26
#endif
arch/arm/mach-clps7500/include/mach/system.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/system.h
*
* Copyright (c) 1999 Nexus Electronics Ltd.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <linux/io.h>
#include <asm/hardware/iomd.h>
static inline void arch_idle(void)
{
iomd_writeb(0, IOMD_SUSMODE);
}
#define arch_reset(mode) \
do { \
iomd_writeb(0, IOMD_ROMCR0); \
cpu_reset(0); \
} while (0)
#endif
arch/arm/mach-clps7500/include/mach/timex.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/timex.h
*
* CL7500 architecture timex specifications
*
* Copyright (C) 1999 Nexus Electronics Ltd
*/
/*
* On the ARM7500, the clock ticks at 2MHz.
*/
#define CLOCK_TICK_RATE 2000000
arch/arm/mach-clps7500/include/mach/uncompress.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/uncompress.h
*
* Copyright (C) 1999, 2000 Nexus Electronics Ltd.
*/
#define BASE 0x03010000
#define SERBASE (BASE + (0x2f8 << 2))
static inline void putc(char c)
{
while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
barrier();
*((volatile unsigned int *)(SERBASE)) = c;
}
static inline void flush(void)
{
}
static __inline__ void arch_decomp_setup(void)
{
int baud = 3686400 / (9600 * 32);
*((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
*((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
*((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
*((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
*((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
}
/*
* nothing to do
*/
#define arch_decomp_wdog()
arch/arm/mach-clps7500/include/mach/vmalloc.h deleted 100644 → 0
View file @ ed313489
/*
* arch/arm/mach-clps7500/include/mach/vmalloc.h
*/
#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
drivers/ide/Kconfig
View file @ 635f0258
...@@ -732,7 +732,7 @@ config BLK_DEV_IDE_TX4939 ...@@ -732,7 +732,7 @@ config BLK_DEV_IDE_TX4939
config IDE_ARM config IDE_ARM
tristate "ARM IDE support" tristate "ARM IDE support"
depends on ARM && (ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK) depends on ARM && (ARCH_RPC || ARCH_SHARK)
default y default y
config BLK_DEV_IDE_ICSIDE config BLK_DEV_IDE_ICSIDE
......
drivers/ide/ide_arm.c
View file @ 635f0258
...@@ -15,15 +15,8 @@ ...@@ -15,15 +15,8 @@
#define DRV_NAME "ide_arm" #define DRV_NAME "ide_arm"
#ifdef CONFIG_ARCH_CLPS7500 #define IDE_ARM_IO 0x1f0
# include <mach/hardware.h> #define IDE_ARM_IRQ IRQ_HARDDISK
#
# define IDE_ARM_IO (ISASLOT_IO + 0x1f0)
# define IDE_ARM_IRQ IRQ_ISA_14
#else
# define IDE_ARM_IO 0x1f0
# define IDE_ARM_IRQ IRQ_HARDDISK
#endif
static int __init ide_arm_init(void) static int __init ide_arm_init(void)
{ {
......
drivers/input/serio/Kconfig
View file @ 635f0258
...@@ -79,7 +79,7 @@ config SERIO_PARKBD ...@@ -79,7 +79,7 @@ config SERIO_PARKBD
config SERIO_RPCKBD config SERIO_RPCKBD
tristate "Acorn RiscPC keyboard controller" tristate "Acorn RiscPC keyboard controller"
depends on ARCH_ACORN || ARCH_CLPS7500 depends on ARCH_ACORN
default y default y
help help
Say Y here if you have the Acorn RiscPC and want to use an AT Say Y here if you have the Acorn RiscPC and want to use an AT
......
drivers/net/cs89x0.c
View file @ 635f0258
...@@ -170,11 +170,7 @@ static char version[] __initdata = ...@@ -170,11 +170,7 @@ static char version[] __initdata =
/* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps /* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps
them to system IRQ numbers. This mapping is card specific and is set to them to system IRQ numbers. This mapping is card specific and is set to
the configuration of the Cirrus Eval board for this chip. */ the configuration of the Cirrus Eval board for this chip. */
#ifdef CONFIG_ARCH_CLPS7500 #if defined(CONFIG_SH_HICOSH4)
static unsigned int netcard_portlist[] __used __initdata =
{ 0x80090303, 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
static unsigned int cs8900_irq_map[] = {12,0,0,0};
#elif defined(CONFIG_SH_HICOSH4)
static unsigned int netcard_portlist[] __used __initdata = static unsigned int netcard_portlist[] __used __initdata =
{ 0x0300, 0}; { 0x0300, 0};
static unsigned int cs8900_irq_map[] = {1,0,0,0}; static unsigned int cs8900_irq_map[] = {1,0,0,0};
......
drivers/video/Kconfig
View file @ 635f0258
...@@ -362,7 +362,7 @@ endchoice ...@@ -362,7 +362,7 @@ endchoice
config FB_ACORN config FB_ACORN
bool "Acorn VIDC support" bool "Acorn VIDC support"
depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500) depends on (FB = y) && ARM && ARCH_ACORN
select FB_CFB_FILLRECT select FB_CFB_FILLRECT
select FB_CFB_COPYAREA select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT select FB_CFB_IMAGEBLIT
......
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