Commit 63651ef2 authored by Richard Zhu's avatar Richard Zhu Committed by Shawn Guo

ARM: dts: imx: fix the schema check errors

- ranges property should be grouped by region, with no functional
  changes. Otherwise, schema dtbs_check would report the following errors.
"linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
        linux-imx/arch/arm/boot/dts/imx6qp-vicutp.dt.yaml: pcie@1ffc000: ranges: 'oneOf' conditional failed, one must be fixed:
                [[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'boolean'
                True was expected
                [[2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640]] is not of type 'null'
        [2164260864, 0, 0, 33030144, 0, 65536, 2181038080, 0, 16777216, 16777216, 0, 15728640] is too long
        From schema: linux-imx/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml"
- refer to commit 281f1f99 ("PCI: dwc: Detect number of iATU windows").
  The num-viewport is not required anymore, remove them totally.
- dt_binding_check complains "compatible: ['fsl,imx6qp-pcie', 'snps,dw-pcie']
  is too long", remove "snps,dw-pcie" from the compatible string.
Signed-off-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 6c418328
...@@ -264,7 +264,7 @@ L2: cache-controller@a02000 { ...@@ -264,7 +264,7 @@ L2: cache-controller@a02000 {
}; };
pcie: pcie@1ffc000 { pcie: pcie@1ffc000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; compatible = "fsl,imx6q-pcie";
reg = <0x01ffc000 0x04000>, reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>; <0x01f00000 0x80000>;
reg-names = "dbi", "config"; reg-names = "dbi", "config";
...@@ -272,10 +272,9 @@ pcie: pcie@1ffc000 { ...@@ -272,10 +272,9 @@ pcie: pcie@1ffc000 {
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0 0 0x01f80000 0 0x00010000>, /* downstream I/O */
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ <0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
num-viewport = <4>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi"; interrupt-names = "msi";
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
...@@ -110,5 +110,5 @@ &mmdc0 { ...@@ -110,5 +110,5 @@ &mmdc0 {
}; };
&pcie { &pcie {
compatible = "fsl,imx6qp-pcie", "snps,dw-pcie"; compatible = "fsl,imx6qp-pcie";
}; };
...@@ -1395,15 +1395,15 @@ pwm8: pwm@22b0000 { ...@@ -1395,15 +1395,15 @@ pwm8: pwm@22b0000 {
}; };
pcie: pcie@8ffc000 { pcie: pcie@8ffc000 {
compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; compatible = "fsl,imx6sx-pcie";
reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>; reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>;
reg-names = "dbi", "config"; reg-names = "dbi", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0 0 0x08f80000 0 0x00010000>, /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */ <0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi"; interrupt-names = "msi";
......
...@@ -164,7 +164,7 @@ fec2: ethernet@30bf0000 { ...@@ -164,7 +164,7 @@ fec2: ethernet@30bf0000 {
}; };
pcie: pcie@33800000 { pcie: pcie@33800000 {
compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; compatible = "fsl,imx7d-pcie";
reg = <0x33800000 0x4000>, reg = <0x33800000 0x4000>,
<0x4ff00000 0x80000>; <0x4ff00000 0x80000>;
reg-names = "dbi", "config"; reg-names = "dbi", "config";
...@@ -172,10 +172,9 @@ pcie: pcie@33800000 { ...@@ -172,10 +172,9 @@ pcie: pcie@33800000 {
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000>, /* downstream I/O */
0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
num-viewport = <4>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi"; interrupt-names = "msi";
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
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