Commit 63997988 authored by xinhui pan's avatar xinhui pan Committed by Alex Deucher

drm/amdgpu: Use correct size when access vram

To make size is 4 byte aligned. Use &~0x3ULL instead of &3ULL.
Signed-off-by: default avatarxinhui pan <xinhui.pan@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9113a0fb
......@@ -1503,7 +1503,7 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo,
memcpy(buf, &value, bytes);
}
} else {
bytes = cursor.size & 0x3ull;
bytes = cursor.size & ~0x3ULL;
amdgpu_device_vram_access(adev, cursor.start,
(uint32_t *)buf, bytes,
write);
......
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