Commit 63a7c6d7 authored by Sascha Hauer's avatar Sascha Hauer

ARM: mx5: dynamically register mxc-nand device

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 00b57bf9
...@@ -21,6 +21,10 @@ extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst; ...@@ -21,6 +21,10 @@ extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst;
#define imx51_add_imx_uart(id, pdata) \ #define imx51_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata)
extern const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst;
#define imx51_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx51_mxc_nand_data, pdata)
extern const struct imx_spi_imx_data imx51_cspi_data __initconst; extern const struct imx_spi_imx_data imx51_cspi_data __initconst;
#define imx51_add_cspi(pdata) \ #define imx51_add_cspi(pdata) \
imx_add_spi_imx(&imx51_cspi_data, pdata) imx_add_spi_imx(&imx51_cspi_data, pdata)
......
...@@ -17,6 +17,15 @@ ...@@ -17,6 +17,15 @@
.irq = soc ## _INT_NFC \ .irq = soc ## _INT_NFC \
} }
#define imx_mxc_nandv3_data_entry_single(soc, _size) \
{ \
.id = -1, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.axibase = soc ## _NFC_AXI_BASE_ADDR, \
.irq = soc ## _INT_NFC \
}
#ifdef CONFIG_SOC_IMX21 #ifdef CONFIG_SOC_IMX21
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX21, SZ_4K); imx_mxc_nand_data_entry_single(MX21, SZ_4K);
...@@ -42,12 +51,22 @@ const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = ...@@ -42,12 +51,22 @@ const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX35, SZ_8K); imx_mxc_nand_data_entry_single(MX35, SZ_8K);
#endif #endif
#ifdef CONFIG_ARCH_MX51
const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
#endif
struct platform_device *__init imx_add_mxc_nand( struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data, const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata) const struct mxc_nand_platform_data *pdata)
{ {
/* AXI has to come first, that's how the mxc_nand driver expect it */
struct resource res[] = { struct resource res[] = {
{ {
.start = data->axibase,
.end = data->axibase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->iobase, .start = data->iobase,
.end = data->iobase + data->iosize - 1, .end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
...@@ -57,6 +76,8 @@ struct platform_device *__init imx_add_mxc_nand( ...@@ -57,6 +76,8 @@ struct platform_device *__init imx_add_mxc_nand(
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
return imx_add_platform_device("mxc_nand", 0, res, ARRAY_SIZE(res), return imx_add_platform_device("mxc_nand", data->id,
res + !data->axibase,
ARRAY_SIZE(res) - !data->axibase,
pdata, sizeof(*pdata)); pdata, sizeof(*pdata));
} }
...@@ -71,8 +71,15 @@ struct platform_device *__init imx_add_imx_uart_1irq( ...@@ -71,8 +71,15 @@ struct platform_device *__init imx_add_imx_uart_1irq(
#include <mach/mxc_nand.h> #include <mach/mxc_nand.h>
struct imx_mxc_nand_data { struct imx_mxc_nand_data {
/*
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
* machines but don't change existing devices as the nand device usually
* appears in the kernel command line to pass its partitioning.
*/
int id;
resource_size_t iobase; resource_size_t iobase;
resource_size_t iosize; resource_size_t iosize;
resource_size_t axibase;
resource_size_t irq; resource_size_t irq;
}; };
struct platform_device *__init imx_add_mxc_nand( struct platform_device *__init imx_add_mxc_nand(
......
...@@ -287,7 +287,7 @@ ...@@ -287,7 +287,7 @@
#define MX51_MXC_INT_RESV5 5 #define MX51_MXC_INT_RESV5 5
#define MX51_MXC_INT_SDMA 6 #define MX51_MXC_INT_SDMA 6
#define MX51_MXC_INT_IOMUX 7 #define MX51_MXC_INT_IOMUX 7
#define MX51_MXC_INT_NFC 8 #define MX51_INT_NFC 8
#define MX51_MXC_INT_VPU 9 #define MX51_MXC_INT_VPU 9
#define MX51_MXC_INT_IPU_ERR 10 #define MX51_MXC_INT_IPU_ERR 10
#define MX51_MXC_INT_IPU_SYN 11 #define MX51_MXC_INT_IPU_SYN 11
......
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