Commit 6598f32d authored by Chin-Yen Lee's avatar Chin-Yen Lee Committed by Kalle Valo

rtw88: 8723de: adjust the LTR setting

The LTR mechanism enables PCIE Endpoints to report the service latency
requirements and CPU will enter appropriate sleep state to save power
based on the LTR value.

8723de provides two registers to config the LTR, and the original setting
is too short for CPU to ente sleep state. The patch adjust the LTR setting.
Signed-off-by: default avatarChin-Yen Lee <timlee@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210113014342.3615-1-pkshih@realtek.com
parent 9264cabc
...@@ -60,8 +60,8 @@ static const struct rtw_hw_reg rtw8723d_txagc[] = { ...@@ -60,8 +60,8 @@ static const struct rtw_hw_reg rtw8723d_txagc[] = {
#define WLAN_MAX_AGG_NR 0x0A #define WLAN_MAX_AGG_NR 0x0A
#define WLAN_AMPDU_MAX_TIME 0x1C #define WLAN_AMPDU_MAX_TIME 0x1C
#define WLAN_ANT_SEL 0x82 #define WLAN_ANT_SEL 0x82
#define WLAN_LTR_IDLE_LAT 0x883C883C #define WLAN_LTR_IDLE_LAT 0x90039003
#define WLAN_LTR_ACT_LAT 0x880B880B #define WLAN_LTR_ACT_LAT 0x883c883c
#define WLAN_LTR_CTRL1 0xCB004010 #define WLAN_LTR_CTRL1 0xCB004010
#define WLAN_LTR_CTRL2 0x01233425 #define WLAN_LTR_CTRL2 0x01233425
......
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