Commit 65e32933 authored by Hyungwon Hwang's avatar Hyungwon Hwang Committed by Kukjin Kim

ARM: dts: fix clock-frequency of display timing0 for exynos3250-rinato

After the commit abc0b144 ("drm: Perform basic sanity checks on
probed modes"), proper clock-frequency becomes mandatory for
validating the mode of panel.  The display does not work if there is
no mode validated. Also, this clock-frequency must be set
appropriately for getting required frame rate.

Fixes: abc0b144 ("drm: Perform basic sanity checks on probed modes")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Sigend-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent d770e558
...@@ -182,7 +182,7 @@ panel@0 { ...@@ -182,7 +182,7 @@ panel@0 {
display-timings { display-timings {
timing-0 { timing-0 {
clock-frequency = <0>; clock-frequency = <4600000>;
hactive = <320>; hactive = <320>;
vactive = <320>; vactive = <320>;
hfront-porch = <1>; hfront-porch = <1>;
......
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