Commit 6956c18f authored by Marijn Suijten's avatar Marijn Suijten Committed by Bjorn Andersson

clk: qcom: gcc-sdm660: Use floor ops for SDCC1 clock

In commit 3f905469 ("clk: qcom: gcc: Use floor ops for SDCC clocks")
floor ops were applied to SDCC2 only, but flooring is also required on
the SDCC1 apps clock which is used by the eMMC card on Sony's Nile
platform, and otherwise result in the typicial "Card appears
overclocked" warnings observed on many other platforms before:

    mmc0: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
    mmc0: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
    mmc0: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz

Fixes: f2a76a29 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660")
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Tested-by: default avatarAlexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220714203822.186448-1-marijn.suijten@somainline.org
parent 51b0a5e0
...@@ -757,7 +757,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { ...@@ -757,7 +757,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
.name = "sdcc1_apps_clk_src", .name = "sdcc1_apps_clk_src",
.parent_data = gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div, .parent_data = gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div,
.num_parents = ARRAY_SIZE(gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div), .num_parents = ARRAY_SIZE(gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div),
.ops = &clk_rcg2_ops, .ops = &clk_rcg2_floor_ops,
}, },
}; };
......
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