Commit 69f8aec4 authored by Michal Simek's avatar Michal Simek

arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5

Add missing mio-bank properties to zc1751 dc1 and dc5 boards.
The same change was done by commit 63481699 ("arm64: dts: zynqmp: Add
missing mio-bank properties to sdhcis").
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2b2ab31639c706651dfd319f5b6bc59e68f111b6.1623684253.git.michal.simek@xilinx.com
parent d58f9227
......@@ -364,6 +364,7 @@ &sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
bus-width = <8>;
xlnx,mio-bank = <0>;
};
/* SD1 with level shifter */
......@@ -371,6 +372,7 @@ &sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci1_default>;
xlnx,mio-bank = <1>;
};
&uart0 {
......
......@@ -407,6 +407,7 @@ &sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
no-1-8-v;
xlnx,mio-bank = <0>;
};
&ttc0 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment