Commit 6cfda12a authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://are.twiddle.net:8080/axp-2.5

into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
parents 4c7fefc3 e6adbbcd
......@@ -307,7 +307,7 @@ convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) 19yy <name of author>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......@@ -329,7 +329,7 @@ Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) 19yy name of author
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
......
......@@ -788,8 +788,18 @@
</para>
<para>
Note that the atomic operations are defined to act as both
read and write barriers on all platforms.
Note that the atomic operations do in general not act as memory
barriers. Instead you can insert a memory barrier before or
after <function>atomic_inc()</function> or
<function>atomic_dec()</function> by inserting
<function>smp_mb__before_atomic_inc()</function>,
<function>smp_mb__after_atomic_inc()</function>,
<function>smp_mb__before_atomic_dec()</function> or
<function>smp_mb__after_atomic_dec()</function>
respectively. The advantage of using those macros instead of
<function>smp_mb()</function> is, that they are cheaper on some
platforms.
<!-- Sebastian Wilhelmi <seppi@seppi.de> 2002-03-04 -->
</para>
</sect1>
......
......@@ -10,7 +10,7 @@ diskspace than traditional filesystems.
You can't write to a cramfs filesystem (making it compressible and
compact also makes it _very_ hard to update on-the-fly), so you have to
create the disk image with the "mkcramfs" utility in scripts/cramfs.
create the disk image with the "mkcramfs" utility.
Usage Notes
......@@ -19,9 +19,7 @@ Usage Notes
File sizes are limited to less than 16MB.
Maximum filesystem size is a little over 256MB. (The last file on the
filesystem is allowed to extend past 256MB.) (Comments in mkcramfs.c
suggest that ROM sizes may be limited to 64MB, though that's not a
limitation in cramfs code.)
filesystem is allowed to extend past 256MB.)
Only the low 8 bits of gid are stored. The current version of
mkcramfs simply truncates to 8 bits, which is a potential security
......@@ -48,18 +46,28 @@ mind the filesystem becoming unreadable to future kernels.
For /usr/share/magic
------------------
--------------------
0 long 0x28cd3d45 Linux cramfs
>4 long x size %d
>8 long x flags 0x%x
>12 long x future 0x%x
0 ulelong 0x28cd3d45 Linux cramfs offset 0
>4 ulelong x size %d
>8 ulelong x flags 0x%x
>12 ulelong x future 0x%x
>16 string >\0 signature "%.16s"
>32 long x fsid.crc 0x%x
>36 long x fsid.edition %d
>40 long x fsid.blocks %d
>44 long x fsid.files %d
>32 ulelong x fsid.crc 0x%x
>36 ulelong x fsid.edition %d
>40 ulelong x fsid.blocks %d
>44 ulelong x fsid.files %d
>48 string >\0 name "%.16s"
512 ulelong 0x28cd3d45 Linux cramfs offset 512
>516 ulelong x size %d
>520 ulelong x flags 0x%x
>524 ulelong x future 0x%x
>528 string >\0 signature "%.16s"
>544 ulelong x fsid.crc 0x%x
>548 ulelong x fsid.edition %d
>552 ulelong x fsid.blocks %d
>556 ulelong x fsid.files %d
>560 string >\0 name "%.16s"
Hacker Notes
......
......@@ -2256,7 +2256,7 @@ function, and the 8th switch is used to select "compatible" or "enhanced".
When I got my two cards, one of them had this switch set to "enhanced". That
card didn't work at all, it wasn't even recognized by the driver. The other
card had this switch set to "compatible" and it behaved absolutely normally. I
guess that the switch on one of the cards, must have been changed accidently
guess that the switch on one of the cards, must have been changed accidentally
when the card was taken out of its former host. The question remains
unanswered, what is the purpose of the "enhanced" position?
......
......@@ -503,7 +503,7 @@ The main limitations are :
Resources and links
===================
Current developement on this driver is posted to:
Current development on this driver is posted to:
- http://www.sourceforge.net/projects/bonding/
Donald Becker's Ethernet Drivers and diag programs may be found at :
......
Documents about softnet driver issues in general can be found
at:
http://www.firstfloor.org/~andi/softnet/
Transmit path guidelines:
1) The hard_start_xmit method must never return '1' under any
normal circumstances. It is considered a hard error unless
there is no way your device can tell ahead of time when it's
transmit function will become busy.
Instead it must maintain the queue properly. For example,
for a driver implementing scatter-gather this means:
static int drv_hard_start_xmit(struct sk_buff *skb,
struct net_device *dev)
{
struct drv *dp = dev->priv;
lock_tx(dp);
...
/* This is a hard error log it. */
if (TX_BUFFS_AVAIL(dp) <= (skb_shinfo(skb)->nr_frags + 1)) {
netif_stop_queue(dev);
unlock_tx(dp);
printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
dev->name);
return 1;
}
... queue packet to card ...
... update tx consumer index ...
if (TX_BUFFS_AVAIL(dp) <= (MAX_SKB_FRAGS + 1))
netif_stop_queue(dev);
...
unlock_tx(dp);
...
}
And then at the end of your TX reclaimation event handling:
if (netif_queue_stopped(dp->dev) &&
TX_BUFFS_AVAIL(dp) > (MAX_SKB_FRAGS + 1))
netif_wake_queue(dp->dev);
For a non-scatter-gather supporting card, the three tests simply become:
/* This is a hard error log it. */
if (TX_BUFFS_AVAIL(dp) <= 0)
and:
if (TX_BUFFS_AVAIL(dp) == 0)
and:
if (netif_queue_stopped(dp->dev) &&
TX_BUFFS_AVAIL(dp) > 0)
netif_wake_queue(dp->dev);
2) Do not forget to update netdev->trans_start to jiffies after
each new tx packet is given to the hardware.
3) Do not forget that once you return 0 from your hard_start_xmit
method, it is your driver's responsibility to free up the SKB
and in some finite amount of time.
For example, this means that it is not allowed for your TX
mitigation scheme to let TX packets "hang out" in the TX
ring unreclaimed forever if no new TX packets are sent.
This error can deadlock sockets waiting for send buffer room
to be freed up.
If you return 1 from the hard_start_xmit method, you must not keep
any reference to that SKB and you must not attempt to free it up.
Probing guidelines:
1) Any hardware layer address you obtain for your device should
be verified. For example, for ethernet check it with
linux/etherdevice.h:is_valid_ether_addr()
Generic HDLC layer for Linux kernel 2.4/2.5
Krzysztof Halasa <khc@pm.waw.pl>
May, 2001
Generic HDLC layer currently supports:
- Frame Relay (ANSI, CCITT and no LMI), with ARP support (no InARP),
- raw HDLC (IPv4 only),
- Cisco HDLC,
- PPP (uses syncppp.c),
- X.25 (uses X.25 routines).
There are hardware drivers for the following cards:
- C101 by Moxa Technologies Co., Ltd.
- RISCom/N2 by SDL Communications Inc.
- and others, some not in the official kernel.
Make sure the hdlc.o and the hardware driver are loaded. It should
create a number of "hdlc" (hdlc0 etc) network devices, one for each
WAN port. You'll need the "sethdlc" utility, get it from:
http://hq.pm.waw.pl/hdlc/
Compile sethdlc.c utility:
gcc -O2 -Wall -o sethdlc sethdlc.c
Make sure you're using a correct version of sethdlc for your kernel.
Use sethdlc to set physical interface, clock rate, HDLC mode used,
and add any required PVCs if using Frame Relay.
Usually you want something like:
sethdlc hdlc0 clock int rate 128000
sethdlc hdlc0 cisco interval 10 timeout 25
or
sethdlc hdlc0 rs232 clock ext
sethdlc fr lmi ansi
sethdlc create 99
In Frame Relay mode, ifconfig master hdlc device up (without assigning
any IP address to it) before using pvc devices.
Setting interface:
* v35 | rs232 | x21 | t1 | e1 - sets physical interface for a given port
if the card has software-selectable interfaces
loopback - activate hardware loopback (for testing only)
* clock ext - external clock (uses DTE RX and TX clock)
* clock int - internal clock (provides clock signal on DCE clock output)
* clock txint - TX internal, RX external (provides TX clock on DCE output)
* clock txfromrx - TX clock derived from RX clock (TX clock on DCE output)
* rate - sets clock rate in bps (not required for external clock or
for txfromrx)
Setting protocol:
* hdlc - sets raw HDLC (IP-only) mode
nrz / nrzi / fm-mark / fm-space / manchester - sets transmission code
no-parity / crc16 / crc16-pr0 (CRC16 with preset zeros) / crc32-itu
crc16-itu (CRC16 with ITU-T polynomial) / crc16-itu-pr0 - sets parity
* cisco - sets Cisco HDLC mode (IP, IPv6 and IPX supported)
interval - time in seconds between keepalive packets
timeout - time in seconds after last received keepalive packet before
we assume the link is down
* ppp - sets synchronous PPP mode
* x25 - sets X.25 mode
* fr - Frame Relay mode
lmi ansi / ccitt / none - LMI (link management) type
dce - Frame Relay DCE (network) side LMI instead of default DTE (user).
It has nothing to do with clocks!
t391 - link integrity verification polling timer (in seconds) - user
t392 - polling verification timer (in seconds) - network
n391 - full status polling counter - user
n392 - error threshold - both user and network
n393 - monitored events count - both user and network
* create | delete n - FR only - adds / deletes PVC interface with DLCI #n.
Board-specific issues
---------------------
n2.o and c101.o need parameters to work (note double quotes):
insmod n2 hw='"io,irq,ram,ports[:io,irq,...]"'
example:
insmod n2 hw='"0x300,10,0xD0000,01"'
or
insmod c101 hw='"irq,ram[:irq,...]"
example:
insmod c101 hw='"9,0xdc000"'
If built into the kernel, these drivers need kernel (command line) parameters:
n2=io,irq,ram,ports:...
or
c101=irq,ram:...
If you have a problem with N2 or C101 card, you can issue the "private"
command to see port's packet descriptor rings:
sethdlc hdlc0 private
The hardware driver have to be build with CONFIG_HDLC_DEBUG_RINGS.
Attaching this info to bug reports would be helpful. Anyway, let me know
if you have problems using this.
For patches and other info look at http://hq.pm.waw.pl/hdlc/
......@@ -156,6 +156,11 @@ if it was in suspended state. Please note that this function can fail.
which enables the bus master bit in PCI_COMMAND register and also fixes
the latency timer value if it's set to something bogus by the BIOS.
If you want to use the PCI Memory-Write-Invalidate transaction,
call pci_set_mwi(). This enables bit PCI_COMMAND bit for Mem-Wr-Inval
and also ensures that the cache line size register is set correctly.
Make sure to check the return value of pci_set_mwi(), not all architectures
may support Memory-Write-Invalidate.
4. How to access PCI config space
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
......@@ -202,6 +207,8 @@ pci_resource_end() Returns bus end address for a given PCI region
pci_resource_len() Returns the byte length of a PCI region
pci_set_drvdata() Set private driver data pointer for a pci_dev
pci_get_drvdata() Return private driver data pointer for a pci_dev
pci_set_mwi() Enable Memory-Write-Invalidate transactions.
pci_clear_mwi() Disable Memory-Write-Invalidate transactions.
7. Miscellaneous hints
......
......@@ -104,7 +104,7 @@ pci_restore_state
-----------------
Usage:
pci_restore_state(dev,buffer);
pci_restore_state(dev, buffer);
Description:
Restore previously saved config space. (First 64 bytes only);
......@@ -117,7 +117,7 @@ pci_set_power_state
-------------------
Usage:
pci_set_power_state(dev,state);
pci_set_power_state(dev, state);
Description:
Transition device to low power state using PCI PM Capabilities registers.
......@@ -132,7 +132,7 @@ pci_enable_wake
---------------
Usage:
pci_enable_wake(dev,state,enable);
pci_enable_wake(dev, state, enable);
Description:
Enable device to generate PME# during low power state using PCI PM
......@@ -155,7 +155,7 @@ These functions are intended for use by individual drivers, and are defined in
struct pci_driver:
int (*save_state) (struct pci_dev *dev, u32 state);
int (*suspend)(struct pci_dev *dev, u32 state);
int (*suspend) (struct pci_dev *dev, u32 state);
int (*resume) (struct pci_dev *dev);
int (*enable_wake) (struct pci_dev *dev, u32 state, int enable);
......@@ -178,7 +178,7 @@ is preserved when entering D1, but the screen is placed into a low power state
The driver can also interpret this function as a notification that it may be entering
a sleep state in the near future. If it knows that the device cannot enter the
requested state, either because of lack of support for it, or because the devices is
requested state, either because of lack of support for it, or because the device is
middle of some critical operation, then it should fail.
This function should not be used to set any state in the device or the driver because
......
Brief Notes on C-Media 8738/8338 Driver
=======================================
Takashi Iwai <tiwai@suse.de>
Front/Rear Multi-channel Playback
---------------------------------
CM8x38 chip can use ADC as the second DAC so that two different stereo
channels can be used for front/rear playbacks. Since there are two
DACs, both streams are handled independently unlike the 4/6ch multi-
channel playbacks in the section below.
As default, ALSA driver assigns the first PCM device (i.e. hw:0,0 for
card#0) for front and 4/6ch playbacks, while the second PCM device
(hw:0,1) is assigned to the second DAC for rear playback.
There are slight difference between two DACs.
- The first DAC supports U8 and S16LE formats, while the second DAC
supports only S16LE.
- The second DAC supports only two channel stereo.
Please note that the CM8x38 DAC doesn't support continuous playback
rate but only fixed rates: 5512, 8000, 11025, 16000, 22050, 32000,
44100 and 48000 Hz.
The rear output can be heard only when "Four Channel Mode" switch is
disabled. Otherwise no signal will be routed to the rear speakers.
As default it's turned on.
*** WARNING ***
When "Four Channel Mode" switch is off, the output from rear speakers
will be FULL VOLUME regardless of Master and PCM volumes.
This might damage your audio equipment. Please disconnect speakers
before your turn off this switch.
*** WARNING ***
[ Well.. I once got the output with correct volume (i.e. same with the
front one) and was so excited. It was even with "Four Channel" bit
on and "double DAC" mode. Actually I could hear separate 4 channels
from front and rear speakers! But.. after reboot, all was gone.
It's a very pity that I didn't save the register dump at that
time.. Maybe there is an unknown register to achieve this... ]
If your card has an extra output jack for the rear output, the rear
playback should be routed there as default. If not, there is a
control switch in the driver "Line-In As Rear", which you can change
via alsamixer or somewhat else. When this switch is on, line-in jack
is used as rear output.
There are two more controls regarding to the rear output.
The "Exchange DAC" switch is used to exchange front and rear playback
routes, i.e. the 2nd DAC is output from front output.
4/6 Multi-Channel Playback
--------------------------
The recent CM8738 chips support for the 4/6 multi-channel playback
function. This is useful especially for AC3 decoding.
When the multi-channel is supported, the driver name has a suffix
"-MC" such like "CMI8738-MC6". You can check this name from
/proc/asound/cards.
When the 4/6-ch output is enabled, the front DAC accepts up to 6 (or
4) channels. This is different from the dual DACs described in the
previous section. While the dual DAC supports two different rates or
formats, the 4/6-ch playback supports only the same condition for all
channels.
For using 4/6 channel playback, you need to specify the PCM channels
as you like and set the format S16LE. For example, for playback with
4 channels,
snd_pcm_hw_params_set_access(pcm, hw, SND_PCM_ACCESS_RW_INTERLEAVED);
// or mmap if you like
snd_pcm_hw_params_set_format(pcm, hw, SND_PCM_FORMAT_S16_LE);
snd_pcm_hw_params_set_channels(pcm, hw, 4);
and use the interleaved 4 channel data.
There is a control switch, "Line-In As Bass". As you can imagine from
its name, the line-in jack is used for the bass (5th and 6th channels)
output.
Digital I/O
-----------
The CM8x38 provides the excellent SPDIF capability with very chip
price (yes, that's the reason I bought the card :)
The SPDIF playback and capture are done via the third PCM device
(hw:0,2). Usually this is assigned to the PCM device "spdif".
The available rates are 44100 and 48000 Hz.
For playback with aplay, you can run like below:
% aplay -Dhw:0,2 foo.wav
or
% aplay -Dspdif foo.wav
So far, only S16LE format is supported. Still no 24bit. Sorry, not
enough info for this.
The playback and capture over SPDIF use normal DAC and ADC,
respectively, so you cannot playback both analog and digital streams
simultaneously.
To enable SPDIF output, you need to turn on "IEC958 Output Switch"
control via mixer or alsactl. Then you'll see the red light on from
the card so you know that's working obviously :)
The SPDIF input is always enabled, so you can hear SPDIF input data
from line-out with "IEC958 In Monitor" switch at any time (see
below).
You can play via SPDIF even with the first device (hw:0,0),
but SPDIF is enabled only when the proper format (S16LE), sample rate
(441100 or 48000) and channels (2) are used. Otherwise it's turned
off. (Also don't forget to turn on "IEC958 Output Switch", too.)
Additionally there are relevant control switches:
"IEC958 Mix Analog" - Mix analog PCM playback and FM-OPL/3 streams and
output through SPDIF. This switch appears only on old chip
models (CM8738 033 and 037).
Note: without this control you can output PCM to SPDIF.
This is "mixing" of streams, so e.g. it's not for AC3 output
(see the next section).
"IEC958 In Select" - Select SPDIF input, the internal CD-in (false)
and the external input (true). This switch appears only on
the chip models 039 or later.
"IEC958 Loop" - SPDIF input data is loop back into SPDIF
output (aka bypass)
"IEC958 Copyright" - Set the copyright bit.
"IEC958 5V" - Select 0.5V (coax) or 5V (optical) interface.
On some cards this doesn't work and you need to change the
configuration with hardware dip-switch.
"IEC958 In Monitor" - SPDIF input is routed to DAC.
"IEC958 In Phase Inverse" - Set SPDIF input format as inverse.
[FIXME: this doesn't work on all chips..]
"IEC958 In Valid" - Set input validity flag detection.
Note: When "PCM Playback Switch" is on, you'll hear the digital output
stream through analog line-out.
The AC3 (RAW DIGITAL) OUTPUT
----------------------------
The driver supports raw digital (typically AC3) i/o over SPDIF. This
can be toggled via IEC958 playback control, but usually you need to
access it via alsa-lib. See alsa-lib documents for more details.
On the raw digital mode, the "PCM Playback Switch" is automatically
turned off so that non-audio data is heard from the analog line-out.
Similarly the following switches are off: "IEC958 Mix Analog" and
"IEC958 Loop". The switches are resumed after closing the SPDIF PCM
device automatically to the previous state.
ANALOG MIXER INTERFACE
----------------------
The mixer interface on CM8x38 is similar to SB16.
There are Master, PCM, Synth, CD, Line, Mic and PC Speaker playback
volumes. Synth, CD, Line and Mic have playback and capture switches,
too, as well as SB16.
In addition to the standard SB mixer, CM8x38 provides more functions.
- PCM playback switch
- PCM capture switch (to capture the data sent to DAC)
- Mic Boost switch
- Mic capture volume
- Aux playback volume/switch and capture switch
- 3D control switch
MIDI CONTROLLER
---------------
The MPU401-UART interface is enabled as default only for the first
(CMIPCI) card. You need to set module option "snd_midi_port" properly
for the 2nd (CMIPCI) card.
There is _no_ hardware wavetable function on this chip (except for
OPL3 synth below).
What's said as MIDI synth on Windows is a software synthesizer
emulation. On Linux use TiMidity or other softsynth program for
playing MIDI music.
FM OPL/3 Synth
--------------
The FM OPL/3 is also enabled as default only for the first card.
Set "snd_fm_port" module option for more cards.
The output quality of FM OPL/3 is, however, very weird.
I don't know why..
Joystick and Modem
------------------
The joystick and modem should be available by enabling the control
switch "Joystick" and "Modem" respectively. But I myself have never
tested them yet.
Debugging Information
---------------------
The registers are shown in /proc/asound/cardX/cmipci. If you have any
problem (especially unexpected behavior of mixer), please attach the
output of this proc file together with the bug report.
This diff is collapsed.
This diff is collapsed.
......@@ -65,7 +65,7 @@ Plug 'n Play
------------
In previous kernels (2.2.x), some configuration was required to
get the driver to talk to the card. Being the new millenium and
get the driver to talk to the card. Being the new millennium and
all, the 2.4.x kernels now support auto-configuration if ISA PnP
support is configured in. Theoretically, the driver even supports
having more than one card in this case.
......
......@@ -542,7 +542,7 @@ Yamaha OPL3-SA1
SoftOSS keeps the samples loaded on the system's RAM so much RAM is
required. SoftOSS should never be used on machines with less than 16 MB
of RAM since this is potentially dangerous (you may accidently run out
of RAM since this is potentially dangerous (you may accidentally run out
of memory which probably crashes the machine).
SoftOSS implements the wave table API originally designed for GUS. For
......
......@@ -182,9 +182,9 @@ MODULE PARAMETERS:
DEFAULT: 1 (Always on)
DESC: Controls whether the LED (the little light) on the front of the camera
is always off (0), always on (1), or only on when driver is open (2).
This is only supported with the OV511+ chipset, and even then only on
some cameras (ones that actually have the LED wired to the control pin,
and not just hardwired to be on all the time).
This is not supported with the OV511, and might only work with certain
cameras (ones that actually have the LED wired to the control pin, and
not just hard-wired to be on all the time).
NAME: dump_bridge
TYPE: integer (Boolean)
......
......@@ -1606,6 +1606,12 @@ L: linux-usb-users@lists.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
S: Maintained
USB EHCI DRIVER
P: David Brownell
M: dbrownell@users.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
S: Maintained
USB HID/HIDBP/INPUT DRIVERS
P: Vojtech Pavlik
M: vojtech@suse.cz
......@@ -1739,6 +1745,12 @@ L: linux-usb-devel@lists.sourceforge.net
W: http://usb.in.tum.de
S: Maintained
USB "USBNET" DRIVER
P: David Brownell
M: dbrownell@users.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
S: Maintained
VFAT FILESYSTEM:
P: Gordon Chaffee
M: chaffee@cs.berkeley.edu
......
VERSION = 2
PATCHLEVEL = 5
SUBLEVEL = 6
EXTRAVERSION =-pre2
EXTRAVERSION =-pre3
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
......@@ -162,6 +162,7 @@ DRIVERS-$(CONFIG_MTD) += drivers/mtd/mtdlink.o
DRIVERS-$(CONFIG_PCMCIA) += drivers/pcmcia/pcmcia.o
DRIVERS-$(CONFIG_NET_PCMCIA) += drivers/net/pcmcia/pcmcia_net.o
DRIVERS-$(CONFIG_NET_WIRELESS) += drivers/net/wireless/wireless_net.o
DRIVERS-$(CONFIG_NET_TULIP) += drivers/net/tulip/tulip_net.o
DRIVERS-$(CONFIG_PCMCIA_CHRDEV) += drivers/char/pcmcia/pcmcia_char.o
DRIVERS-$(CONFIG_DIO) += drivers/dio/dio.a
DRIVERS-$(CONFIG_SBUS) += drivers/sbus/sbus_all.o
......
......@@ -237,7 +237,6 @@ CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
......@@ -250,7 +249,6 @@ CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
......
......@@ -495,7 +495,7 @@ alpha_switch_to:
ret $31,($26),1
.end alpha_switch_to
#ifdef CONFIG_SMP
#if CONFIG_SMP || CONFIG_PREEMPT
.globl ret_from_fork
.align 3
.ent ret_from_fork
......
......@@ -682,7 +682,6 @@ comment 'Kernel hacking'
bool 'Compile kernel without frame pointer' CONFIG_NO_FRAME_POINTER
bool 'Verbose user fault messages' CONFIG_DEBUG_USER
bool 'Include debugging information in kernel binary' CONFIG_DEBUG_INFO
dep_bool 'Disable pgtable cache' CONFIG_NO_PGT_CACHE $CONFIG_CPU_26
bool 'Kernel debugging' CONFIG_DEBUG_KERNEL
dep_bool ' Debug memory allocations' CONFIG_DEBUG_SLAB $CONFIG_DEBUG_KERNEL
......
......@@ -378,7 +378,6 @@ CONFIG_BLK_DEV_IDE=m
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
......
......@@ -167,10 +167,6 @@ EXPORT_SYMBOL(__virt_to_bus);
#endif
#ifndef __bus_to_virt__is_a_macro
EXPORT_SYMBOL(__bus_to_virt);
#endif
#ifndef CONFIG_NO_PGT_CACHE
EXPORT_SYMBOL(quicklists);
#endif
/* string / mem functions */
......
......@@ -95,9 +95,6 @@ void cpu_idle(void)
idle();
leds_event(led_idle_end);
schedule();
#ifndef CONFIG_NO_PGT_CACHE
check_pgt_cache();
#endif
}
}
......
......@@ -14,7 +14,7 @@
static struct map_desc adifcc_io_desc[] __initdata = {
/* on-board devices */
{ 0xff400000, 0x00400000, 0x00300000, DOMAIN_IO, 1, 1, 0, 0},
{ 0xff400000, 0x00400000, 0x00300000, DOMAIN_IO, 0, 1, 0, 0},
LAST_DESC
};
......
......@@ -20,7 +20,7 @@
static struct map_desc anakin_io_desc[] __initdata = {
{ IO_BASE, IO_START, IO_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ FLASH_BASE, FLASH_START, FLASH_SIZE, DOMAIN_IO, 1, 1, 0, 0 },
{ FLASH_BASE, FLASH_START, FLASH_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ VGA_BASE, VGA_START, VGA_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
};
......
......@@ -78,15 +78,16 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
if (!new_pmd)
goto no_pmd;
new_pte = pte_alloc(mm, new_pmd, 0);
new_pte = pte_alloc_map(mm, new_pmd, 0);
if (!new_pte)
goto no_pte;
init_pgd = pgd_offset_k(0);
init_pmd = pmd_offset(init_pgd, 0);
init_pte = pte_offset(init_pmd, 0);
init_pte = pte_offset_map_nested(init_pmd, 0);
set_pte(new_pte, *init_pte);
pte_unmap_nested(init_pte);
pte_unmap(new_pte);
/*
* most of the page table entries are zeroed
......
......@@ -51,7 +51,7 @@ static struct map_desc autcpu12_io_desc[] __initdata = {
/* virtual, physical, length, domain, r, w, c, b */
/* memory-mapped extra io and CS8900A Ethernet chip */
/* ethernet chip */
{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, DOMAIN_IO, 1, 1, 0, 0 },
{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
};
......
......@@ -56,12 +56,12 @@ static struct map_desc edb7211_io_desc[] __initdata = {
/* virtual, physical, length, domain, r, w, c, b */
/* memory-mapped extra keyboard row and CS8900A Ethernet chip */
{ EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, MB1, DOMAIN_IO, 1, 1, 0, 0 },
{ EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, MB1, DOMAIN_IO, 1, 1, 0, 0 },
{ EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, MB1, DOMAIN_IO, 0, 1, 0, 0 },
{ EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, MB1, DOMAIN_IO, 0, 1, 0, 0 },
/* flash banks */
{ EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, MB1 * 8, DOMAIN_KERNEL, 1, 1, 0, 0 },
{ EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, MB1 * 8, DOMAIN_KERNEL, 1, 1, 0, 0 },
{ EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, MB1 * 8, DOMAIN_KERNEL, 0, 1, 0, 0 },
{ EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, MB1 * 8, DOMAIN_KERNEL, 0, 1, 0, 0 },
LAST_DESC
};
......
......@@ -125,7 +125,7 @@ fixup_adsbitsy(struct machine_desc *desc, struct param_struct *params,
static struct map_desc adsbitsy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA1111 */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA1111 */
LAST_DESC
};
......
......@@ -230,8 +230,8 @@ fixup_assabet(struct machine_desc *desc, struct param_struct *params,
static struct map_desc assabet_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf1000000, 0x12000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
{ 0xf1000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
/* f3000000 - neponset system registers */
/* f4000000 - neponset SA1111 registers */
LAST_DESC
......
......@@ -64,11 +64,11 @@ fixup_cerf(struct machine_desc *desc, struct param_struct *params,
static struct map_desc cerf_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Crystal Ethernet Chip */
{ 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Crystal Ethernet Chip */
#ifdef CONFIG_SA1100_CERF_CPLD
{ 0xf1000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CPLD Chip */
{ 0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CerfPDA Bluetooth */
{ 0xf3000000, 0x18000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CerfPDA Serial */
{ 0xf1000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD Chip */
{ 0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Bluetooth */
{ 0xf3000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Serial */
#endif
LAST_DESC
};
......
......@@ -31,7 +31,7 @@ fixup_empeg(struct machine_desc *desc, struct param_struct *params,
static struct map_desc empeg_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ EMPEG_FLASHBASE, 0x00000000, 0x00200000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash */
{ EMPEG_FLASHBASE, 0x00000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash */
LAST_DESC
};
......
......@@ -172,10 +172,10 @@ fixup_flexanet(struct machine_desc *desc, struct param_struct *params,
static struct map_desc flexanet_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
{ 0xf1000000, 0x18000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Ethernet controller */
{ 0xD0000000, 0x40000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Instrument boards */
{ 0xD8000000, 0x48000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* External peripherals */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf1000000, 0x18000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Ethernet controller */
{ 0xD0000000, 0x40000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Instrument boards */
{ 0xD8000000, 0x48000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* External peripherals */
LAST_DESC
};
......
......@@ -66,8 +66,8 @@ fixup_freebird(struct machine_desc *desc, struct param_struct *params,
static struct map_desc freebird_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x12000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
{ 0xf2000000, 0x19000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0},
{ 0xf0000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf2000000, 0x19000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0},
LAST_DESC
};
......
......@@ -32,67 +32,62 @@
* Handlers for GraphicsClient's external IRQ logic
*/
static void ADS_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs )
static void
gc_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{
int i;
unsigned int mask;
while ((mask = ADS_INT_ST1 | (ADS_INT_ST2 << 8))) {
/* clear the parent IRQ */
GEDR = GPIO_GPIO0;
while( (irq = ADS_INT_ST1 | (ADS_INT_ST2 << 8)) ){
for( i = 0; i < 16; i++ )
if( irq & (1<<i) )
do_IRQ( ADS_EXT_IRQ(i), regs );
irq = ADS_EXT_IRQ(0);
desc = irq_desc + irq;
do {
if (mask & 1)
desc->handle(irq, desc, regs);
mask >>= 1;
irq++;
desc++;
} while (mask);
}
}
static struct irqaction ADS_ext_irq = {
name: "ADS_ext_IRQ",
handler: ADS_IRQ_demux,
flags: SA_INTERRUPT
};
static void ADS_mask_and_ack_irq0(unsigned int irq)
static void gc_mask_irq1(unsigned int irq)
{
int mask = (1 << (irq - ADS_EXT_IRQ(0)));
ADS_INT_EN1 &= ~mask;
ADS_INT_ST1 = mask;
}
static void ADS_mask_irq0(unsigned int irq)
{
ADS_INT_ST1 = (1 << (irq - ADS_EXT_IRQ(0)));
}
static void ADS_unmask_irq0(unsigned int irq)
static void gc_unmask_irq1(unsigned int irq)
{
ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0)));
}
static struct irqchip ADS0_chip = {
ack: ADS_mask_and_ack_irq0,
mask: ADS_mask_irq0,
unmask: ADS_unmask_irq0,
static struct irqchip gc_irq1_chip = {
ack: gc_mask_irq1,
mask: gc_mask_irq1,
unmask: gc_unmask_irq1,
};
static void ADS_mask_and_ack_irq1(unsigned int irq)
static void gc_mask_irq2(unsigned int irq)
{
int mask = (1 << (irq - ADS_EXT_IRQ(8)));
ADS_INT_EN2 &= ~mask;
ADS_INT_ST2 = mask;
}
static void ADS_mask_irq1(unsigned int irq)
{
ADS_INT_ST2 = (1 << (irq - ADS_EXT_IRQ(8)));
}
static void ADS_unmask_irq1(unsigned int irq)
static void gc_unmask_irq2(unsigned int irq)
{
ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8)));
}
static struct irqchip ADS1_chip = {
ack: ADS_mask_and_ack_irq1,
mask: ADS_mask_irq1,
unmask: ADS_unmask_irq1,
static struct irqchip gc_irq2_chip = {
ack: gc_mask_irq2,
mask: gc_mask_irq2,
unmask: gc_unmask_irq2,
};
static void __init graphicsclient_init_irq(void)
......@@ -105,22 +100,23 @@ static void __init graphicsclient_init_irq(void)
/* disable all IRQs */
ADS_INT_EN1 = 0;
ADS_INT_EN2 = 0;
/* clear all IRQs */
ADS_INT_ST1 = 0xff;
ADS_INT_ST2 = 0xff;
for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) {
set_irq_chip(irq, &ADS0_chip);
set_irq_chip(irq, &gc_irq1_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) {
set_irq_chip(irq, &ADS1_chip);
set_irq_chip(irq, &gc_irq2_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE);
setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq );
set_irq_type(IRQ_GPIO0, IRQT_FALLING);
set_irq_chained_handler(IRQ_GPIO0, gc_irq_handler);
}
......@@ -148,111 +144,6 @@ static struct map_desc graphicsclient_io_desc[] __initdata = {
LAST_DESC
};
static struct gc_uart_ctrl_data_t gc_uart_ctrl_data[] = {
{ GPIO_GC_UART0_CTS, 0, NULL,NULL },
{ GPIO_GC_UART1_CTS, 0, NULL,NULL },
{ GPIO_GC_UART2_CTS, 0, NULL,NULL }
};
#error Old code. Someone needs to decide what to do with this
#if 0
static void
graphicsclient_cts_intr(int irq, void *dev_id, struct pt_regs *regs)
{
struct gc_uart_ctrl_data_t * uart_data = (struct gc_uart_ctrl_data_t *)dev_id;
int cts = !(GPLR & uart_data->cts_gpio);
/* NOTE: I supose that we will no get any interrupt
if the GPIO is not changed, so maybe
the cts_prev_state can be removed ... */
if (cts != uart_data->cts_prev_state) {
uart_data->cts_prev_state = cts;
uart_handle_cts_change(uart_data->info, cts);
}
}
static int
graphicsclient_register_cts_intr(int gpio, int irq,
struct gc_uart_ctrl_data_t *uart_data)
{
int ret = 0;
set_GPIO_IRQ_edge(gpio, GPIO_BOTH_EDGES);
ret = request_irq(irq, graphicsclient_cts_intr,
0, "GC RS232 CTS", uart_data);
if (ret) {
printk(KERN_ERR "uart_open: failed to register CTS irq (%d)\n",
ret);
free_irq(irq, uart_data);
}
return ret;
}
static int
graphicsclient_uart_open(struct uart_port *port, struct uart_info *info)
{
int ret = 0;
if (port->mapbase == _Ser1UTCR0) {
Ser1SDCR0 |= SDCR0_UART;
/* Set RTS Output */
GPSR = GPIO_GC_UART0_RTS;
gc_uart_ctrl_data[0].cts_prev_state = 0;
gc_uart_ctrl_data[0].info = info;
gc_uart_ctrl_data[0].port = port;
/* register uart0 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART0_CTS,
IRQ_GC_UART0_CTS,
&gc_uart_ctrl_data[0]);
} else if (port->mapbase == _Ser2UTCR0) {
Ser2UTCR4 = Ser2HSCR0 = 0;
/* Set RTS Output */
GPSR = GPIO_GC_UART1_RTS;
gc_uart_ctrl_data[1].cts_prev_state = 0;
gc_uart_ctrl_data[1].info = info;
gc_uart_ctrl_data[1].port = port;
/* register uart1 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART1_CTS,
IRQ_GC_UART1_CTS,
&gc_uart_ctrl_data[1]);
} else if (port->mapbase == _Ser3UTCR0) {
/* Set RTS Output */
GPSR = GPIO_GC_UART2_RTS;
gc_uart_ctrl_data[2].cts_prev_state = 0;
gc_uart_ctrl_data[2].info = info;
gc_uart_ctrl_data[2].port = port;
/* register uart2 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART2_CTS,
IRQ_GC_UART2_CTS,
&gc_uart_ctrl_data[2]);
}
return ret;
}
static int
graphicsclient_uart_close(struct uart_port *port, struct uart_info *info)
{
if (port->mapbase == _Ser1UTCR0) {
free_irq(IRQ_GC_UART0_CTS, &gc_uart_ctrl_data[0]);
} else if (port->mapbase == _Ser2UTCR0) {
free_irq(IRQ_GC_UART1_CTS, &gc_uart_ctrl_data[1]);
} else if (port->mapbase == _Ser3UTCR0) {
free_irq(IRQ_GC_UART2_CTS, &gc_uart_ctrl_data[2]);
}
return 0;
}
#endif
static u_int graphicsclient_get_mctrl(struct uart_port *port)
{
u_int result = TIOCM_CD | TIOCM_DSR;
......
......@@ -93,68 +93,62 @@ __initcall(graphicsmaster_init);
* Handlers for GraphicsMaster's external IRQ logic
*/
static void ADS_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs )
static void
gm_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{
int i;
while( (irq = ADS_INT_ST1 | (ADS_INT_ST2 << 8)) ){
for( i = 0; i < 16; i++ )
if( irq & (1<<i) ) {
do_IRQ( ADS_EXT_IRQ(i), regs );
}
unsigned int mask;
while ((mask = ADS_INT_ST1 | (ADS_INT_ST2 << 8))) {
/* clear the parent IRQ */
GEDR = GPIO_GPIO0;
irq = ADS_EXT_IRQ(0);
desc = irq_desc + irq;
do {
if (mask & 1)
desc->handle(irq, desc, regs);
mask >>= 1;
irq++;
desc++;
} while (mask);
}
}
static struct irqaction ADS_ext_irq = {
name: "ADS_ext_IRQ",
handler: ADS_IRQ_demux,
flags: SA_INTERRUPT
};
static void ADS_mask_and_ack_irq0(unsigned int irq)
static void gm_mask_irq1(unsigned int irq)
{
int mask = (1 << (irq - ADS_EXT_IRQ(0)));
ADS_INT_EN1 &= ~mask;
ADS_INT_ST1 = mask;
}
static void ADS_mask_irq0(unsigned int irq)
{
ADS_INT_ST1 = (1 << (irq - ADS_EXT_IRQ(0)));
}
static void ADS_unmask_irq0(unsigned int irq)
static void gm_unmask_irq1(unsigned int irq)
{
ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0)));
}
static struct irqchip ADS0_chip = {
ack: ADS_mask_and_ack_irq0,
mask: ADS_mask_irq0,
unmask: ADS_unmask_irq0,
static struct irqchip gm_irq1_chip = {
ack: gm_mask_irq1,
mask: gm_mask_irq1,
unmask: gm_unmask_irq1,
};
static void ADS_mask_and_ack_irq1(unsigned int irq)
static void gm_mask_irq2(unsigned int irq)
{
int mask = (1 << (irq - ADS_EXT_IRQ(8)));
ADS_INT_EN2 &= ~mask;
ADS_INT_ST2 = mask;
}
static void ADS_mask_irq1(unsigned int irq)
{
ADS_INT_ST2 = (1 << (irq - ADS_EXT_IRQ(8)));
}
static void ADS_unmask_irq1(unsigned int irq)
static void gm_unmask_irq2(unsigned int irq)
{
ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8)));
}
static struct irqchip ADS1_chip = {
ack: ADS_mask_irq1,
mask: ADS_mask_irq1,
unmask: ADS_mask_irq1,
static struct irqchip gm_irq2_chip = {
ack: gm_mask_irq2,
mask: gm_mask_irq2,
unmask: gm_unmask_irq2,
};
static void __init graphicsmaster_init_irq(void)
......@@ -167,22 +161,23 @@ static void __init graphicsmaster_init_irq(void)
/* disable all IRQs */
ADS_INT_EN1 = 0;
ADS_INT_EN2 = 0;
/* clear all IRQs */
ADS_INT_ST1 = 0xff;
ADS_INT_ST2 = 0xff;
for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) {
set_irq_chip(irq, &ADS0_chip);
set_irq_chip(irq, &gm_irq1_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_PROBE | IRQF_VALID);
}
for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) {
set_irq_chip(irq, &ADS1_chip);
set_irq_chip(irq, &gm_irq2_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_PROBE | IRQF_VALID);
}
set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE);
setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq );
set_irq_type(IRQ_GPIO0, IRQT_FALLING);
set_irq_chained_handler(IRQ_GPIO0, gm_irq_handler);
}
......@@ -206,9 +201,9 @@ fixup_graphicsmaster(struct machine_desc *desc, struct param_struct *params,
static struct map_desc graphicsmaster_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* CPLD */
{ 0xf1000000, 0x40000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* CAN */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
{ 0xf1000000, 0x40000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CAN */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......
......@@ -489,9 +489,9 @@ static struct sa1100_port_fns h3600_port_fns __initdata = {
static struct map_desc h3600_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ H3600_EGPIO_VIRT, 0x49000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* EGPIO 0 CS#5 */
{ H3600_BANK_2_VIRT, 0x10000000, 0x02800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 2 CS#2 */
{ H3600_BANK_4_VIRT, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 4 CS#4 */
{ H3600_EGPIO_VIRT, 0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 CS#5 */
{ H3600_BANK_2_VIRT, 0x10000000, 0x02800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 2 CS#2 */
{ H3600_BANK_4_VIRT, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 4 CS#4 */
LAST_DESC
};
......
......@@ -77,7 +77,7 @@ fixup_huw_webpanel(struct machine_desc *desc, struct param_struct *params,
**/
static struct map_desc huw_webpanel_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0xc1fb8000, 0x00048000, DOMAIN_IO, 1, 1, 0, 0 }, /* Parameter */
{ 0xf0000000, 0xc1fb8000, 0x00048000, DOMAIN_IO, 0, 1, 0, 0 }, /* Parameter */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
LAST_DESC
};
......
......@@ -31,8 +31,8 @@ fixup_itsy(struct machine_desc *desc, struct param_struct *params,
likely wrong. */
static struct map_desc itsy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x49000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* EGPIO 0 */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
LAST_DESC
};
......
......@@ -66,9 +66,9 @@ fixup_jornada720(struct machine_desc *desc, struct param_struct *params,
static struct map_desc jornada720_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x48000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Epson registers */
{ 0xf1000000, 0x48200000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Epson frame buffer */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xf0000000, 0x48000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson registers */
{ 0xf1000000, 0x48200000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson frame buffer */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......
......@@ -18,8 +18,8 @@
static struct map_desc lart_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash memory */
{ 0xec000000, 0x08000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash, alternative location */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
{ 0xec000000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
LAST_DESC
};
......
......@@ -34,9 +34,9 @@ fixup_nanoengine(struct machine_desc *desc, struct param_struct *params,
static struct map_desc nanoengine_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* System Registers */
{ 0xf1000000, 0x18A00000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Internal PCI Config Space */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf1000000, 0x18A00000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Internal PCI Config Space */
LAST_DESC
};
......
......@@ -184,8 +184,8 @@ __initcall(neponset_init);
static struct map_desc neponset_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......
......@@ -54,7 +54,7 @@ fixup_omnimeter(struct machine_desc *desc, struct param_struct *params,
static struct map_desc omnimeter_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xd2000000, 0x10000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* TS */
{ 0xd2000000, 0x10000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* TS */
LAST_DESC
};
......
......@@ -30,7 +30,7 @@ fixup_pangolin(struct machine_desc *desc, struct param_struct *params,
static struct map_desc pangolin_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
LAST_DESC
};
......
......@@ -103,20 +103,20 @@ fixup_pfs168(struct machine_desc *desc, struct param_struct *params,
static struct map_desc pfs168_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* 16C752 DUART port A (COM5) */
{ 0xf0001000, 0x10800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* 16C752 DUART port B (COM6) */
{ 0xf0002000, 0x11000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM1 RTS control (SYSC1RTS) */
{ 0xf0003000, 0x11400000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Status LED control (SYSLED) */
{ 0xf0004000, 0x11800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* DTMF code read (SYSDTMF) */
{ 0xf0005000, 0x11c00000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* LCD configure, enable (SYSLCDDE) */
{ 0xf0006000, 0x12000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM1 DSR and motion sense (SYSC1DSR) */
{ 0xf0007000, 0x12800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM3 xmit enable (SYSC3TEN) */
{ 0xf0008000, 0x13000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Control register A (SYSCTLA) */
{ 0xf0009000, 0x13800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Control register B (SYSCTLB) */
{ 0xf000a000, 0x18000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* SMC91C96 */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port A (COM5) */
{ 0xf0001000, 0x10800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port B (COM6) */
{ 0xf0002000, 0x11000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 RTS control (SYSC1RTS) */
{ 0xf0003000, 0x11400000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Status LED control (SYSLED) */
{ 0xf0004000, 0x11800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* DTMF code read (SYSDTMF) */
{ 0xf0005000, 0x11c00000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD configure, enable (SYSLCDDE) */
{ 0xf0006000, 0x12000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 DSR and motion sense (SYSC1DSR) */
{ 0xf0007000, 0x12800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM3 xmit enable (SYSC3TEN) */
{ 0xf0008000, 0x13000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register A (SYSCTLA) */
{ 0xf0009000, 0x13800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register B (SYSCTLB) */
{ 0xf000a000, 0x18000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* SMC91C96 */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......
......@@ -35,8 +35,8 @@ fixup_pleb(struct machine_desc *desc, struct param_struct *params,
static struct map_desc pleb_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash memory */
{ 0xe8400000, 0x08000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash, alternative location */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
{ 0xe8400000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
LAST_DESC
};
......
......@@ -58,7 +58,7 @@ fixup_simpad(struct machine_desc *desc, struct param_struct *params,
static struct map_desc simpad_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
LAST_DESC
};
......
......@@ -305,10 +305,10 @@ stork_kbd_unexpected_up(unsigned char code)
struct map_desc stork_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
{ STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* EGPIO 0 */
{ 0xf1000000, 0x10000000, 0x02800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 2 */
{ 0xf3800000, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 4 */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
{ 0xf1000000, 0x10000000, 0x02800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 2 */
{ 0xf3800000, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 4 */
LAST_DESC
};
......
......@@ -58,6 +58,7 @@
#include "generic.h"
#include "sa1111.h"
#include <asm/hardware/sa1111.h>
#define DEBUG 1
......@@ -74,19 +75,17 @@
/* init funcs */
static void __init fixup_system3(struct machine_desc *desc,
struct param_struct *params, char **cmdline, struct meminfo *mi);
static void __init get_system3_scr(void);
static int __init system3_init(void);
static void __init system3_init_irq(void);
static void __init system3_map_io(void);
static void system3_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs );
static int system3_get_mctrl(struct uart_port *port);
static u_int system3_get_mctrl(struct uart_port *port);
static void system3_set_mctrl(struct uart_port *port, u_int mctrl);
static void system3_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
static int sdram_notifier(struct notifier_block *nb, unsigned long event, void *data);
static int system3_lcd_power(int on);
static int system3_backlight_power(int on);
static void system3_lcd_power(int on);
static void system3_backlight_power(int on);
extern void convert_to_tag_list(struct param_struct *params, int mem_init);
......@@ -101,9 +100,9 @@ extern void convert_to_tag_list(struct param_struct *params, int mem_init);
static struct map_desc system3_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xe8000000, 0x00000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf3000000, PT_CPLD_BASE, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, PT_SA1111_BASE, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......@@ -113,12 +112,6 @@ static struct sa1100_port_fns system3_port_fns __initdata = {
pm: system3_uart_pm,
};
static struct irqaction system3_irq = {
name: "PT Digital Board SA1111 IRQ",
handler: system3_IRQ_demux,
flags: SA_INTERRUPT
};
static struct notifier_block system3_clkchg_block = {
notifier_call: sdram_notifier,
};
......@@ -145,56 +138,82 @@ static void __init system3_map_io(void)
/*********************************************************************
* Install IRQ handler
*/
static void system3_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs )
static void
system3_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{
u_char irr;
for(;;){
//irr = PTCPLD_REG_IRQSR & (PT_IRQ_LAN | PT_IRQ_USAR | PT_IRQ_SA1111);
irr = PT_IRQSR & (PT_IRQ_LAN | PT_IRQ_SA1111);
//DPRINTK( "irq=%d, desc=%p, regs=%p\n", irq, desc, regs );
irr ^= (PT_IRQ_LAN);
if (!irr) break;
while (1) {
struct irqdesc *d;
if( irr & PT_IRQ_LAN )
do_IRQ(IRQ_SYSTEM3_SMC9196, regs);
/*
* Acknowledge the parent IRQ.
*/
desc->chip->ack(irq);
#if 0
/* Highspeed Serial Bus not yet used */
if( irr & PT_IRQ_USAR )
do_IRQ(PT_USAR_IRQ, regs);
#endif
/*
* Read the interrupt reason register. Let's have all
* active IRQ bits high. Note: there is a typo in the
* Neponset user's guide for the SA1111 IRR level.
*/
//irr = PT_IRQSR & (PT_IRR_LAN | PT_IRR_SA1111);
irr = PT_IRQSR & (PT_IRR_SA1111);
if( irr & PT_IRQ_SA1111 )
sa1111_IRQ_demux(irq, dev_id, regs);
}
}
/* SMC IRQ is low-active, so "switch" bit over */
//irr ^= (PT_IRR_LAN);
//DPRINTK( "irr=0x%02x\n", irr );
static void __init system3_init_irq(void)
{
int irq;
DPRINTK( "%s\n", "START" );
if ((irr & (PT_IRR_LAN | PT_IRR_SA1111)) == 0)
break;
/* SA1111 IRQ not routed to a GPIO. */
sa1111_init_irq(-1);
/*
* Since there is no individual mask, we have to
* mask the parent IRQ. This is safe, since we'll
* recheck the register for any pending IRQs.
*/
if (irr & (PT_IRR_LAN)) {
desc->chip->mask(irq);
/* setup extra IRQs */
irq = IRQ_SYSTEM3_SMC9196;
irq_desc[irq].valid = 1;
irq_desc[irq].probe_ok = 1;
if (irr & PT_IRR_LAN) {
//DPRINTK( "SMC9196, irq=%d\n", IRQ_SYSTEM3_SMC9196 );
d = irq_desc + IRQ_SYSTEM3_SMC9196;
d->handle(IRQ_SYSTEM3_SMC9196, d, regs);
}
#if 0
/* Highspeed Serial Bus not yet used */
irq = PT_USAR_IRQ;
irq_desc[irq].valid = 1;
irq_desc[irq].probe_ok = 1;
#if 0 /* no SSP yet on system 4 */
if (irr & IRR_USAR) {
d = irq_desc + IRQ_NEPONSET_USAR;
d->handle(IRQ_NEPONSET_USAR, d, regs);
}
#endif
/* IRQ by CPLD */
set_GPIO_IRQ_edge( GPIO_GPIO(25), GPIO_RISING_EDGE );
setup_arm_irq( IRQ_GPIO25, &system3_irq );
desc->chip->unmask(irq);
}
if (irr & PT_IRR_SA1111) {
//DPRINTK( "SA1111, irq=%d\n", IRQ_SYSTEM3_SA1111 );
d = irq_desc + IRQ_SYSTEM3_SA1111;
d->handle(IRQ_SYSTEM3_SA1111, d, regs);
}
}
}
static void __init system3_init_irq(void)
{
/*
* Install handler for GPIO25.
*/
set_irq_type(IRQ_GPIO25, IRQT_RISING);
set_irq_chained_handler(IRQ_GPIO25, system3_irq_handler);
/*
* install eth irq
*/
set_irq_handler(IRQ_SYSTEM3_SMC9196, do_simple_IRQ);
set_irq_flags(IRQ_SYSTEM3_SMC9196, IRQF_VALID | IRQF_PROBE);
}
/**********************************************************************
......@@ -270,7 +289,7 @@ static void system3_set_mctrl(struct uart_port *port, u_int mctrl)
}
}
static int system3_get_mctrl(struct uart_port *port)
static u_int system3_get_mctrl(struct uart_port *port)
{
u_int ret = 0;
u_int irqsr = PT_IRQSR;
......@@ -358,12 +377,8 @@ static void system3_lcd_brightness(unsigned char value)
static void system3_lcd_power(int on)
{
#error why is backlight stuff here???
if (on) {
system3_lcd_on();
system3_lcd_backlight_on();
system3_lcd_contrast(0x95);
system3_lcd_brightness(240);
} else {
system3_lcd_off();
}
......@@ -407,10 +422,12 @@ static int __init system3_init(void)
*/
sa1110_mb_disable();
system3_init_irq();
/*
* Probe for a SA1111.
*/
ret = sa1111_probe(0x40000000);
ret = sa1111_probe(PT_SA1111_BASE);
if (ret < 0) {
printk( KERN_WARNING"PT Digital Board: no SA1111 found!\n" );
goto DONE;
......@@ -443,7 +460,11 @@ static int __init system3_init(void)
*/
sa1110_mb_enable();
system3_init_irq();
/*
* Initialise SA1111 IRQs
*/
sa1111_init_irq(IRQ_SYSTEM3_SA1111);
#if defined( CONFIG_CPU_FREQ )
ret = cpufreq_register_notifier(&system3_clkchg_block);
......@@ -453,6 +474,7 @@ static int __init system3_init(void)
}
#endif
ret = 0;
DONE:
DPRINTK( "ret=%d\n", ret );
......
......@@ -60,7 +60,7 @@ fixup_victor(struct machine_desc *desc, struct param_struct *params,
static struct map_desc victor_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x00200000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash */
{ 0xe8000000, 0x00000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash */
LAST_DESC
};
......
......@@ -67,9 +67,9 @@ fixup_xp860(struct machine_desc *desc, struct param_struct *params,
static struct map_desc xp860_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SCSI */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* LAN */
{ 0xf4000000, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCSI */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* LAN */
{ 0xf4000000, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
};
......
......@@ -69,9 +69,9 @@ __initcall(yopy_hw_init);
static struct map_desc yopy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash 0 */
{ 0xec000000, 0x08000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash 1 */
{ 0xf0000000, 0x48000000, 0x00300000, DOMAIN_IO, 1, 1, 0, 0 }, /* LCD */
{ 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 0 */
{ 0xec000000, 0x08000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 1 */
{ 0xf0000000, 0x48000000, 0x00300000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD */
{ 0xf1000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO */
LAST_DESC
};
......
......@@ -151,7 +151,7 @@ static void adjust_pte(struct vm_area_struct *vma, unsigned long address)
if (pmd_bad(*pmd))
goto bad_pmd;
pte = pte_offset(pmd, address);
pte = pte_offset_map(pmd, address);
entry = *pte;
/*
......@@ -164,6 +164,7 @@ static void adjust_pte(struct vm_area_struct *vma, unsigned long address)
set_pte(pte, entry);
flush_tlb_page(vma, address);
}
pte_unmap(pte);
return;
bad_pgd:
......
......@@ -83,10 +83,14 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
break;
}
pte = pte_offset(pmd, addr);
#ifndef CONFIG_HIGHMEM
/* We must not map this if we have highmem enabled */
pte = pte_offset_map(pmd, addr);
printk(", *pte = %08lx", pte_val(*pte));
#ifdef CONFIG_CPU_32
printk(", *ppte = %08lx", pte_val(pte[-PTRS_PER_PTE]));
#endif
pte_unmap(pte);
#endif
} while(0);
......
......@@ -64,38 +64,6 @@ static struct meminfo meminfo __initdata = { 0, };
*/
struct page *empty_zero_page;
#ifndef CONFIG_NO_PGT_CACHE
struct pgtable_cache_struct quicklists;
int do_check_pgt_cache(int low, int high)
{
int freed = 0;
if(pgtable_cache_size > high) {
do {
if(pgd_quicklist) {
free_pgd_slow(get_pgd_fast());
freed++;
}
if(pmd_quicklist) {
pmd_free_slow(pmd_alloc_one_fast(NULL, 0));
freed++;
}
if(pte_quicklist) {
pte_free_slow(pte_alloc_one_fast(NULL, 0));
freed++;
}
} while(pgtable_cache_size > low);
}
return freed;
}
#else
int do_check_pgt_cache(int low, int high)
{
return 0;
}
#endif
/* This is currently broken
* PG_skip is used on sparc/sparc64 architectures to "skip" certain
* parts of the address space.
......@@ -145,9 +113,6 @@ void show_mem(void)
printk("%d slab pages\n", slab);
printk("%d pages shared\n", shared);
printk("%d pages swap cached\n", cached);
#ifndef CONFIG_NO_PGT_CACHE
printk("%ld page tables cached\n", pgtable_cache_size);
#endif
show_buffers();
}
......
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