Commit 6e4bcf85 authored by Shawn Lin's avatar Shawn Lin Committed by Greg Kroah-Hartman

PCI: rockchip: Fix negotiated lanes calculation

commit 45e9320f upstream.

The calculation of negotiated lanes is wrong: it should be shifted by
PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted by
PCIE_CORE_PL_CONF_LANE_MASK instead.  Let's fix it.

Fixes: e77f847d ("PCI: rockchip: Add Rockchip PCIe controller support")
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 257349be
...@@ -591,7 +591,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) ...@@ -591,7 +591,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
/* Check the final link width from negotiated lane counter from MGMT */ /* Check the final link width from negotiated lane counter from MGMT */
status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL); status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL);
status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >> status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
PCIE_CORE_PL_CONF_LANE_MASK); PCIE_CORE_PL_CONF_LANE_SHIFT);
dev_dbg(dev, "current link width is x%d\n", status); dev_dbg(dev, "current link width is x%d\n", status);
rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID, rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,
......
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