Commit 70450d4d authored by Songjun Wu's avatar Songjun Wu Committed by Alexandre Belloni

ARM: at91/dt: sama5d2: add pdmic node

Add pdmic node.
Signed-off-by: default avatarSongjun Wu <songjun.wu@atmel.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 3869394a
......@@ -637,6 +637,12 @@ trng_clk: trng_clk {
atmel,clk-output-range = <0 83000000>;
};
pdmic_clk: pdmic_clk {
#clock-cells = <0>;
reg = <48>;
atmel,clk-output-range = <0 83000000>;
};
i2s0_clk: i2s0_clk {
#clock-cells = <0>;
reg = <54>;
......@@ -763,6 +769,11 @@ pwm_gclk: pwm_gclk {
atmel,clk-output-range = <0 83000000>;
};
pdmic_gclk: pdmic_gclk {
#clock-cells = <0>;
reg = <48>;
};
i2s0_gclk: i2s0_gclk {
#clock-cells = <0>;
reg = <54>;
......@@ -852,6 +863,19 @@ tcb1: timer@f8010000 {
clock-names = "t0_clk", "slow_clk";
};
pdmic: pdmic@f8018000 {
compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clock-names = "pclk", "gclk";
status = "disabled";
};
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;
......
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