Commit 70b5ea97 authored by Alison Wang's avatar Alison Wang Committed by Shawn Guo

ARM: ls1021a: Add dma-coherent property for eTSEC nodes

This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.
Signed-off-by: default avatarAlison Wang <alison.wang@freescale.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent a81fd34d
...@@ -445,6 +445,7 @@ enet0: ethernet@2d10000 { ...@@ -445,6 +445,7 @@ enet0: ethernet@2d10000 {
model = "eTSEC"; model = "eTSEC";
fsl,magic-packet; fsl,magic-packet;
ranges; ranges;
dma-coherent;
queue-group@2d10000 { queue-group@2d10000 {
#address-cells = <2>; #address-cells = <2>;
...@@ -473,6 +474,7 @@ enet1: ethernet@2d50000 { ...@@ -473,6 +474,7 @@ enet1: ethernet@2d50000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
model = "eTSEC"; model = "eTSEC";
ranges; ranges;
dma-coherent;
queue-group@2d50000 { queue-group@2d50000 {
#address-cells = <2>; #address-cells = <2>;
...@@ -501,6 +503,7 @@ enet2: ethernet@2d90000 { ...@@ -501,6 +503,7 @@ enet2: ethernet@2d90000 {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
model = "eTSEC"; model = "eTSEC";
ranges; ranges;
dma-coherent;
queue-group@2d90000 { queue-group@2d90000 {
#address-cells = <2>; #address-cells = <2>;
......
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