Commit 70bdb6ed authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: drop unnecessary pp_funcs checker

It's redundant. Also, the callers should not care about
the implementation details.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarNirmoy Das <nirmoy.das@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b89e9eb6
...@@ -136,8 +136,6 @@ static int acp_poweroff(struct generic_pm_domain *genpd) ...@@ -136,8 +136,6 @@ static int acp_poweroff(struct generic_pm_domain *genpd)
* 2. power off the acp tiles * 2. power off the acp tiles
* 3. check and enter ulv state * 3. check and enter ulv state
*/ */
if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
} }
return 0; return 0;
...@@ -157,7 +155,6 @@ static int acp_poweron(struct generic_pm_domain *genpd) ...@@ -157,7 +155,6 @@ static int acp_poweron(struct generic_pm_domain *genpd)
* 2. turn on acp clock * 2. turn on acp clock
* 3. power on acp tiles * 3. power on acp tiles
*/ */
if (adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);
} }
return 0; return 0;
...@@ -529,8 +526,6 @@ static int acp_set_powergating_state(void *handle, ...@@ -529,8 +526,6 @@ static int acp_set_powergating_state(void *handle,
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
bool enable = (state == AMD_PG_STATE_GATE); bool enable = (state == AMD_PG_STATE_GATE);
if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);
return 0; return 0;
......
...@@ -5343,10 +5343,9 @@ static int gfx_v8_0_late_init(void *handle) ...@@ -5343,10 +5343,9 @@ static int gfx_v8_0_late_init(void *handle)
static void gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, static void gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
if (((adev->asic_type == CHIP_POLARIS11) || if ((adev->asic_type == CHIP_POLARIS11) ||
(adev->asic_type == CHIP_POLARIS12) || (adev->asic_type == CHIP_POLARIS12) ||
(adev->asic_type == CHIP_VEGAM)) && (adev->asic_type == CHIP_VEGAM))
adev->powerplay.pp_funcs->set_powergating_by_smu)
/* Send msg to SMU via Powerplay */ /* Send msg to SMU via Powerplay */
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, enable); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, enable);
......
...@@ -304,7 +304,6 @@ static void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, ...@@ -304,7 +304,6 @@ static void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev,
return; return;
if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) { if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true);
} }
......
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