Commit 70c3f167 authored by Chang S. Bae's avatar Chang S. Bae Committed by Borislav Petkov

x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers

The kernel checks at boot time which features are available by walking a
XSAVE feature table which contains the CPUID feature bit numbers which need
to be checked whether a feature is available on a CPU or not. So far the
feature numbers have been linear, but AMX will create a gap which the
current code cannot handle.

Make the table entries explicitly indexed and adjust the loop code
accordingly to prepare for that.

No functional change.
Signed-off-by: default avatarChang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarLen Brown <len.brown@intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211021225527.10184-20-chang.seok.bae@intel.com
parent 500afbf6
...@@ -53,18 +53,18 @@ static const char *xfeature_names[] = ...@@ -53,18 +53,18 @@ static const char *xfeature_names[] =
"unknown xstate feature" , "unknown xstate feature" ,
}; };
static short xsave_cpuid_features[] __initdata = { static unsigned short xsave_cpuid_features[] __initdata = {
X86_FEATURE_FPU, [XFEATURE_FP] = X86_FEATURE_FPU,
X86_FEATURE_XMM, [XFEATURE_SSE] = X86_FEATURE_XMM,
X86_FEATURE_AVX, [XFEATURE_YMM] = X86_FEATURE_AVX,
X86_FEATURE_MPX, [XFEATURE_BNDREGS] = X86_FEATURE_MPX,
X86_FEATURE_MPX, [XFEATURE_BNDCSR] = X86_FEATURE_MPX,
X86_FEATURE_AVX512F, [XFEATURE_OPMASK] = X86_FEATURE_AVX512F,
X86_FEATURE_AVX512F, [XFEATURE_ZMM_Hi256] = X86_FEATURE_AVX512F,
X86_FEATURE_AVX512F, [XFEATURE_Hi16_ZMM] = X86_FEATURE_AVX512F,
X86_FEATURE_INTEL_PT, [XFEATURE_PT_UNIMPLEMENTED_SO_FAR] = X86_FEATURE_INTEL_PT,
X86_FEATURE_PKU, [XFEATURE_PKRU] = X86_FEATURE_PKU,
X86_FEATURE_ENQCMD, [XFEATURE_PASID] = X86_FEATURE_ENQCMD,
}; };
static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init = static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
...@@ -809,7 +809,10 @@ void __init fpu__init_system_xstate(unsigned int legacy_size) ...@@ -809,7 +809,10 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)
* Clear XSAVE features that are disabled in the normal CPUID. * Clear XSAVE features that are disabled in the normal CPUID.
*/ */
for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) { for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
if (!boot_cpu_has(xsave_cpuid_features[i])) unsigned short cid = xsave_cpuid_features[i];
/* Careful: X86_FEATURE_FPU is 0! */
if ((i != XFEATURE_FP && !cid) || !boot_cpu_has(cid))
fpu_kernel_cfg.max_features &= ~BIT_ULL(i); fpu_kernel_cfg.max_features &= ~BIT_ULL(i);
} }
......
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