Commit 724ce5ee authored by Uwe Kleine-König's avatar Uwe Kleine-König

ns9xxx: prepare for adding support for Digi ns921x processors

The hardware team changed some things that were taken as being common to
all ns9xxx processors up to now.

This patch addresses:

- irqs: s/IRQ_/IRQ_NS9360_/

- system module registers: some registers are still general, their
  definition lives now in include/asm-arm/arch-ns9xxx/regs-sys-common.h.
  The ns9360 specific ones are in .../regs-sys-ns9360.h
  As a result ns9360_systemclock cannot be static inline any more as its
  definition needs regs-sys-ns9360.h.  This becomes a real problem when
  adding support for ns9215 as this will need regs-sys-ns9215.h and
  including both files will not work.  For the same reason
  ns9360_reset() is now non-inline and gpio functions live in their own
  file.

- register mapping: s/ns9xxx_map_io/ns9360_map_io/

- timer registers:  move time.c to time-ns9360.c;
  s/ns9xxx_timer/ns9360_timer/
Signed-off-by: default avatarUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
parent 3a581349
obj-y := irq.o time.o generic.o gpio.o
obj-y := irq.o generic.o gpio.o
obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
obj-$(CONFIG_PROCESSOR_NS9360) += gpio-ns9360.o processor-ns9360.o time-ns9360.o
obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
......
......@@ -14,7 +14,8 @@
#include <asm/gpio.h>
#include <asm/arch-ns9xxx/board.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
#include <asm/arch-ns9xxx/regs-mem.h>
#include <asm/arch-ns9xxx/regs-bbu.h>
#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
......@@ -103,9 +104,9 @@ void __init board_a9m9750dev_init_irq(void)
int i;
if (gpio_request(11, "board a9m9750dev extirq2") == 0)
ns9xxx_gpio_configure(11, 0, 1);
ns9360_gpio_configure(11, 0, 1);
else
printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n",
printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
__func__);
for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
......@@ -114,13 +115,13 @@ void __init board_a9m9750dev_init_irq(void)
set_irq_flags(i, IRQF_VALID);
}
/* IRQ_EXT2: level sensitive + active low */
/* IRQ_NS9XXX_EXT2: level sensitive + active low */
eic = __raw_readl(SYS_EIC(2));
REGSET(eic, SYS_EIC, PLTY, AL);
REGSET(eic, SYS_EIC, LVEDG, LEVEL);
__raw_writel(eic, SYS_EIC(2));
set_irq_chained_handler(IRQ_EXT2,
set_irq_chained_handler(IRQ_NS9XXX_EXT2,
a9m9750dev_fpga_demux_handler);
}
......
/*
* arch/arm/mach-ns9xxx/generic.c
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -11,34 +11,9 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/memory.h>
#include <asm/page.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/arch-ns9xxx/regs-mem.h>
#include <asm/arch-ns9xxx/board.h>
#include "generic.h"
static struct map_desc standard_io_desc[] __initdata = {
{ /* BBus */
.virtual = io_p2v(0x90000000),
.pfn = __phys_to_pfn(0x90000000),
.length = 0x00700000,
.type = MT_DEVICE,
}, { /* AHB */
.virtual = io_p2v(0xa0100000),
.pfn = __phys_to_pfn(0xa0100000),
.length = 0x00900000,
.type = MT_DEVICE,
},
};
void __init ns9xxx_map_io(void)
{
iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}
void __init ns9xxx_init_machine(void)
{
}
/*
* arch/arm/mach-ns9xxx/generic.h
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -13,7 +13,4 @@
#include <linux/init.h>
void __init ns9xxx_init_irq(void);
void __init ns9xxx_map_io(void);
void __init ns9xxx_init_machine(void);
extern struct sys_timer ns9xxx_timer;
/*
* arch/arm/mach-ns9xxx/gpio-ns9360.c
*
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#include <linux/bug.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/arch-ns9xxx/regs-bbu.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include "gpio-ns9360.h"
static inline int ns9360_valid_gpio(unsigned gpio)
{
return gpio <= 72;
}
static inline void __iomem *ns9360_gpio_get_gconfaddr(unsigned gpio)
{
if (gpio < 56)
return BBU_GCONFb1(gpio / 8);
else
/*
* this could be optimised away on
* ns9750 only builds, but it isn't ...
*/
return BBU_GCONFb2((gpio - 56) / 8);
}
static inline void __iomem *ns9360_gpio_get_gctrladdr(unsigned gpio)
{
if (gpio < 32)
return BBU_GCTRL1;
else if (gpio < 64)
return BBU_GCTRL2;
else
/* this could be optimised away on ns9750 only builds */
return BBU_GCTRL3;
}
static inline void __iomem *ns9360_gpio_get_gstataddr(unsigned gpio)
{
if (gpio < 32)
return BBU_GSTAT1;
else if (gpio < 64)
return BBU_GSTAT2;
else
/* this could be optimised away on ns9750 only builds */
return BBU_GSTAT3;
}
/*
* each gpio can serve for 4 different purposes [0..3]. These are called
* "functions" and passed in the parameter func. Functions 0-2 are always some
* special things, function 3 is GPIO. If func == 3 dir specifies input or
* output, and with inv you can enable an inverter (independent of func).
*/
int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func)
{
void __iomem *conf = ns9360_gpio_get_gconfaddr(gpio);
u32 confval;
confval = __raw_readl(conf);
REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
__raw_writel(confval, conf);
return 0;
}
int ns9360_gpio_configure(unsigned gpio, int inv, int func)
{
if (likely(ns9360_valid_gpio(gpio))) {
if (func == 3) {
printk(KERN_WARNING "use gpio_direction_input "
"or gpio_direction_output\n");
return -EINVAL;
} else
return __ns9360_gpio_configure(gpio, 0, inv, func);
} else
return -EINVAL;
}
EXPORT_SYMBOL(ns9360_gpio_configure);
int ns9360_gpio_get_value(unsigned gpio)
{
void __iomem *stat = ns9360_gpio_get_gstataddr(gpio);
int ret;
ret = 1 & (__raw_readl(stat) >> (gpio & 31));
return ret;
}
void ns9360_gpio_set_value(unsigned gpio, int value)
{
void __iomem *ctrl = ns9360_gpio_get_gctrladdr(gpio);
u32 ctrlval;
ctrlval = __raw_readl(ctrl);
if (value)
ctrlval |= 1 << (gpio & 31);
else
ctrlval &= ~(1 << (gpio & 31));
__raw_writel(ctrlval, ctrl);
}
/*
* arch/arm/mach-ns9xxx/gpio-ns9360.h
*
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func);
int ns9360_gpio_get_value(unsigned gpio);
void ns9360_gpio_set_value(unsigned gpio, int value);
/*
* arch/arm/mach-ns9xxx/gpio.c
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -15,12 +15,13 @@
#include <asm/arch-ns9xxx/gpio.h>
#include <asm/arch-ns9xxx/processor.h>
#include <asm/arch-ns9xxx/regs-bbu.h>
#include <asm/io.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include <asm/bug.h>
#include <asm/types.h>
#include <asm/bitops.h>
#include "gpio-ns9360.h"
#if defined(CONFIG_PROCESSOR_NS9360)
#define GPIO_MAX 72
#elif defined(CONFIG_PROCESSOR_NS9750)
......@@ -45,41 +46,10 @@ static inline int ns9xxx_valid_gpio(unsigned gpio)
return gpio <= 49;
else
#endif
{
BUG();
}
static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
{
if (gpio < 56)
return BBU_GCONFb1(gpio / 8);
else
/*
* this could be optimised away on
* ns9750 only builds, but it isn't ...
*/
return BBU_GCONFb2((gpio - 56) / 8);
}
static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
{
if (gpio < 32)
return BBU_GCTRL1;
else if (gpio < 64)
return BBU_GCTRL2;
else
/* this could be optimised away on ns9750 only builds */
return BBU_GCTRL3;
}
static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio)
{
if (gpio < 32)
return BBU_GSTAT1;
else if (gpio < 64)
return BBU_GSTAT2;
else
/* this could be optimised away on ns9750 only builds */
return BBU_GSTAT3;
return 0;
}
}
int gpio_request(unsigned gpio, const char *label)
......@@ -98,49 +68,24 @@ void gpio_free(unsigned gpio)
}
EXPORT_SYMBOL(gpio_free);
/*
* each gpio can serve for 4 different purposes [0..3]. These are called
* "functions" and passed in the parameter func. Functions 0-2 are always some
* special things, function 3 is GPIO. If func == 3 dir specifies input or
* output, and with inv you can enable an inverter (independent of func).
*/
static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func)
int gpio_direction_input(unsigned gpio)
{
void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio);
u32 confval;
if (likely(ns9xxx_valid_gpio(gpio))) {
int ret = -EINVAL;
unsigned long flags;
spin_lock_irqsave(&gpio_lock, flags);
confval = __raw_readl(conf);
REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
__raw_writel(confval, conf);
#if defined(CONFIG_PROCESSOR_NS9360)
if (processor_is_ns9360())
ret = __ns9360_gpio_configure(gpio, 0, 0, 3);
else
#endif
BUG();
spin_unlock_irqrestore(&gpio_lock, flags);
return 0;
}
int ns9xxx_gpio_configure(unsigned gpio, int inv, int func)
{
if (likely(ns9xxx_valid_gpio(gpio))) {
if (func == 3) {
printk(KERN_WARNING "use gpio_direction_input "
"or gpio_direction_output\n");
return -EINVAL;
} else
return __ns9xxx_gpio_configure(gpio, 0, inv, func);
} else
return -EINVAL;
}
EXPORT_SYMBOL(ns9xxx_gpio_configure);
return ret;
int gpio_direction_input(unsigned gpio)
{
if (likely(ns9xxx_valid_gpio(gpio))) {
return __ns9xxx_gpio_configure(gpio, 0, 0, 3);
} else
return -EINVAL;
}
......@@ -149,9 +94,22 @@ EXPORT_SYMBOL(gpio_direction_input);
int gpio_direction_output(unsigned gpio, int value)
{
if (likely(ns9xxx_valid_gpio(gpio))) {
int ret = -EINVAL;
unsigned long flags;
gpio_set_value(gpio, value);
return __ns9xxx_gpio_configure(gpio, 1, 0, 3);
spin_lock_irqsave(&gpio_lock, flags);
#if defined(CONFIG_PROCESSOR_NS9360)
if (processor_is_ns9360())
ret = __ns9360_gpio_configure(gpio, 1, 0, 3);
else
#endif
BUG();
spin_unlock_irqrestore(&gpio_lock, flags);
return ret;
} else
return -EINVAL;
}
......@@ -159,31 +117,28 @@ EXPORT_SYMBOL(gpio_direction_output);
int gpio_get_value(unsigned gpio)
{
void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio);
int ret;
ret = 1 & (__raw_readl(stat) >> (gpio & 31));
return ret;
#if defined(CONFIG_PROCESSOR_NS9360)
if (processor_is_ns9360())
return ns9360_gpio_get_value(gpio);
else
#endif
{
BUG();
return -EINVAL;
}
}
EXPORT_SYMBOL(gpio_get_value);
void gpio_set_value(unsigned gpio, int value)
{
void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
u32 ctrlval;
unsigned long flags;
spin_lock_irqsave(&gpio_lock, flags);
ctrlval = __raw_readl(ctrl);
if (value)
ctrlval |= 1 << (gpio & 31);
#if defined(CONFIG_PROCESSOR_NS9360)
if (processor_is_ns9360())
ns9360_gpio_set_value(gpio, value);
else
ctrlval &= ~(1 << (gpio & 31));
__raw_writel(ctrlval, ctrl);
#endif
BUG();
spin_unlock_irqrestore(&gpio_lock, flags);
}
......
......@@ -12,7 +12,7 @@
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/mach-types.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/arch-ns9xxx/regs-sys-common.h>
#include <asm/arch-ns9xxx/irqs.h>
#include <asm/arch-ns9xxx/board.h>
......@@ -67,7 +67,7 @@ void __init ns9xxx_init_irq(void)
for (i = 0; i < 32; ++i)
__raw_writel(i, SYS_IVA(i));
for (i = IRQ_WATCHDOG; i <= IRQ_EXT3; ++i) {
for (i = 0; i <= 31; ++i) {
set_irq_chip(i, &ns9xxx_chip);
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID);
......
/*
* arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -11,12 +11,14 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include "board-a9m9750dev.h"
#include "generic.h"
static void __init mach_cc9p9360dev_map_io(void)
{
ns9xxx_map_io();
ns9360_map_io();
board_a9m9750dev_map_io();
}
......@@ -36,6 +38,6 @@ MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
.map_io = mach_cc9p9360dev_map_io,
.init_irq = mach_cc9p9360dev_init_irq,
.init_machine = mach_cc9p9360dev_init_machine,
.timer = &ns9xxx_timer,
.timer = &ns9360_timer,
.boot_params = 0x100,
MACHINE_END
/*
* arch/arm/mach-ns9xxx/mach-cc9p9360js.c
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -11,6 +11,8 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include "board-jscc9p9360.h"
#include "generic.h"
......@@ -21,9 +23,9 @@ static void __init mach_cc9p9360js_init_machine(void)
}
MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
.map_io = ns9xxx_map_io,
.map_io = ns9360_map_io,
.init_irq = ns9xxx_init_irq,
.init_machine = mach_cc9p9360js_init_machine,
.timer = &ns9xxx_timer,
.timer = &ns9360_timer,
.boot_params = 0x100,
MACHINE_END
/*
* arch/arm/mach-ns9xxx/processor-ns9360.c
*
* Copyright (C) 2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
void ns9360_reset(char mode)
{
u32 reg;
reg = __raw_readl(SYS_PLL) >> 16;
REGSET(reg, SYS_PLL, SWC, YES);
__raw_writel(reg, SYS_PLL);
}
#define CRYSTAL 29491200 /* Hz */
unsigned long ns9360_systemclock(void)
{
u32 pll = __raw_readl(SYS_PLL);
return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
>> REGGETIM(pll, SYS_PLL, FS);
}
static struct map_desc ns9360_io_desc[] __initdata = {
{ /* BBus */
.virtual = io_p2v(0x90000000),
.pfn = __phys_to_pfn(0x90000000),
.length = 0x00700000,
.type = MT_DEVICE,
}, { /* AHB */
.virtual = io_p2v(0xa0100000),
.pfn = __phys_to_pfn(0xa0100000),
.length = 0x00900000,
.type = MT_DEVICE,
},
};
void __init ns9360_map_io(void)
{
iotable_init(ns9360_io_desc, ARRAY_SIZE(ns9360_io_desc));
}
/*
* arch/arm/mach-ns9xxx/time.c
* arch/arm/mach-ns9xxx/time-ns9360.c
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -15,8 +15,8 @@
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/arch-ns9xxx/clock.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
#include <asm/arch-ns9xxx/irqs.h>
#include <asm/arch/system.h>
#include "generic.h"
......@@ -25,26 +25,26 @@
#define TIMER_CLOCKEVENT 1
static u32 latch;
static cycle_t ns9xxx_clocksource_read(void)
static cycle_t ns9360_clocksource_read(void)
{
return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
}
static struct clocksource ns9xxx_clocksource = {
.name = "ns9xxx-timer" __stringify(TIMER_CLOCKSOURCE),
static struct clocksource ns9360_clocksource = {
.name = "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
.rating = 300,
.read = ns9xxx_clocksource_read,
.read = ns9360_clocksource_read,
.mask = CLOCKSOURCE_MASK(32),
.shift = 20,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
static void ns9360_clockevent_setmode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
switch(mode) {
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
__raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
REGSET(tc, SYS_TCx, REN, EN);
......@@ -69,7 +69,7 @@ static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
}
static int ns9xxx_clockevent_setnextevent(unsigned long evt,
static int ns9360_clockevent_setnextevent(unsigned long evt,
struct clock_event_device *clk)
{
u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
......@@ -88,20 +88,20 @@ static int ns9xxx_clockevent_setnextevent(unsigned long evt,
return 0;
}
static struct clock_event_device ns9xxx_clockevent_device = {
.name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT),
static struct clock_event_device ns9360_clockevent_device = {
.name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
.shift = 20,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = ns9xxx_clockevent_setmode,
.set_next_event = ns9xxx_clockevent_setnextevent,
.set_mode = ns9360_clockevent_setmode,
.set_next_event = ns9360_clockevent_setnextevent,
};
static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id)
static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
{
int timerno = irq - IRQ_TIMER0;
int timerno = irq - IRQ_NS9360_TIMER0;
u32 tc;
struct clock_event_device *evt = &ns9xxx_clockevent_device;
struct clock_event_device *evt = &ns9360_clockevent_device;
/* clear irq */
tc = __raw_readl(SYS_TC(timerno));
......@@ -119,13 +119,13 @@ static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
static struct irqaction ns9xxx_clockevent_action = {
.name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT),
static struct irqaction ns9360_clockevent_action = {
.name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = ns9xxx_clockevent_handler,
.handler = ns9360_clockevent_handler,
};
static void __init ns9xxx_timer_init(void)
static void __init ns9360_timer_init(void)
{
int tc;
......@@ -148,12 +148,12 @@ static void __init ns9xxx_timer_init(void)
__raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
ns9xxx_clocksource.mult = clocksource_hz2mult(ns9xxx_cpuclock(),
ns9xxx_clocksource.shift);
ns9360_clocksource.mult = clocksource_hz2mult(ns9360_cpuclock(),
ns9360_clocksource.shift);
clocksource_register(&ns9xxx_clocksource);
clocksource_register(&ns9360_clocksource);
latch = SH_DIV(ns9xxx_cpuclock(), HZ, 0);
latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
REGSET(tc, SYS_TCx, TEN, DIS);
......@@ -166,19 +166,20 @@ static void __init ns9xxx_timer_init(void)
REGSET(tc, SYS_TCx, REN, EN);
__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
ns9xxx_clockevent_device.mult = div_sc(ns9xxx_cpuclock(),
NSEC_PER_SEC, ns9xxx_clockevent_device.shift);
ns9xxx_clockevent_device.max_delta_ns =
clockevent_delta2ns(-1, &ns9xxx_clockevent_device);
ns9xxx_clockevent_device.min_delta_ns =
clockevent_delta2ns(1, &ns9xxx_clockevent_device);
ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
NSEC_PER_SEC, ns9360_clockevent_device.shift);
ns9360_clockevent_device.max_delta_ns =
clockevent_delta2ns(-1, &ns9360_clockevent_device);
ns9360_clockevent_device.min_delta_ns =
clockevent_delta2ns(1, &ns9360_clockevent_device);
ns9xxx_clockevent_device.cpumask = cpumask_of_cpu(0);
clockevents_register_device(&ns9xxx_clockevent_device);
ns9360_clockevent_device.cpumask = cpumask_of_cpu(0);
clockevents_register_device(&ns9360_clockevent_device);
setup_irq(IRQ_TIMER0 + TIMER_CLOCKEVENT, &ns9xxx_clockevent_action);
setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
&ns9360_clockevent_action);
}
struct sys_timer ns9xxx_timer = {
.init = ns9xxx_timer_init,
struct sys_timer ns9360_timer = {
.init = ns9360_timer_init,
};
/*
* include/asm-arm/arch-ns9xxx/clock.h
*
* Copyright (C) 2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
#include <asm/arch-ns9xxx/regs-sys.h>
#define CRYSTAL 29491200 /* Hz */
/* The HRM calls this value f_vco */
static inline u32 ns9xxx_systemclock(void) __attribute__((const));
static inline u32 ns9xxx_systemclock(void)
{
u32 pll = __raw_readl(SYS_PLL);
/*
* The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
* time.c).
*
* The following values are given:
* - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
* - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
* - ND in {0 .. 31}
* - FS in {0 .. 3}
*
* Assuming the worst, we consider:
* - TIMERCLOCKSELECT == 64
* - ND == 0
* - FS == 3
*
* So HZ should be a divisor of:
* (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
* == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
* == 2^8 * 3^2 * 5^2
* == 57600
*
* Currently HZ is defined to be 100 for this platform.
*
* Fine.
*/
return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
>> REGGETIM(pll, SYS_PLL, FS);
}
static inline u32 ns9xxx_cpuclock(void) __attribute__((const));
static inline u32 ns9xxx_cpuclock(void)
{
return ns9xxx_systemclock() / 2;
}
static inline u32 ns9xxx_ahbclock(void) __attribute__((const));
static inline u32 ns9xxx_ahbclock(void)
{
return ns9xxx_systemclock() / 4;
}
static inline u32 ns9xxx_bbusclock(void) __attribute__((const));
static inline u32 ns9xxx_bbusclock(void)
{
return ns9xxx_systemclock() / 8;
}
#endif /* ifndef __ASM_ARCH_CLOCK_H */
/*
* include/asm-arm/arch-ns9xxx/entry-macro.S
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -9,7 +9,7 @@
* the Free Software Foundation.
*/
#include <asm/hardware.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/arch-ns9xxx/regs-sys-common.h>
.macro get_irqnr_preamble, base, tmp
ldr \base, =SYS_ISRADDR
......
/*
* include/asm-arm/arch-ns9xxx/irqs.h
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -11,38 +11,39 @@
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
#define IRQ_WATCHDOG 0
#define IRQ_AHBBUSERR 1
#define IRQ_BBUSAGG 2
/* NetSilicon 9360 */
#define IRQ_NS9XXX_WATCHDOG 0
#define IRQ_NS9XXX_AHBBUSERR 1
#define IRQ_NS9360_BBUSAGG 2
/* irq 3 is reserved for NS9360 */
#define IRQ_ETHRX 4
#define IRQ_ETHTX 5
#define IRQ_ETHPHY 6
#define IRQ_LCD 7
#define IRQ_SERBRX 8
#define IRQ_SERBTX 9
#define IRQ_SERARX 10
#define IRQ_SERATX 11
#define IRQ_SERCRX 12
#define IRQ_SERCTX 13
#define IRQ_I2C 14
#define IRQ_BBUSDMA 15
#define IRQ_TIMER0 16
#define IRQ_TIMER1 17
#define IRQ_TIMER2 18
#define IRQ_TIMER3 19
#define IRQ_TIMER4 20
#define IRQ_TIMER5 21
#define IRQ_TIMER6 22
#define IRQ_TIMER7 23
#define IRQ_RTC 24
#define IRQ_USBHOST 25
#define IRQ_USBDEVICE 26
#define IRQ_IEEE1284 27
#define IRQ_EXT0 28
#define IRQ_EXT1 29
#define IRQ_EXT2 30
#define IRQ_EXT3 31
#define IRQ_NS9XXX_ETHRX 4
#define IRQ_NS9XXX_ETHTX 5
#define IRQ_NS9XXX_ETHPHY 6
#define IRQ_NS9360_LCD 7
#define IRQ_NS9360_SERBRX 8
#define IRQ_NS9360_SERBTX 9
#define IRQ_NS9360_SERARX 10
#define IRQ_NS9360_SERATX 11
#define IRQ_NS9360_SERCRX 12
#define IRQ_NS9360_SERCTX 13
#define IRQ_NS9360_I2C 14
#define IRQ_NS9360_BBUSDMA 15
#define IRQ_NS9360_TIMER0 16
#define IRQ_NS9360_TIMER1 17
#define IRQ_NS9360_TIMER2 18
#define IRQ_NS9360_TIMER3 19
#define IRQ_NS9360_TIMER4 20
#define IRQ_NS9360_TIMER5 21
#define IRQ_NS9360_TIMER6 22
#define IRQ_NS9360_TIMER7 23
#define IRQ_NS9360_RTC 24
#define IRQ_NS9360_USBHOST 25
#define IRQ_NS9360_USBDEVICE 26
#define IRQ_NS9360_IEEE1284 27
#define IRQ_NS9XXX_EXT0 28
#define IRQ_NS9XXX_EXT1 29
#define IRQ_NS9XXX_EXT2 30
#define IRQ_NS9XXX_EXT3 31
#define BBUS_IRQ(irq) (32 + irq)
......@@ -67,7 +68,7 @@
/*
* these Interrupts are specific for the a9m9750dev board.
* They are generated by an FPGA that interrupts the CPU on
* IRQ_EXT2
* IRQ_NS9360_EXT2
*/
#define FPGA_IRQ(irq) (64 + irq)
......
/*
* include/asm-arm/arch-ns9xxx/processor-ns9360.h
*
* Copyright (C) 2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#ifndef __ASM_ARCH_PROCESSORNS9360_H
#define __ASM_ARCH_PROCESSORNS9360_H
#include <linux/init.h>
void ns9360_reset(char mode);
unsigned long ns9360_systemclock(void) __attribute__((const));
static inline unsigned long ns9360_cpuclock(void) __attribute__((const));
static inline unsigned long ns9360_cpuclock(void)
{
return ns9360_systemclock() / 2;
}
void __init ns9360_map_io(void);
extern struct sys_timer ns9360_timer;
int ns9360_gpio_configure(unsigned gpio, int inv, int func);
#endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */
/*
* include/asm-arm/arch-ns9xxx/regs-sys-common.h
*
* Copyright (C) 2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#ifndef __ASM_ARCH_REGSSYSCOMMON_H
#define __ASM_ARCH_REGSSYSCOMMON_H
#include <asm/hardware.h>
/* Interrupt Vector Address Register Level x */
#define SYS_IVA(x) __REG2(0xa09000c4, (x))
/* Interrupt Configuration registers */
#define SYS_IC(x) __REG2(0xa0900144, (x))
/* ISRADDR */
#define SYS_ISRADDR __REG(0xa0900164)
/* Interrupt Status Active */
#define SYS_ISA __REG(0xa0900168)
/* Interrupt Status Raw */
#define SYS_ISR __REG(0xa090016c)
#endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */
/*
* include/asm-arm/arch-ns9xxx/regs-sys.h
* include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#ifndef __ASM_ARCH_REGSSYS_H
#define __ASM_ARCH_REGSSYS_H
#ifndef __ASM_ARCH_REGSSYSNS9360_H
#define __ASM_ARCH_REGSSYSNS9360_H
#include <asm/hardware.h>
......@@ -27,21 +27,6 @@
/* Timer x Read register */
#define SYS_TR(x) __REG2(0xa0900084, (x))
/* Interrupt Vector Address Register Level x */
#define SYS_IVA(x) __REG2(0xa09000c4, (x))
/* Interrupt Configuration registers */
#define SYS_IC(x) __REG2(0xa0900144, (x))
/* ISRADDR */
#define SYS_ISRADDR __REG(0xa0900164)
/* Interrupt Status Active */
#define SYS_ISA __REG(0xa0900168)
/* Interrupt Status Raw */
#define SYS_ISR __REG(0xa090016c)
/* Timer Interrupt Status register */
#define SYS_TIS __REG(0xa0900170)
......@@ -160,4 +145,4 @@
#define SYS_EIC_LVEDG_LEVEL __REGVAL(SYS_EIC_LVEDG, 0)
#define SYS_EIC_LVEDG_EDGE __REGVAL(SYS_EIC_LVEDG, 1)
#endif /* ifndef __ASM_ARCH_REGSSYS_H */
#endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */
/*
* include/asm-arm/arch-ns9xxx/system.h
*
* Copyright (C) 2006 by Digi International Inc.
* Copyright (C) 2006,2007 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -12,8 +12,8 @@
#define __ASM_ARCH_SYSTEM_H
#include <asm/proc-fns.h>
#include <asm/arch-ns9xxx/regs-sys.h>
#include <asm/mach-types.h>
#include <asm/arch-ns9xxx/processor.h>
#include <asm/arch-ns9xxx/processor-ns9360.h>
static inline void arch_idle(void)
{
......@@ -22,11 +22,12 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
u32 reg;
reg = __raw_readl(SYS_PLL) >> 16;
REGSET(reg, SYS_PLL, SWC, YES);
__raw_writel(reg, SYS_PLL);
#ifdef CONFIG_PROCESSOR_NS9360
if (processor_is_ns9360())
ns9360_reset(mode);
else
#endif
BUG();
BUG();
}
......
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