Commit 72825e7f authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Andy Gross

arm64: dts: qcom: msm8996: Enable SMMUs

Enable SMMUs on 8996 now that the WRZ workaround in the arm-smmu driver
has landed.
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarAndy Gross <agross@kernel.org>
parent 64a68a73
...@@ -1185,7 +1185,6 @@ vfe_smmu: arm,smmu@da0000 { ...@@ -1185,7 +1185,6 @@ vfe_smmu: arm,smmu@da0000 {
clock-names = "iface", clock-names = "iface",
"bus"; "bus";
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
camss: camss@a00000 { camss: camss@a00000 {
...@@ -1338,8 +1337,6 @@ adreno_smmu: arm,smmu@b40000 { ...@@ -1338,8 +1337,6 @@ adreno_smmu: arm,smmu@b40000 {
clock-names = "iface", "bus"; clock-names = "iface", "bus";
power-domains = <&mmcc GPU_GDSC>; power-domains = <&mmcc GPU_GDSC>;
status = "disabled";
}; };
mdp_smmu: arm,smmu@d00000 { mdp_smmu: arm,smmu@d00000 {
...@@ -1356,8 +1353,6 @@ mdp_smmu: arm,smmu@d00000 { ...@@ -1356,8 +1353,6 @@ mdp_smmu: arm,smmu@d00000 {
clock-names = "iface", "bus"; clock-names = "iface", "bus";
power-domains = <&mmcc MDSS_GDSC>; power-domains = <&mmcc MDSS_GDSC>;
status = "disabled";
}; };
lpass_q6_smmu: arm,smmu-lpass_q6@1600000 { lpass_q6_smmu: arm,smmu-lpass_q6@1600000 {
...@@ -1384,7 +1379,6 @@ lpass_q6_smmu: arm,smmu-lpass_q6@1600000 { ...@@ -1384,7 +1379,6 @@ lpass_q6_smmu: arm,smmu-lpass_q6@1600000 {
clocks = <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>, clocks = <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>,
<&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>; <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
clock-names = "iface", "bus"; clock-names = "iface", "bus";
status = "disabled";
}; };
agnoc@0 { agnoc@0 {
......
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